[PATCH] sim-scripts: Add new or1ksim OpenRISC simulator script.

[Joel Sherrill]

On 8/26/2014 2:06 PM, Hesham Moustafa wrote:
> Hi,
>
> On Tue, Aug 26, 2014 at 8:47 PM, Joel Sherrill
> <joel.sherrill at oarcorp.com> wrote:
>> This looks good except that it is missing a comment for the commit.
>>
>> Can you add that and resubmit?
>>
> Done. Is it Ok to submit the sim.cfg and README change for or1ksim BSP too?
Yes. and the sim.cfg should be its own file. It is large. :)
>> Thanks.
>> On 8/26/2014 12:59 PM, Hesham ALMatary wrote:
>>> ---
>>>  sim-scripts/Makefile   |   5 +-
>>>  sim-scripts/or1ksim.in | 155 +++++++++++++++++++++++++++++++++++++++++++++++++
>>>  2 files changed, 159 insertions(+), 1 deletion(-)
>>>  create mode 100644 sim-scripts/or1ksim.in
>>>
>>> diff --git a/sim-scripts/Makefile b/sim-scripts/Makefile
>>> index 9d9baaf..e45feae 100644
>>> --- a/sim-scripts/Makefile
>>> +++ b/sim-scripts/Makefile
>>> @@ -1,6 +1,6 @@
>>>  INSTALL_DIR=../bin
>>>  GDBSIM_SCRIPTS=bf537Stamp ezkit533 gdbarmsim h8sim jmr3904 lm32_evr \
>>> -  m32csim m32rsim psim sis simsh v850sim
>>> +  m32csim m32rsim or1ksim psim sis simsh v850sim
>>>  SKYEYE_SCRIPTS=ant5206 bf537Stamp-skyeye csb337 csb350 csb360 edb7312 \
>>>    ezkit533-skyeye gumstix rtl22xx smdk2410 leon2-skyeye
>>>
>>> @@ -130,6 +130,9 @@ m32csim m32csim-gdb: gdb-sim-run.in gdb-sim.in m32csim.in
>>>  m32rsim m32rsim-gdb: gdb-sim-run.in gdb-sim.in m32rsim.in
>>>       ./mkrun yes M32R m32r m32rsim
>>>
>>> +or1ksim or1ksim-gdb: or1ksim.in
>>> +     ./mkrun yes OR1K or1k or1ksim
>>> +
>>>  psim psim-gdb: gdb-sim-run.in gdb-sim.in psim.in
>>>       ./mkrun yes PowerPC powerpc psim
>>>
>>> diff --git a/sim-scripts/or1ksim.in b/sim-scripts/or1ksim.in
>>> new file mode 100644
>>> index 0000000..3f59e47
>>> --- /dev/null
>>> +++ b/sim-scripts/or1ksim.in
>>> @@ -0,0 +1,155 @@
>>> +#
>>> +#  or1k/or1ksim Support
>>> +#
>>> +bspSupportsGDBServerMode="yes"
>>> +runBSP=or32-elf-sim
>>> +bspTreeFile=sim.cfg
>>> +
>>> +runARGS()
>>> +{
>>> +  echo "-f ${bspTreeFile} ${1}"
>>> +}
>>> +
>>> +checkBSPFaults()
>>> +{
>>> +  return 0
>>> +}
>>> +
>>> +bspLimit()
>>> +{
>>> +  testname=$1
>>> +  case ${testname} in
>>> +    *stackchk*)limit=5 ;;
>>> +    *fatal*)   limit=1 ;;
>>> +    *minimum*) limit=1 ;;
>>> +    *psxtime*) limit=180 ;;
>>> +    *)         limit=60 ;;
>>> +  esac
>>> +  echo ${limit}
>>> +}
>>> +
>>> +bspGeneratesGDBCommands="yes"
>>> +
>>> +gdbServerARGS()
>>> +{
>>> +  echo "-c ${bspTreeFile}"
>>> +}
>>> +
>>> +bspGenerateGDBCommands()
>>> +{
>>> +cat <<EOF
>>> +tar remote :50001
>>> +EOF
>>> +}
>>> +
>>> +### Generate the or1ksim device tree based upon the type of application being run
>>> +bspGenerateDeviceTree()
>>> +{
>>> +cat <<EOF
>>> +section memory
>>> +  name     =      "RAM"
>>> +  random_seed = 12345
>>> +  type        = random
>>> +  ce       =          0
>>> +  mc       =          0
>>> +  baseaddr = 0x00000000
>>> +  size     = 0x08000000
>>> +  delayr   =          1
>>> +  delayw   =          2
>>> +end
>>> +
>>> +section immu
>>> +  enabled = 0
>>> +  nsets = 64
>>> +  nways = 1
>>> +  pagesize = 8192
>>> +  hitdelay = 0
>>> +  missdelay = 0
>>> +end
>>> +
>>> +section dmmu
>>> +  enabled = 0
>>> +  nsets = 64
>>> +  nways = 1
>>> +  pagesize = 8192
>>> +  hitdelay = 0
>>> +  missdelay = 0
>>> +end
>>> +section mc
>>> +  enabled = 0
>>> +  baseaddr = 0x90000000
>>> +  POC = 0x0000000a                 /* 32 bit SSRAM */
>>> +  index = 0
>>> +end
>>> +
>>> +section ic
>>> +  enabled   =   0
>>> +  nsets     = 256
>>> +  nways     =   1
>>> +  blocksize =  16
>>> +  hitdelay  =  20
>>> +  missdelay =  20
>>> +end
>>> +
>>> +section dc
>>> +  enabled = 0
>>> +  nsets = 256
>>> +  nways = 1
>>> +  blocksize = 16
>>> +  load_hitdelay = 0
>>> +  load_missdelay = 0
>>> +  store_hitdelay = 0
>>> +  store_missdelay = 0
>>> +end
>>> +
>>> +section pic
>>> +  enabled = 1
>>> +  edge_trigger = 1
>>> +end
>>> +
>>> +section sim
>>> +  verbose  =  1
>>> +  debug    =  0
>>> +  profile  =  0
>>> +  history  =  0
>>> +  clkcycle = 10ns            /* 100MHz clock */
>>> +end
>>> +
>>> +section VAPI
>>> +  enabled = 1
>>> +  server_port = 50000
>>> +  log_enabled = 1
>>> +  vapi_log_file = "vapi.log"
>>> +end
>>> +
>>> +section cpu
>>> +  ver = 0x12
>>> +  cfg = 0x00
>>> +  rev = 0x0001
>>> +  superscalar = 0
>>> +  hazards = 0
>>> +  dependstats = 0
>>> +  sbuf_len = 100
>>> +end
>>> +
>>> +section debug
>>> + enabled = 1
>>> + rsp_enabled = 1
>>> + rsp_port = 50001
>>> +end
>>> +
>>> +section uart
>>> +  enabled  = 1
>>> +  baseaddr = 0x90000000
>>> +  #channel = "xterm"
>>> +  channel = "file:uart0.rx,uart0.tx"
>>> +  irq = 2
>>> +  16550    = 1
>>> +end
>>> +
>>> +section pm
>>> +  enabled = 1
>>> +end
>>> +EOF
>>> +}
>>> +bspGeneratesDeviceTree="yes"
>> --
>> Joel Sherrill, Ph.D.             Director of Research & Development
>> joel.sherrill at OARcorp.com        On-Line Applications Research
>> Ask me about RTEMS: a free RTOS  Huntsville AL 35805
>> Support Available                (256) 722-9985
>>

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
Support Available                (256) 722-9985