[PATCH 4/4 v3] SPARC: optimize IRQ enable & disable

[Joel Sherrill]

On 12/3/2014 8:39 AM, Sebastian Huber wrote:
> Looks good.
+1 Five instructions on this path is important.
> On 03/12/14 15:29, Daniel Hellstrom wrote:
>> * Coding style cleanups.
>> * Use OS reserved trap 0x89 for IRQ Disable
>> * Use OS reserved trap 0x8A for IRQ Enable
>> * Add to SPARC CPU supplement documentation
>>
>> This will result in faster Disable/Enable code since the
>> system trap handler does not need to decode which function
>> the user wants. Besides the IRQ disable/enabled can now
>> be inline which avoids the caller to take into account that
>> o0-o7+g1-g4 registers are destroyed by trap handler.
>>
>> It was also possible to reduce the interrupt trap handler by
>> five instructions due to this.

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