[PATCH 1/5] Let CPU/BSP Fatal handler have access to source
Joel Sherrill
joel.sherrill at oarcorp.com
Thu Jul 3 14:27:59 UTC 2014
This looks mostly mechanical and the biggest issue is
what to do with the source in the generic shutdown
case. The first thing is that I think this is already handled
and the information is stored in
_Internal_errors_What_happened in score/src/interr.c
before _CPU_Fatal_halt() is invoked. I would lean to
_CPU_Fatal_halt not taking any parameters since the
information is already stored in memory
Beyond that, When you touch code across all the ports,
it always highlights where there are unexpected deviations. :(
First, with this patch, it was easy to see that two ports
reference a fatal error handler in the BSP. I don't
see how that is correct or necessary given the code in
_Terminate() in interr.c.
$ grep -ri bsp_fatal .
./powerpc/rtems/score/cpu.h:void _BSP_Fatal_error(unsigned int);
./powerpc/rtems/score/cpu.h: _BSP_Fatal_error(_error)
./sh/rtems/score/cpu.h:#ifdef BSP_FATAL_HALT
./sh/rtems/score/cpu.h: void bsp_fatal_halt( uint32_t _error);
./sh/rtems/score/cpu.h:#define _CPU_Fatal_halt( _error ) bsp_fatal_halt(
_error)
I am guessing these references should be eliminated since the
BSPs should be getting their fatal error handler invoked by other
means now.
Second, when I looked over in the BSPs for "grep -i bsp_fatal",
I see that some PowerPC BSPs have _BSP_Fatal_error. I don't
see this invoked anywhere. Does this code need to be eliminated?
Can someone confirm me on this?
--joel
On 7/3/2014 2:29 AM, Daniel Hellstrom wrote:
> Without the source the error code does not say that much.
> Let it be up to the CPU/BSP to determine the error code
> reported on fatal shutdown.
>
> This patch does not change the current behaviour, just
> adds the option to handle the source of the fatal halt.
> ---
> cpukit/score/cpu/arm/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/avr/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/bfin/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/h8300/rtems/score/cpu.h | 4 ++--
> cpukit/score/cpu/i386/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/lm32/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/m32c/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/m32r/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/m68k/rtems/score/cpu.h | 4 ++--
> cpukit/score/cpu/mips/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/moxie/rtems/score/cpu.h | 4 ++--
> cpukit/score/cpu/nios2/nios2-fatal-halt.c | 2 +-
> cpukit/score/cpu/nios2/nios2-iic-irq.c | 2 +-
> cpukit/score/cpu/nios2/rtems/score/cpu.h | 3 ++-
> cpukit/score/cpu/no_cpu/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/powerpc/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/sh/rtems/score/cpu.h | 4 ++--
> cpukit/score/cpu/sparc/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/sparc64/rtems/score/cpu.h | 2 +-
> cpukit/score/cpu/v850/rtems/score/cpu.h | 2 +-
> cpukit/score/src/interr.c | 2 +-
> 21 files changed, 26 insertions(+), 25 deletions(-)
>
> diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
> index ad070df..98bd755 100644
> --- a/cpukit/score/cpu/arm/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
> @@ -455,7 +455,7 @@ void _CPU_Context_Initialize(
> *(*(_destination)) = _CPU_Null_fp_context; \
> } while (0)
>
> -#define _CPU_Fatal_halt( _err ) \
> +#define _CPU_Fatal_halt( _source, _err ) \
> do { \
> uint32_t _level; \
> uint32_t _error = _err; \
> diff --git a/cpukit/score/cpu/avr/rtems/score/cpu.h b/cpukit/score/cpu/avr/rtems/score/cpu.h
> index 70a0ddb..ba3bfb8 100644
> --- a/cpukit/score/cpu/avr/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/avr/rtems/score/cpu.h
> @@ -814,7 +814,7 @@ uint32_t _CPU_ISR_Get_level( void );
> * XXX document implementation including references if appropriate
> */
>
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { \
> }
>
> diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h
> index 306e4eb..0b728e7 100644
> --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h
> @@ -912,7 +912,7 @@ void _CPU_Context_Initialize(
> *
> * XXX document implementation including references if appropriate
> */
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { \
> __asm__ volatile ( "cli R1; \
> R1 = %0; \
> diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h
> index 621b3f1..8170445 100644
> --- a/cpukit/score/cpu/h8300/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h
> @@ -847,8 +847,8 @@ uint32_t _CPU_ISR_Get_level( void );
> * XXX
> */
>
> -#define _CPU_Fatal_halt( _error ) \
> - printk("Fatal Error %d Halted\n",_error); \
> +#define _CPU_Fatal_halt( _source, _error ) \
> + printk("Fatal Error %d.%d Halted\n",_source, _error); \
> for(;;)
>
>
> diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h
> index 2d1472d..e0ab037 100644
> --- a/cpukit/score/cpu/i386/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
> @@ -525,7 +525,7 @@ uint32_t _CPU_ISR_Get_level( void );
> * + disable interrupts and halt the CPU
> */
>
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { \
> uint32_t _error_lvalue = ( _error ); \
> __asm__ volatile ( "cli ; \
> diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h
> index 8e03245..17fa33c 100644
> --- a/cpukit/score/cpu/lm32/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h
> @@ -915,7 +915,7 @@ extern char _gp[];
> *
> * XXX document implementation including references if appropriate
> */
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { \
> }
>
> diff --git a/cpukit/score/cpu/m32c/rtems/score/cpu.h b/cpukit/score/cpu/m32c/rtems/score/cpu.h
> index fa31d74..011fe48 100644
> --- a/cpukit/score/cpu/m32c/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/m32c/rtems/score/cpu.h
> @@ -906,7 +906,7 @@ void _CPU_Context_Restart_self(
> *
> * XXX document implementation including references if appropriate
> */
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { \
> }
>
> diff --git a/cpukit/score/cpu/m32r/rtems/score/cpu.h b/cpukit/score/cpu/m32r/rtems/score/cpu.h
> index bf1d3fc..d35bee8 100644
> --- a/cpukit/score/cpu/m32r/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/m32r/rtems/score/cpu.h
> @@ -924,7 +924,7 @@ void _CPU_Context_Restart_self(
> *
> * XXX document implementation including references if appropriate
> */
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { \
> }
>
> diff --git a/cpukit/score/cpu/m68k/rtems/score/cpu.h b/cpukit/score/cpu/m68k/rtems/score/cpu.h
> index fb0c60c..d222465 100644
> --- a/cpukit/score/cpu/m68k/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/m68k/rtems/score/cpu.h
> @@ -479,7 +479,7 @@ void *_CPU_Thread_Idle_body( uintptr_t ignored );
> */
>
> #if ( defined(__mcoldfire__) )
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { __asm__ volatile( "move.w %%sr,%%d0\n\t" \
> "or.l %2,%%d0\n\t" \
> "move.w %%d0,%%sr\n\t" \
> @@ -491,7 +491,7 @@ void *_CPU_Thread_Idle_body( uintptr_t ignored );
> : "d0", "d1" ); \
> }
> #else
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { __asm__ volatile( "movl %0,%%d0; " \
> "orw #0x0700,%%sr; " \
> "stop #0x2700" : "=d" ((_error)) : "0" ((_error)) ); \
> diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h
> index 392a995..7fc639b 100644
> --- a/cpukit/score/cpu/mips/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h
> @@ -913,7 +913,7 @@ void _CPU_Context_Initialize(
> * halts/stops the CPU.
> */
>
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> do { \
> unsigned int _level; \
> _CPU_ISR_Disable(_level); \
> diff --git a/cpukit/score/cpu/moxie/rtems/score/cpu.h b/cpukit/score/cpu/moxie/rtems/score/cpu.h
> index 2c72bf6..cf22601 100644
> --- a/cpukit/score/cpu/moxie/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/moxie/rtems/score/cpu.h
> @@ -733,8 +733,8 @@ uint32_t _CPU_ISR_Get_level( void );
> *
> * XXX
> */
> -#define _CPU_Fatal_halt( _error ) \
> - printk("Fatal Error %d Halted\n",_error); \
> +#define _CPU_Fatal_halt( _source, _error ) \
> + printk("Fatal Error %d.%d Halted\n",_source,_error); \
> for(;;)
>
> /* end of Fatal Error manager macros */
> diff --git a/cpukit/score/cpu/nios2/nios2-fatal-halt.c b/cpukit/score/cpu/nios2/nios2-fatal-halt.c
> index 7632fa5..40cae87 100644
> --- a/cpukit/score/cpu/nios2/nios2-fatal-halt.c
> +++ b/cpukit/score/cpu/nios2/nios2-fatal-halt.c
> @@ -14,7 +14,7 @@
> #include <rtems/score/cpu.h>
> #include <rtems/score/nios2-utility.h>
>
> -void _CPU_Fatal_halt( uint32_t _error )
> +void _CPU_Fatal_halt( uint32_t _source, uint32_t _error )
> {
> /* write 0 to status register (disable interrupts) */
> __builtin_wrctl( NIOS2_CTLREG_INDEX_STATUS, 0 );
> diff --git a/cpukit/score/cpu/nios2/nios2-iic-irq.c b/cpukit/score/cpu/nios2/nios2-iic-irq.c
> index 8f3f3b9..f51bc2d 100644
> --- a/cpukit/score/cpu/nios2/nios2-iic-irq.c
> +++ b/cpukit/score/cpu/nios2/nios2-iic-irq.c
> @@ -133,5 +133,5 @@ void __ISR_Handler(void)
>
> void __Exception_Handler(CPU_Exception_frame *efr)
> {
> - _CPU_Fatal_halt(0xECC0);
> + _CPU_Fatal_halt(RTEMS_FATAL_SOURCE_EXCEPTION, 0xECC0); /* source ignored */
> }
> diff --git a/cpukit/score/cpu/nios2/rtems/score/cpu.h b/cpukit/score/cpu/nios2/rtems/score/cpu.h
> index fcfef8d..a14392c 100644
> --- a/cpukit/score/cpu/nios2/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/nios2/rtems/score/cpu.h
> @@ -310,7 +310,8 @@ void _CPU_Context_Initialize(
> #define _CPU_Context_Restart_self( _the_context ) \
> _CPU_Context_restore( (_the_context) );
>
> -void _CPU_Fatal_halt( uint32_t _error ) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
> +void _CPU_Fatal_halt( uint32_t _source, uint32_t _error )
> + RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
>
> /**
> * @brief CPU initialization.
> diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
> index 9570fb6..aa0ea52 100644
> --- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
> @@ -1042,7 +1042,7 @@ uint32_t _CPU_ISR_Get_level( void );
> *
> * XXX document implementation including references if appropriate
> */
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> { \
> }
>
> diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
> index 3cad329..54d701d 100644
> --- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
> @@ -677,7 +677,7 @@ void _BSP_Fatal_error(unsigned int);
>
> #endif /* ASM */
>
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> _BSP_Fatal_error(_error)
>
> /* end of Fatal Error manager macros */
> diff --git a/cpukit/score/cpu/sh/rtems/score/cpu.h b/cpukit/score/cpu/sh/rtems/score/cpu.h
> index cb89953..217eb7d 100644
> --- a/cpukit/score/cpu/sh/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/sh/rtems/score/cpu.h
> @@ -675,9 +675,9 @@ SCORE_EXTERN void _CPU_Context_Initialize(
> #ifdef BSP_FATAL_HALT
> /* we manage the fatal error in the board support package */
> void bsp_fatal_halt( uint32_t _error);
> -#define _CPU_Fatal_halt( _error ) bsp_fatal_halt( _error)
> +#define _CPU_Fatal_halt( _source, _error ) bsp_fatal_halt( _error)
> #else
> -#define _CPU_Fatal_halt( _error)\
> +#define _CPU_Fatal_halt( _source, _error)\
> { \
> __asm__ volatile("mov.l %0,r0"::"m" (_error)); \
> __asm__ volatile("mov #1, r4"); \
> diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
> index c010005..58c843a 100644
> --- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
> @@ -1080,7 +1080,7 @@ void _CPU_Context_Initialize(
> * location or a register, optionally disables interrupts, and
> * halts/stops the CPU.
> */
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> do { \
> uint32_t level; \
> \
> diff --git a/cpukit/score/cpu/sparc64/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
> index bf7d4fb..dd5040a 100644
> --- a/cpukit/score/cpu/sparc64/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
> @@ -905,7 +905,7 @@ void _CPU_Context_Initialize(
> * halts/stops the CPU.
> */
>
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> do { \
> uint32_t level; \
> \
> diff --git a/cpukit/score/cpu/v850/rtems/score/cpu.h b/cpukit/score/cpu/v850/rtems/score/cpu.h
> index 7234d67..e76a2a2 100644
> --- a/cpukit/score/cpu/v850/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/v850/rtems/score/cpu.h
> @@ -871,7 +871,7 @@ void _CPU_Context_Initialize(
> *
> * Move the error code into r10, disable interrupts and halt.
> */
> -#define _CPU_Fatal_halt( _error ) \
> +#define _CPU_Fatal_halt( _source, _error ) \
> do { \
> __asm__ __volatile__ ( "di" ); \
> __asm__ __volatile__ ( "mov %0, r10; " : "=r" ((_error)) ); \
> diff --git a/cpukit/score/src/interr.c b/cpukit/score/src/interr.c
> index 97ca3c7..f7d6274 100644
> --- a/cpukit/score/src/interr.c
> +++ b/cpukit/score/src/interr.c
> @@ -49,7 +49,7 @@ void _Terminate(
>
> _System_state_Set( SYSTEM_STATE_TERMINATED );
>
> - _CPU_Fatal_halt( the_error );
> + _CPU_Fatal_halt( the_source, the_error );
>
> /* will not return from this routine */
> while (true);
> --
> 1.7.0.4
>
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--
Joel Sherrill, Ph.D. Director of Research & Development
joel.sherrill at OARcorp.com On-Line Applications Research
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