[PATCH 3/3] score: Add SMP support to the cache manager

Sebastian Huber sebastian.huber at embedded-brains.de
Fri Jul 4 10:07:34 UTC 2014

On 2014-07-04 11:56, Daniel Cederman wrote:
>  > With this implementation cache routines must not be called from
>  > interrupt context.  This should be mentioned in the documentation.
>  >
>  > It is extremely difficult to implement it in a way so that it can be
>  > used from interrupt context.
> There are some synchronization issues in the code that we need to take care of.
> For example if the task gets swapped out while holding the lock and gets called
> again on the same cpu. We need to do some rewriting of the code.

It should be possible to disable thread dispatching before the SMP lock obtain. 
  You must not be the owner of the Giant lock, since this may result in a livelock.

Sebastian Huber, embedded brains GmbH

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