Porting to Cortex-R4F - Thesis and GSoC project proposal

[Sebastian Huber]

Hello Pavel,

On 2014-03-17 00:40, Pavel Pisa wrote:
> What is opinion of RTEMS development coordinators,
> do you suggest to open that task for GSoC application
> and student proposal evaluation?
>
> If yes, then who is willing to be menthor/reviewer?

I don't have time to mentor this year.

> I expect to be co-menthor or consultant. There are
> more other people at our department who already
> finished thesis or project related to given HW, so there
> is knowledge base for work. There is high chance that
> student would continue on project because he consider
> to choose it as diploma thesis and so final state should
> be very well documented and integrated at the end.
>
> As for the GSoC period, I expect next goals
>
>   - basic test and toolchain configuration
>       non-multilib version for Cortex-R4 big-endian should
>       not be problem for GCC
>
>   - documented patch for addition of the variant into multilib
>
>   - checking which conditional blocks in RTEMS ARM SCORE
>     sources best match architecture and providing patch
>     to select appropriate SCORE support.
>
>   - extensions of SCORE (task switch and interrupts) to support
>     the architecture
>
>   - implementation of serial port driver - ideally interrupt driven
>
> Then other peripheral support can be implemented during diploma
> thesis period, including basic CAN and FlexRay support. Porting
> of our Matlab/Simuling Embedded Coder target base environment
> to RTEMS POSIX or RTEMS specific API should be reachable as well.

I only looked briefly at the Cortex-R4, but there is one architecture manual 
for the A and R variants, so I expect that some code of the Cortex-A9 BSPs can 
be re-used.  Has the processor a MMU or only a MPU?

In case the chip has a network interface, then I think it would be enough for a 
GSoC project.

-- 
Sebastian Huber, embedded brains GmbH

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