[PATCH 1/3] bsps/sparc: Make lines in SPARC BSPs adhere to 80 character limit.
Daniel Cederman
cederman at gaisler.com
Mon May 12 14:39:07 UTC 2014
---
c/src/lib/libbsp/sparc/configure.ac | 3 +-
c/src/lib/libbsp/sparc/erc32/configure.ac | 13 +-
.../lib/libbsp/sparc/erc32/console/erc32_console.c | 9 +-
.../lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c | 3 +-
c/src/lib/libbsp/sparc/erc32/include/bsp.h | 4 +-
c/src/lib/libbsp/sparc/erc32/include/erc32.h | 34 ++--
c/src/lib/libbsp/sparc/leon2/cchip/cchip.c | 6 +-
c/src/lib/libbsp/sparc/leon2/clock/ckinit.c | 6 +-
c/src/lib/libbsp/sparc/leon2/configure.ac | 13 +-
c/src/lib/libbsp/sparc/leon2/include/bsp.h | 4 +-
c/src/lib/libbsp/sparc/leon2/include/leon.h | 6 +-
c/src/lib/libbsp/sparc/leon2/include/rasta.h | 18 +-
c/src/lib/libbsp/sparc/leon2/pci/pci.c | 181 +++++++++++++-------
c/src/lib/libbsp/sparc/leon2/rasta/rasta.c | 12 +-
c/src/lib/libbsp/sparc/leon3/Makefile.am | 3 +-
c/src/lib/libbsp/sparc/leon3/configure.ac | 7 +-
c/src/lib/libbsp/sparc/leon3/include/bsp.h | 13 +-
c/src/lib/libbsp/sparc/leon3/include/leon.h | 14 +-
.../sparc/leon3/leon_smc91111/leon_smc91111.c | 3 +-
c/src/lib/libbsp/sparc/leon3/pci/pci.c | 118 ++++++++-----
c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c | 5 +-
21 files changed, 292 insertions(+), 183 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/configure.ac b/c/src/lib/libbsp/sparc/configure.ac
index 72655f3..de5a642 100644
--- a/c/src/lib/libbsp/sparc/configure.ac
+++ b/c/src/lib/libbsp/sparc/configure.ac
@@ -1,7 +1,8 @@
## Process this file with autoconf to produce a configure script.
AC_PREREQ([2.69])
-AC_INIT([rtems-c-src-lib-libbsp-sparc],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_INIT([rtems-c-src-lib-libbsp-sparc],
+[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([shared])
RTEMS_TOP(../../../../..)
diff --git a/c/src/lib/libbsp/sparc/erc32/configure.ac b/c/src/lib/libbsp/sparc/erc32/configure.ac
index 8155514..4cbfb7e 100644
--- a/c/src/lib/libbsp/sparc/erc32/configure.ac
+++ b/c/src/lib/libbsp/sparc/erc32/configure.ac
@@ -1,7 +1,8 @@
## Process this file with autoconf to produce a configure script.
AC_PREREQ([2.69])
-AC_INIT([rtems-c-src-lib-libbsp-sparc-erc32],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_INIT([rtems-c-src-lib-libbsp-sparc-erc32],
+[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
@@ -23,11 +24,11 @@ AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"])
RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
[The erc32 console driver can operate in either polled or interrupt mode.
-Under the simulator (especially when FAST_UART is defined), polled seems to operate
-better. It is common for a task to print a line (like the end of test message) and
-then exit. In this case, the program returns control to the simulator command line
-before the program has even queued the output to the uart. Thus sis has no chance
-of getting the data out.])
+Under the simulator (especially when FAST_UART is defined), polled seems
+to operate better. It is common for a task to print a line (like the end
+of test message) and then exit. In this case, the program returns control
+to the simulator command line before the program has even queued the output
+to the uart. Thus sis has no chance of getting the data out.])
RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
diff --git a/c/src/lib/libbsp/sparc/erc32/console/erc32_console.c b/c/src/lib/libbsp/sparc/erc32/console/erc32_console.c
index 4965f2f..212d5e0 100644
--- a/c/src/lib/libbsp/sparc/erc32/console/erc32_console.c
+++ b/c/src/lib/libbsp/sparc/erc32/console/erc32_console.c
@@ -147,7 +147,8 @@ static int erc32_console_first_open(int major, int minor, void *arg)
}
#if (CONSOLE_USE_INTERRUPTS)
-static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_t len)
+static ssize_t erc32_console_write_support_int(
+ int minor, const char *buf, size_t len)
{
if (len > 0) {
console_data *cd = &Console_Port_Data[minor];
@@ -155,13 +156,15 @@ static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_
if (minor == 0) { /* uart a */
for (k = 0;
- k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA); k ++) {
+ k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA);
+ k ++) {
ERC32_MEC.UART_Channel_A = (unsigned char)buf[k];
}
ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX);
} else { /* uart b */
for (k = 0;
- k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB); k ++) {
+ k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB);
+ k ++) {
ERC32_MEC.UART_Channel_B = (unsigned char)buf[k];
}
ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX);
diff --git a/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c b/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c
index 31f81b7..baa39ed 100644
--- a/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c
+++ b/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c
@@ -98,7 +98,8 @@ sonic_configuration_t erc32_sonic_configuration = {
int rtems_erc32_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config)
{
- ERC32_MEC.IO_Configuration |= (0x15 << (((SONIC_BASE_ADDRESS >> 24) & 0x3) * 8));
+ ERC32_MEC.IO_Configuration |=
+ (0x15 << (((SONIC_BASE_ADDRESS >> 24) & 0x3) * 8));
ERC32_MEC.Control &= ~0x60001; /* Disable DMA time-out, parity & power-down */
ERC32_MEC.Control |= 0x10000; /* Enable DMA */
ERC32_MEC.Interrupt_Mask &= ~(1 << (SONIC_VECTOR - 0x10));
diff --git a/c/src/lib/libbsp/sparc/erc32/include/bsp.h b/c/src/lib/libbsp/sparc/erc32/include/bsp.h
index 47aefdd..b2c1b91 100644
--- a/c/src/lib/libbsp/sparc/erc32/include/bsp.h
+++ b/c/src/lib/libbsp/sparc/erc32/include/bsp.h
@@ -98,8 +98,8 @@ void bsp_spurious_initialize( void );
/* Allocate 8-byte aligned non-freeable pre-malloc() memory. The function
* can be called at any time. The work-area will shrink when called before
- * bsp_work_area_initialize(). malloc() is called to get memory when this function
- * is called after bsp_work_area_initialize().
+ * bsp_work_area_initialize(). malloc() is called to get memory when this
+ * function is called after bsp_work_area_initialize().
*/
void *bsp_early_malloc(int size);
diff --git a/c/src/lib/libbsp/sparc/erc32/include/erc32.h b/c/src/lib/libbsp/sparc/erc32/include/erc32.h
index 5520cdb..f3eb293 100644
--- a/c/src/lib/libbsp/sparc/erc32/include/erc32.h
+++ b/c/src/lib/libbsp/sparc/erc32/include/erc32.h
@@ -257,23 +257,23 @@ typedef struct {
* The following defines the bits in the Timer Control Register.
*/
-#define ERC32_MEC_TIMER_CONTROL_GCR 0x00000001 /* 1 = reload at 0 */
- /* 0 = stop at 0 */
-#define ERC32_MEC_TIMER_CONTROL_GCL 0x00000002 /* 1 = load and start */
- /* 0 = no function */
-#define ERC32_MEC_TIMER_CONTROL_GSE 0x00000004 /* 1 = enable counting */
- /* 0 = hold scalar and counter */
-#define ERC32_MEC_TIMER_CONTROL_GSL 0x00000008 /* 1 = load scalar and start */
- /* 0 = no function */
-
-#define ERC32_MEC_TIMER_CONTROL_RTCCR 0x00000100 /* 1 = reload at 0 */
- /* 0 = stop at 0 */
-#define ERC32_MEC_TIMER_CONTROL_RTCCL 0x00000200 /* 1 = load and start */
- /* 0 = no function */
-#define ERC32_MEC_TIMER_CONTROL_RTCSE 0x00000400 /* 1 = enable counting */
- /* 0 = hold scalar and counter */
-#define ERC32_MEC_TIMER_CONTROL_RTCSL 0x00000800 /* 1 = load scalar and start */
- /* 0 = no function */
+#define ERC32_MEC_TIMER_CONTROL_GCR 0x00000001 /* 1 = reload at 0 */
+ /* 0 = stop at 0 */
+#define ERC32_MEC_TIMER_CONTROL_GCL 0x00000002 /* 1 = load and start */
+ /* 0 = no function */
+#define ERC32_MEC_TIMER_CONTROL_GSE 0x00000004 /* 1 = enable counting */
+ /* 0 = hold scalar and counter */
+#define ERC32_MEC_TIMER_CONTROL_GSL 0x00000008 /* 1 = load scalar and start*/
+ /* 0 = no function */
+
+#define ERC32_MEC_TIMER_CONTROL_RTCCR 0x00000100 /* 1 = reload at 0 */
+ /* 0 = stop at 0 */
+#define ERC32_MEC_TIMER_CONTROL_RTCCL 0x00000200 /* 1 = load and start */
+ /* 0 = no function */
+#define ERC32_MEC_TIMER_CONTROL_RTCSE 0x00000400 /* 1 = enable counting */
+ /* 0 = hold scalar and counter */
+#define ERC32_MEC_TIMER_CONTROL_RTCSL 0x00000800 /* 1 = load scalar and start*/
+ /* 0 = no function */
/*
* The following defines the bits in the UART Control Registers.
diff --git a/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c b/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
index 241dcdd..c1f4d43 100644
--- a/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
+++ b/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
@@ -166,7 +166,8 @@ int init_pcif(void){
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2);
#endif
- ambab->ambabars[0] = 0x40000000; /* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
+ /* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
+ ambab->ambabars[0] = 0x40000000;
/* Scan bus for AMBA devices */
abus = &cc1.amba_bus;
@@ -328,7 +329,8 @@ void cchip1_set_isr(void *handler, int irqno, void *arg){
int_handlers[irqno].handler = handler;
int_handlers[irqno].arg = arg;
#ifdef DEBUG
- printk("Registering IRQ %d to 0x%lx(%d,0x%lx)\n\r",irqno,(unsigned int)handler,irqno,(unsigned int)arg);
+ printk("Registering IRQ %d to 0x%lx(%d,0x%lx)\n\r",
+ irqno,(unsigned int)handler,irqno,(unsigned int)arg);
#endif
cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */
}
diff --git a/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c b/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
index 345ef37..70e8e81 100644
--- a/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
+++ b/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
@@ -46,7 +46,8 @@ extern int CLOCK_SPEED;
#define Clock_driver_support_initialize_hardware() \
do { \
- LEON_REG.Timer_Reload_1 = rtems_configuration_get_microseconds_per_tick() - 1; \
+ LEON_REG.Timer_Reload_1 = \
+ rtems_configuration_get_microseconds_per_tick() - 1; \
\
LEON_REG.Timer_Control_1 = ( \
LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | \
@@ -77,6 +78,7 @@ static uint32_t bsp_clock_nanoseconds_since_last_tick(void)
return usecs * 1000;
}
-#define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick
+#define Clock_driver_nanoseconds_since_last_tick \
+ bsp_clock_nanoseconds_since_last_tick
#include "../../../shared/clockdrv_shell.h"
diff --git a/c/src/lib/libbsp/sparc/leon2/configure.ac b/c/src/lib/libbsp/sparc/leon2/configure.ac
index fdfbd87..6c7e25d 100644
--- a/c/src/lib/libbsp/sparc/leon2/configure.ac
+++ b/c/src/lib/libbsp/sparc/leon2/configure.ac
@@ -1,7 +1,8 @@
## Process this file with autoconf to produce a configure script.
AC_PREREQ([2.69])
-AC_INIT([rtems-c-src-lib-libbsp-sparc-leon2],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_INIT([rtems-c-src-lib-libbsp-sparc-leon2],
+[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
@@ -23,11 +24,11 @@ AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"])
RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
[The leon2 console driver can operate in either polled or interrupt mode.
-Under the simulator (especially when FAST_UART is defined), polled seems to operate
-better. It is common for a task to print a line (like the end of test message) and
-then exit. In this case, the program returns control to the simulator command line
-before the program has even queued the output to the uart. Thus sis has no chance
-of getting the data out.])
+Under the simulator (especially when FAST_UART is defined), polled seems
+to operate better. It is common for a task to print a line (like the end
+of test message) and then exit. In this case, the program returns control
+to the simulator command line before the program has even queued the output
+to the uart. Thus sis has no chance of getting the data out.])
RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
diff --git a/c/src/lib/libbsp/sparc/leon2/include/bsp.h b/c/src/lib/libbsp/sparc/leon2/include/bsp.h
index 85ee883..8e40903 100644
--- a/c/src/lib/libbsp/sparc/leon2/include/bsp.h
+++ b/c/src/lib/libbsp/sparc/leon2/include/bsp.h
@@ -119,8 +119,8 @@ void bsp_spurious_initialize( void );
/* Allocate 8-byte aligned non-freeable pre-malloc() memory. The function
* can be called at any time. The work-area will shrink when called before
- * bsp_work_area_initialize(). malloc() is called to get memory when this function
- * is called after bsp_work_area_initialize().
+ * bsp_work_area_initialize(). malloc() is called to get memory when this
+ * function is called after bsp_work_area_initialize().
*/
void *bsp_early_malloc(int size);
diff --git a/c/src/lib/libbsp/sparc/leon2/include/leon.h b/c/src/lib/libbsp/sparc/leon2/include/leon.h
index d122f29..b60c1d5 100644
--- a/c/src/lib/libbsp/sparc/leon2/include/leon.h
+++ b/c/src/lib/libbsp/sparc/leon2/include/leon.h
@@ -224,11 +224,11 @@ typedef struct {
*/
#define LEON_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */
- /* 0 = hold scalar and counter */
+ /* 0 = hold scalar and counter */
#define LEON_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */
- /* 0 = stop at 0 */
+ /* 0 = stop at 0 */
#define LEON_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */
- /* 0 = no function */
+ /* 0 = no function */
/*
* The following defines the bits in the UART Control Registers.
diff --git a/c/src/lib/libbsp/sparc/leon2/include/rasta.h b/c/src/lib/libbsp/sparc/leon2/include/rasta.h
index 0073ad7..8352900 100644
--- a/c/src/lib/libbsp/sparc/leon2/include/rasta.h
+++ b/c/src/lib/libbsp/sparc/leon2/include/rasta.h
@@ -88,12 +88,18 @@ struct uart_reg {
void uart_register(unsigned int baseaddr);
-rtems_device_driver uart_initialize(rtems_device_major_number major, rtems_device_minor_number minor, void *arg);
-rtems_device_driver uart_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg);
-rtems_device_driver uart_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg);
-rtems_device_driver uart_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg);
-rtems_device_driver uart_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg);
-rtems_device_driver uart_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg);
+rtems_device_driver uart_initialize(rtems_device_major_number major,
+ rtems_device_minor_number minor, void *arg);
+rtems_device_driver uart_open(rtems_device_major_number major,
+ rtems_device_minor_number minor, void *arg);
+rtems_device_driver uart_close(rtems_device_major_number major,
+ rtems_device_minor_number minor, void *arg);
+rtems_device_driver uart_read(rtems_device_major_number major,
+ rtems_device_minor_number minor, void *arg);
+rtems_device_driver uart_write(rtems_device_major_number major,
+ rtems_device_minor_number minor, void *arg);
+rtems_device_driver uart_control(rtems_device_major_number major,
+ rtems_device_minor_number minor, void *arg);
struct gpio_reg {
diff --git a/c/src/lib/libbsp/sparc/leon2/pci/pci.c b/c/src/lib/libbsp/sparc/leon2/pci/pci.c
index fcc63df..f34a173 100644
--- a/c/src/lib/libbsp/sparc/leon2/pci/pci.c
+++ b/c/src/lib/libbsp/sparc/leon2/pci/pci.c
@@ -44,14 +44,14 @@
/* allow for overriding these definitions */
#ifndef PCI_CONFIG_ADDR
-#define PCI_CONFIG_ADDR 0xcf8
+#define PCI_CONFIG_ADDR 0xcf8
#endif
#ifndef PCI_CONFIG_DATA
-#define PCI_CONFIG_DATA 0xcfc
+#define PCI_CONFIG_DATA 0xcfc
#endif
/* define a shortcut */
-#define pci BSP_pci_configuration
+#define pci BSP_pci_configuration
/*
* Bit encode for PCI_CONFIG_HEADER_TYPE register
@@ -59,34 +59,62 @@
unsigned char ucMaxPCIBus;
typedef struct {
- volatile unsigned int pciid1; /* 0x80000100 - PCI Device identification register 1 */
- volatile unsigned int pcisc; /* 0x80000104 - PCI Status & Command */
- volatile unsigned int pciid2; /* 0x80000108 - PCI Device identification register 2 */
- volatile unsigned int pcibhlc; /* 0x8000010c - BIST, Header type, Cache line size register */
- volatile unsigned int mbar1; /* 0x80000110 - Memory Base Address Register 1 */
- volatile unsigned int mbar2; /* 0x80000114 - Memory Base Address Register 2 */
- volatile unsigned int iobar3; /* 0x80000118 - IO Base Address Register 3 */
- volatile unsigned int dummy1[4]; /* 0x8000011c - 0x80000128 */
- volatile unsigned int pcisid; /* 0x8000012c - Subsystem identification register */
- volatile unsigned int dummy2; /* 0x80000130 */
- volatile unsigned int pcicp; /* 0x80000134 - PCI capabilities pointer register */
- volatile unsigned int dummy3; /* 0x80000138 */
- volatile unsigned int pcili; /* 0x8000013c - PCI latency interrupt register */
- volatile unsigned int pcirt; /* 0x80000140 - PCI retry, trdy config */
- volatile unsigned int pcicw; /* 0x80000144 - PCI configuration write register */
- volatile unsigned int pcisa; /* 0x80000148 - PCI Initiator Start Address */
- volatile unsigned int pciiw; /* 0x8000014c - PCI Initiator Write Register */
- volatile unsigned int pcidma; /* 0x80000150 - PCI DMA configuration register */
- volatile unsigned int pciis; /* 0x80000154 - PCI Initiator Status Register */
- volatile unsigned int pciic; /* 0x80000158 - PCI Initiator Configuration */
- volatile unsigned int pcitpa; /* 0x8000015c - PCI Target Page Address Register */
- volatile unsigned int pcitsc; /* 0x80000160 - PCI Target Status-Command Register */
- volatile unsigned int pciite; /* 0x80000164 - PCI Interrupt Enable Register */
- volatile unsigned int pciitp; /* 0x80000168 - PCI Interrupt Pending Register */
- volatile unsigned int pciitf; /* 0x8000016c - PCI Interrupt Force Register */
- volatile unsigned int pcid; /* 0x80000170 - PCI Data Register */
- volatile unsigned int pcibe; /* 0x80000174 - PCI Burst End Register */
- volatile unsigned int pcidmaa; /* 0x80000178 - PCI DMA Address Register */
+ /* 0x80000100 - PCI Device identification register 1 */
+ volatile unsigned int pciid1;
+ /* 0x80000104 - PCI Status & Command */
+ volatile unsigned int pcisc;
+ /* 0x80000108 - PCI Device identification register 2 */
+ volatile unsigned int pciid2;
+ /* 0x8000010c - BIST, Header type, Cache line size register */
+ volatile unsigned int pcibhlc;
+ /* 0x80000110 - Memory Base Address Register 1 */
+ volatile unsigned int mbar1;
+ /* 0x80000114 - Memory Base Address Register 2 */
+ volatile unsigned int mbar2;
+ /* 0x80000118 - IO Base Address Register 3 */
+ volatile unsigned int iobar3;
+ /* 0x8000011c - 0x80000128 */
+ volatile unsigned int dummy1[4];
+ /* 0x8000012c - Subsystem identification register */
+ volatile unsigned int pcisid;
+ /* 0x80000130 */
+ volatile unsigned int dummy2;
+ /* 0x80000134 - PCI capabilities pointer register */
+ volatile unsigned int pcicp;
+ /* 0x80000138 */
+ volatile unsigned int dummy3;
+ /* 0x8000013c - PCI latency interrupt register */
+ volatile unsigned int pcili;
+ /* 0x80000140 - PCI retry, trdy config */
+ volatile unsigned int pcirt;
+ /* 0x80000144 - PCI configuration write register */
+ volatile unsigned int pcicw;
+ /* 0x80000148 - PCI Initiator Start Address */
+ volatile unsigned int pcisa;
+ /* 0x8000014c - PCI Initiator Write Register */
+ volatile unsigned int pciiw;
+ /* 0x80000150 - PCI DMA configuration register */
+ volatile unsigned int pcidma;
+ /* 0x80000154 - PCI Initiator Status Register */
+ volatile unsigned int pciis;
+ /* 0x80000158 - PCI Initiator Configuration */
+ volatile unsigned int pciic;
+ /* 0x8000015c - PCI Target Page Address Register */
+ volatile unsigned int pcitpa;
+ /* 0x80000160 - PCI Target Status-Command Register */
+ volatile unsigned int pcitsc;
+ /* 0x80000164 - PCI Interrupt Enable Register */
+ volatile unsigned int pciite;
+ /* 0x80000168 - PCI Interrupt Pending Register */
+ volatile unsigned int pciitp;
+ /* 0x8000016c - PCI Interrupt Force Register */
+ volatile unsigned int pciitf;
+ /* 0x80000170 - PCI Data Register */
+ volatile unsigned int pcid;
+ /* 0x80000174 - PCI Burst End Register */
+ volatile unsigned int pcibe;
+ /* 0x80000178 - PCI DMA Address Register */
+ volatile unsigned int pcidmaa;
} AT697_PCI_Map;
AT697_PCI_Map *pcic = (AT697_PCI_Map *) 0x80000100;
@@ -107,7 +135,8 @@ struct pci_res {
*/
static int
-BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned int *val) {
+BSP_pci_read_config_dword(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned int *val) {
volatile unsigned int data;
@@ -131,14 +160,17 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char f
else
*val = data;
- DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
+ DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n",
+ bus, slot, function, offset,
+ (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
return PCIBIOS_SUCCESSFUL;
}
static int
-BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) {
+BSP_pci_read_config_word(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned short *val) {
unsigned int v;
if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -151,7 +183,8 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char fu
static int
-BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) {
+BSP_pci_read_config_byte(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned char *val) {
unsigned int v;
pci_read_config_dword(bus, slot, function, offset&~3, &v);
@@ -163,7 +196,8 @@ BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char fu
static int
-BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned int val) {
+BSP_pci_write_config_dword(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned int val) {
if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -182,14 +216,17 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
pcic->pciitp = 0xff; /* clear interrupts */
-/* DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), val); */
+/* DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n",
+ bus, slot, function, offset,
+ (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), val); */
return PCIBIOS_SUCCESSFUL;
}
static int
-BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) {
+BSP_pci_write_config_word(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned short val) {
unsigned int v;
if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -203,7 +240,8 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char f
static int
-BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) {
+BSP_pci_write_config_byte(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned char val) {
unsigned int v;
pci_read_config_dword(bus, slot, function, offset&~3, &v);
@@ -236,7 +274,8 @@ static void init_at697_pci(void) {
/* Reset */
pcic->pciic = 0xffffffff;
- /* Map system RAM at pci address 0x40000000 and system SDRAM to pci address 0x60000000 */
+ /* Map system RAM at pci address 0x40000000
+ and system SDRAM to pci address 0x60000000 */
pcic->mbar1 = 0x40000000;
pcic->mbar2 = 0x60000000;
pcic->pcitpa = 0x40006000;
@@ -247,7 +286,8 @@ static void init_at697_pci(void) {
/* Set latency timer to 64 */
pcic->pcibhlc = 0x00004000;
- /* Set Inititator configuration so that AHB slave accesses generate memory read/write commands */
+ /* Set Inititator configuration so that AHB slave accesses
+ generate memory read/write commands */
pcic->pciic = 0x41;
pcic->pciite = 0xff;
@@ -383,19 +423,23 @@ int dma_from_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
return 0;
}
-void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char function) {
+void pci_mem_enable(unsigned char bus, unsigned char slot,
+ unsigned char function) {
unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND,
+ data | PCI_COMMAND_MEMORY);
}
-void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char function) {
+void pci_master_enable(unsigned char bus, unsigned char slot,
+ unsigned char function) {
unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND,
+ data | PCI_COMMAND_MASTER);
}
@@ -409,18 +453,19 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) {
/* pci_allocate_resources
*
- * This function scans the bus and assigns PCI addresses to all devices. It handles both
- * single function and multi function devices. All allocated devices are enabled and
- * latency timers are set to 40.
+ * This function scans the bus and assigns PCI addresses to all devices. It
+ * handles both single function and multi function devices. All allocated
+ * devices are enabled and latency timers are set to 40.
*
- * NOTE that it only allocates PCI memory space devices. IO spaces are not enabled.
- * Also, it does not handle pci-pci bridges. They are left disabled.
+ * NOTE that it only allocates PCI memory space devices. IO spaces are
+ * not enabled. Also, it does not handle pci-pci bridges. They are left
+ * disabled.
*
- *
-*/
+ */
static void pci_allocate_resources(void) {
- unsigned int slot, numfuncs, func, id, pos, size, tmp, i, swapped, addr, dev, fn;
+ unsigned int slot, numfuncs, func, id, pos, size, tmp;
+ unsigned int i, swapped, addr, dev, fn;
unsigned char header;
struct pci_res **res;
@@ -445,7 +490,7 @@ static void pci_allocate_resources(void) {
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
- if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
+ if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
else {
@@ -466,11 +511,14 @@ static void pci_allocate_resources(void) {
}
for (pos = 0; pos < 6; pos++) {
- pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
- pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size);
+ pci_write_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
+ pci_read_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + (pos<<2), &size);
if (size == 0 || size == 0xffffffff || (size & 0xff) != 0) {
- pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0);
+ pci_write_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + (pos<<2), 0);
continue;
}
@@ -479,7 +527,8 @@ static void pci_allocate_resources(void) {
res[slot*8*6+func*6+pos]->devfn = slot*8 + func;
res[slot*8*6+func*6+pos]->bar = pos;
- DBG("Slot: %d, function: %d, bar%d size: %x\n", slot, func, pos, ~size+1);
+ DBG("Slot: %d, function: %d, bar%d size: %x\n",
+ slot, func, pos, ~size+1);
}
}
}
@@ -516,8 +565,10 @@ static void pci_allocate_resources(void) {
dev = res[i]->devfn >> 3;
fn = res[i]->devfn & 7;
- DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar);
- pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
+ DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n",
+ addr, dev, fn, res[i]->bar);
+ pci_write_config_dword(0, dev, fn,
+ PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
addr += res[i]->size;
/* Set latency timer to 64 */
@@ -538,7 +589,7 @@ done:
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
- if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
+ if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
else {
@@ -555,10 +606,12 @@ done:
if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue;
- printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
+ printk("\nSlot %d function: %d\nVendor id: 0x%x, "
+ "device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
for (pos = 0; pos < 6; pos++) {
- pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + pos*4, &tmp);
+ pci_read_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + pos*4, &tmp);
if (tmp != 0 && tmp != 0xffffffff && (tmp & 0xff) == 0) {
@@ -620,7 +673,7 @@ int init_pci(void)
0,
PCI_HEADER_TYPE,
&ucHeader);
- if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION) {
+ if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION) {
ucNumFuncs=PCI_MAX_FUNCTIONS;
}
else {
diff --git a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
index 9d70715..b439bcb 100644
--- a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
+++ b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
@@ -57,8 +57,8 @@ struct gpio_reg *gpio0, *gpio1;
/* static rtems_isr pci_interrupt_handler (rtems_vector_number v) { */
-/* volatile unsigned int *pci_int = (volatile unsigned int *) 0x80000168; */
-/* volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */
+/* volatile unsigned int *pci_int = (volatile unsigned int *) 0x80000168;*/
+/* volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000;*/
/* if (*pci_int & 0x20) { */
@@ -243,7 +243,8 @@ int rasta_register(void)
}
/* Search old PCI vendor/device id. */
- if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
+ if ( (!found) &&
+ (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
found = 1;
}
@@ -257,7 +258,7 @@ int rasta_register(void)
pci_read_config_dword(bus, dev, fun, 0x14, &bar1);
page0 = (unsigned int *)(bar0 + 0x400000);
- *page0 = 0x80000000; /* Point PAGE0 to start of APB */
+ *page0 = 0x80000000; /* Point PAGE0 to start of APB */
apb_base = (unsigned int *)(bar0+APB2_OFFSET);
@@ -279,7 +280,8 @@ int rasta_register(void)
irq = (struct irqmp_regs *) (bar0+IRQ_OFFSET);
irq->iclear = 0xffff;
irq->ilevel = 0;
- irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
+ irq->mask[0] = 0xffff &
+ ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
/* Configure AT697 ioport bit 7 to input pci irq */
regs->PIO_Direction &= ~(1<<7);
diff --git a/c/src/lib/libbsp/sparc/leon3/Makefile.am b/c/src/lib/libbsp/sparc/leon3/Makefile.am
index 71d54d5..789c3d0 100644
--- a/c/src/lib/libbsp/sparc/leon3/Makefile.am
+++ b/c/src/lib/libbsp/sparc/leon3/Makefile.am
@@ -35,7 +35,8 @@ libbsp_a_SOURCES =
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c ../../shared/bootcard.c startup/bspstart.c \
../../sparc/shared/bsppretaskinghook.c startup/bsppredriver.c \
- ../../sparc/shared/startup/bspgetworkarea.c ../../shared/sbrk.c startup/setvec.c \
+ ../../sparc/shared/startup/bspgetworkarea.c ../../shared/sbrk.c \
+ startup/setvec.c \
startup/spurious.c startup/bspidle.S startup/bspdelay.c \
../../shared/bspinit.c ../../sparc/shared/startup/early_malloc.c
libbsp_a_SOURCES += startup/bspreset.c
diff --git a/c/src/lib/libbsp/sparc/leon3/configure.ac b/c/src/lib/libbsp/sparc/leon3/configure.ac
index dbefd3e..fd3b0a4 100644
--- a/c/src/lib/libbsp/sparc/leon3/configure.ac
+++ b/c/src/lib/libbsp/sparc/leon3/configure.ac
@@ -1,7 +1,8 @@
## Process this file with autoconf to produce a configure script.
AC_PREREQ([2.69])
-AC_INIT([rtems-c-src-lib-libbsp-sparc-leon3],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_INIT([rtems-c-src-lib-libbsp-sparc-leon3],
+[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
@@ -23,8 +24,8 @@ AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"])
RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
[The leon3 console driver can operate in either polled or interrupt mode.
-Under the simulator (especially when FAST_UART is defined), polled seems to operate
-better.])
+Under the simulator (especially when FAST_UART is defined), polled seems
+to operate better.])
RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
diff --git a/c/src/lib/libbsp/sparc/leon3/include/bsp.h b/c/src/lib/libbsp/sparc/leon3/include/bsp.h
index eb2669e..6bbd6ed 100644
--- a/c/src/lib/libbsp/sparc/leon3/include/bsp.h
+++ b/c/src/lib/libbsp/sparc/leon3/include/bsp.h
@@ -80,11 +80,14 @@ extern int rtems_leon_greth_driver_attach(
);
#define RTEMS_BSP_NETWORK_DRIVER_NAME_OPENETH "open_eth1"
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH rtems_leon_open_eth_driver_attach
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \
+ rtems_leon_open_eth_driver_attach
#define RTEMS_BSP_NETWORK_DRIVER_NAME_SMC91111 "smc_eth1"
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 rtems_smc91111_driver_attach_leon3
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 \
+ rtems_smc91111_driver_attach_leon3
#define RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH "gr_eth1"
-#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_GRETH rtems_leon_greth_driver_attach
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_GRETH \
+ rtems_leon_greth_driver_attach
#ifndef RTEMS_BSP_NETWORK_DRIVER_NAME
#define RTEMS_BSP_NETWORK_DRIVER_NAME RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH
@@ -131,8 +134,8 @@ void bsp_spurious_initialize( void );
/* Allocate 8-byte aligned non-freeable pre-malloc() memory. The function
* can be called at any time. The work-area will shrink when called before
- * bsp_work_area_initialize(). malloc() is called to get memory when this function
- * is called after bsp_work_area_initialize().
+ * bsp_work_area_initialize(). malloc() is called to get memory when this
+ * function is called after bsp_work_area_initialize().
*/
void *bsp_early_malloc(int size);
diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h b/c/src/lib/libbsp/sparc/leon3/include/leon.h
index bda28f2..f1b987b 100644
--- a/c/src/lib/libbsp/sparc/leon3/include/leon.h
+++ b/c/src/lib/libbsp/sparc/leon3/include/leon.h
@@ -80,11 +80,11 @@ extern "C" {
*/
#define LEON_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */
- /* 0 = hold scalar and counter */
+ /* 0 = hold scalar and counter */
#define LEON_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */
- /* 0 = stop at 0 */
+ /* 0 = stop at 0 */
#define LEON_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */
- /* 0 = no function */
+ /* 0 = no function */
/*
* The following defines the bits in the UART Control Registers.
@@ -119,8 +119,10 @@ extern "C" {
#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
-extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs; /* LEON3 Interrupt Controller */
-extern volatile struct gptimer_regs *LEON3_Timer_Regs; /* LEON3 GP Timer */
+/* LEON3 Interrupt Controller */
+extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
+/* LEON3 GP Timer */
+extern volatile struct gptimer_regs *LEON3_Timer_Regs;
/* LEON3 CPU Index of boot CPU */
extern uint32_t LEON3_Cpu_Index;
@@ -270,7 +272,7 @@ extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
#if defined(RTEMS_MULTIPROCESSING)
#define LEON3_CLOCK_INDEX \
- (rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0)
+ (rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0)
#else
#define LEON3_CLOCK_INDEX 0
#endif
diff --git a/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c b/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c
index 5b903eb..a6b73d9 100644
--- a/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c
+++ b/c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c
@@ -74,7 +74,8 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
io->dir &= ~(1 << leon_scmv91111_configuration.pio);
/* Setup memory controller I/O waitstates */
- *((volatile unsigned int *) addr_mctrl) |= 0x10f80000; /* enable I/O area access */
+ *((volatile unsigned int *) addr_mctrl) |=
+ 0x10f80000; /* enable I/O area access */
return _rtems_smc91111_driver_attach(config, &leon_scmv91111_configuration);
};
diff --git a/c/src/lib/libbsp/sparc/leon3/pci/pci.c b/c/src/lib/libbsp/sparc/leon3/pci/pci.c
index b36b026..5e95cbc 100644
--- a/c/src/lib/libbsp/sparc/leon3/pci/pci.c
+++ b/c/src/lib/libbsp/sparc/leon3/pci/pci.c
@@ -49,27 +49,27 @@
/* allow for overriding these definitions */
#ifndef PCI_CONFIG_ADDR
-#define PCI_CONFIG_ADDR 0xcf8
+#define PCI_CONFIG_ADDR 0xcf8
#endif
#ifndef PCI_CONFIG_DATA
-#define PCI_CONFIG_DATA 0xcfc
+#define PCI_CONFIG_DATA 0xcfc
#endif
/* define a shortcut */
-#define pci BSP_pci_configuration
+#define pci BSP_pci_configuration
/*
* Bit encode for PCI_CONFIG_HEADER_TYPE register
*/
unsigned char ucMaxPCIBus;
typedef struct {
- volatile unsigned int cfg_stat;
- volatile unsigned int bar0;
- volatile unsigned int page0;
- volatile unsigned int bar1;
- volatile unsigned int page1;
- volatile unsigned int iomap;
- volatile unsigned int stat_cmd;
+ volatile unsigned int cfg_stat;
+ volatile unsigned int bar0;
+ volatile unsigned int page0;
+ volatile unsigned int bar1;
+ volatile unsigned int page1;
+ volatile unsigned int iomap;
+ volatile unsigned int stat_cmd;
} LEON3_GRPCI_Regs_Map;
LEON3_GRPCI_Regs_Map *pcic = (LEON3_GRPCI_Regs_Map *) PCI_ADDR;
@@ -83,7 +83,8 @@ struct pci_res {
static inline unsigned int flip_dword (unsigned int l)
{
- return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff);
+ return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) |
+ (((l>>16)&0xff)<<8)| ((l>>24)&0xff);
}
@@ -123,14 +124,17 @@ BSP_pci_read_config_dword(
*val = 0xffffffff;
}
- DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
+ DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n",
+ bus, slot, function, offset,
+ (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
return PCIBIOS_SUCCESSFUL;
}
static int
-BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) {
+BSP_pci_read_config_word(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned short *val) {
uint32_t v;
if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -143,7 +147,8 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char fu
static int
-BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) {
+BSP_pci_read_config_byte(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned char *val) {
uint32_t v;
pci_read_config_dword(bus, slot, function, offset&~3, &v);
@@ -155,7 +160,8 @@ BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char fu
static int
-BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, uint32_t val) {
+BSP_pci_write_config_dword(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, uint32_t val) {
volatile unsigned int *pci_conf;
unsigned int value;
@@ -174,14 +180,17 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
*pci_conf = value;
- DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value);
+ DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n",
+ bus, slot, function, offset,
+ (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value);
return PCIBIOS_SUCCESSFUL;
}
static int
-BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) {
+BSP_pci_write_config_word(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned short val) {
uint32_t v;
if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
@@ -195,7 +204,8 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char f
static int
-BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) {
+BSP_pci_write_config_byte(unsigned char bus, unsigned char slot,
+ unsigned char function, unsigned char offset, unsigned char val) {
uint32_t v;
pci_read_config_dword(bus, slot, function, offset&~3, &v);
@@ -234,10 +244,14 @@ static int init_grpci(void) {
#ifndef BT_ENABLED
pci_write_config_dword(0,0,0,0x10, 0xffffffff);
pci_read_config_dword(0,0,0,0x10, &addr);
- pci_write_config_dword(0,0,0,0x10, flip_dword(0x10000000)); /* Setup bar0 to nonzero value (grpci considers BAR==0 as invalid) */
- addr = (~flip_dword(addr)+1)>>1; /* page0 is accessed through upper half of bar0 */
- pcic->cfg_stat |= 0x10000000; /* Setup mmap reg so we can reach bar0 */
- page0[addr/4] = 0; /* Disable bytetwisting ... */
+ /* Setup bar0 to nonzero value (grpci considers BAR==0 as invalid) */
+ pci_write_config_dword(0,0,0,0x10, flip_dword(0x10000000));
+ /* page0 is accessed through upper half of bar0 */
+ addr = (~flip_dword(addr)+1)>>1;
+ /* Setup mmap reg so we can reach bar0 */
+ pcic->cfg_stat |= 0x10000000;
+ /* Disable bytetwisting ... */
+ page0[addr/4] = 0;
#endif
/* set 1:1 mapping between AHB -> PCI memory */
@@ -255,7 +269,8 @@ static int init_grpci(void) {
}
/* DMA functions which uses GRPCIs optional DMA controller (len in words) */
-int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) {
+int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr,
+ unsigned int len) {
int ret = 0;
pcidma[0] = 0x82;
@@ -276,7 +291,8 @@ int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) {
}
-int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) {
+int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr,
+ unsigned int len) {
int ret = 0;
pcidma[0] = 0x80;
@@ -298,19 +314,23 @@ int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len)
}
-void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char function) {
+void pci_mem_enable(unsigned char bus, unsigned char slot,
+ unsigned char function) {
uint32_t data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND,
+ data | PCI_COMMAND_MEMORY);
}
-void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char function) {
+void pci_master_enable(unsigned char bus, unsigned char slot,
+ unsigned char function) {
uint32_t data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
- pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
+ pci_write_config_dword(0, slot, function, PCI_COMMAND,
+ data | PCI_COMMAND_MASTER);
}
@@ -324,13 +344,13 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) {
/* pci_allocate_resources
*
- * This function scans the bus and assigns PCI addresses to all devices. It handles both
- * single function and multi function devices. All allocated devices are enabled and
- * latency timers are set to 40.
- *
- * NOTE that it only allocates PCI memory space devices (that are at least 1 KB).
- * IO spaces are not enabled. Also, it does not handle pci-pci bridges. They are left disabled.
+ * This function scans the bus and assigns PCI addresses to all devices.
+ * It handles both single function and multi function devices. All
+ * allocated devices are enabled and latency timers are set to 40.
*
+ * NOTE that it only allocates PCI memory space devices (that are at
+ * least 1 KB). IO spaces are not enabled. Also, it does not handle
+ * pci-pci bridges. They are left disabled.
*
*/
static void pci_allocate_resources(void) {
@@ -361,7 +381,7 @@ static void pci_allocate_resources(void) {
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
- if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
+ if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
else {
@@ -382,11 +402,14 @@ static void pci_allocate_resources(void) {
}
for (pos = 0; pos < 6; pos++) {
- pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
- pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size);
+ pci_write_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
+ pci_read_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + (pos<<2), &size);
if (size == 0 || size == 0xffffffff || (size & 0x3f1) != 0){
- pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0);
+ pci_write_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + (pos<<2), 0);
continue;
}else {
@@ -395,7 +418,8 @@ static void pci_allocate_resources(void) {
res[slot*8*6+func*6+pos]->devfn = slot*8 + func;
res[slot*8*6+func*6+pos]->bar = pos;
- DBG("Slot: %d, function: %d, bar%d size: %x\n", slot, func, pos, ~size+1);
+ DBG("Slot: %d, function: %d, bar%d size: %x\n",
+ slot, func, pos, ~size+1);
}
}
}
@@ -430,8 +454,10 @@ static void pci_allocate_resources(void) {
dev = res[i]->devfn >> 3;
fn = res[i]->devfn & 7;
- DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar);
- pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
+ DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n",
+ addr, dev, fn, res[i]->bar);
+ pci_write_config_dword(0, dev, fn,
+ PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
addr += res[i]->size;
/* Set latency timer to 64 */
@@ -452,7 +478,7 @@ done:
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
- if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
+ if(header & PCI_HEADER_TYPE_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS;
}
else {
@@ -469,10 +495,12 @@ done:
if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue;
- printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
+ printk("\nSlot %d function: %d\nVendor id: 0x%x, "
+ "device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
for (pos = 0; pos < 6; pos++) {
- pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + pos*4, &tmp);
+ pci_read_config_dword(0, slot, func,
+ PCI_BASE_ADDRESS_0 + pos*4, &tmp);
if (tmp != 0 && tmp != 0xffffffff && (tmp & 0x3f1) == 0) {
@@ -530,7 +558,7 @@ int init_pci(void)
0,
PCI_HEADER_TYPE,
&ucHeader);
- if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION) {
+ if(ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION) {
ucNumFuncs=PCI_MAX_FUNCTIONS;
}
else {
diff --git a/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c b/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c
index 6129933..52bc0fd 100644
--- a/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c
+++ b/c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c
@@ -72,6 +72,7 @@ void Shm_Get_configuration(
{
int i;
unsigned int tmp;
+ rtems_multiprocessing_table *mptable;
BSP_shm_cfgtbl.format = SHM_BIG;
@@ -97,8 +98,8 @@ void Shm_Get_configuration(
if (LEON3_Cpu_Index == 0) {
tmp = 0;
- for (i = 1;
- i < (rtems_configuration_get_user_multiprocessing_table())->maximum_nodes; i++)
+ mptable = rtems_configuration_get_user_multiprocessing_table();
+ for (i = 1; i < mptable->maximum_nodes; i++)
tmp |= (1 << i);
LEON3_IrqCtrl_Regs->mpstat = tmp;
}
--
1.7.9.5
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