[PATCH 2/8] Move Mongoose-V specific devices into BSP.

Joel Sherrill joel.sherrill at oarcorp.com
Thu Oct 9 19:50:17 UTC 2014


On 10/9/2014 2:47 PM, Gedare Bloom wrote:
> I didn't read this, but you should consider doing some style cleanup
> too (as a separate commit)
Noted.

FWIW I didn't change any code file contents except to note that a .h
file moved from libcpu/ to bsp/. 

The big problem here is that when we did the BSP, we thought the
Mongoose-V on-CPU IP modules might show up again. They haven't
and moving them makes it clear they were specific to this single case.

--joel
> On Thu, Oct 9, 2014 at 2:39 PM, Joel Sherrill <joel.sherrill at oarcorp.com> wrote:
>> Putting the duart in libcpu was very optimistic and presumptuous.
>> It has never been used again on another SoC and is BSP specific.
>> ---
>>  c/src/lib/libbsp/mips/genmongoosev/Makefile.am     |   7 +-
>>  c/src/lib/libbsp/mips/genmongoosev/README          |  54 +-
>>  .../libbsp/mips/genmongoosev/console/README.mguart | 100 +++
>>  .../lib/libbsp/mips/genmongoosev/console/conscfg.c |   2 +-
>>  .../lib/libbsp/mips/genmongoosev/console/mg5uart.c | 917 +++++++++++++++++++++
>>  .../lib/libbsp/mips/genmongoosev/console/mg5uart.h |  98 +++
>>  .../libbsp/mips/genmongoosev/console/mg5uart_reg.c |  58 ++
>>  c/src/lib/libbsp/mips/genmongoosev/include/bsp.h   |   2 +-
>>  .../libbsp/mips/genmongoosev/include/mongoose-v.h  | 306 +++++++
>>  .../lib/libbsp/mips/genmongoosev/irq/vectorisrs.c  |   2 +-
>>  c/src/lib/libbsp/mips/genmongoosev/preinstall.am   |  20 +
>>  .../libbsp/mips/genmongoosev/startup/bspstart.c    |   2 +-
>>  .../libbsp/mips/genmongoosev/startup/gdb-support.c |   2 +-
>>  c/src/lib/libcpu/mips/Makefile.am                  |  21 -
>>  .../lib/libcpu/mips/mongoosev/duart/README.mguart  | 101 ---
>>  c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.c    | 917 ---------------------
>>  c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h    |  98 ---
>>  .../lib/libcpu/mips/mongoosev/duart/mg5uart_reg.c  |  58 --
>>  .../lib/libcpu/mips/mongoosev/include/mongoose-v.h | 306 -------
>>  c/src/lib/libcpu/mips/preinstall.am                |  14 -
>>  20 files changed, 1562 insertions(+), 1523 deletions(-)
>>  create mode 100644 c/src/lib/libbsp/mips/genmongoosev/console/README.mguart
>>  create mode 100644 c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.c
>>  create mode 100644 c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.h
>>  create mode 100644 c/src/lib/libbsp/mips/genmongoosev/console/mg5uart_reg.c
>>  create mode 100644 c/src/lib/libbsp/mips/genmongoosev/include/mongoose-v.h
>>  delete mode 100644 c/src/lib/libcpu/mips/mongoosev/duart/README.mguart
>>  delete mode 100644 c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.c
>>  delete mode 100644 c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h
>>  delete mode 100644 c/src/lib/libcpu/mips/mongoosev/duart/mg5uart_reg.c
>>  delete mode 100644 c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h
>>
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/Makefile.am b/c/src/lib/libbsp/mips/genmongoosev/Makefile.am
>> index fe21df4..a99fd56 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/Makefile.am
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/Makefile.am
>> @@ -16,6 +16,11 @@ include_bsp_HEADERS += include/irq.h
>>
>>  nodist_include_HEADERS = include/bspopts.h
>>  nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
>> +nodist_include_bsp_HEADERS += include/lr33000.h
>> +nodist_include_bsp_HEADERS += include/lr333x0.h
>> +nodist_include_bsp_HEADERS += include/mongoose-v.h
>> +nodist_include_bsp_HEADERS += include/r3000.h
>> +nodist_include_bsp_HEADERS += console/mg5uart.h
>>  DISTCLEANFILES = include/bspopts.h
>>  noinst_PROGRAMS =
>>
>> @@ -47,6 +52,7 @@ libbsp_a_SOURCES += clock/clockdrv.c
>>  libbsp_a_SOURCES += ../../shared/clockdrv_shell.h
>>  # console
>>  libbsp_a_SOURCES += console/conscfg.c
>> +libbsp_a_SOURCES += console/mg5uart.c
>>  libbsp_a_SOURCES += ../../shared/console.c
>>  libbsp_a_SOURCES += ../../shared/console_select.c
>>  libbsp_a_SOURCES += ../../shared/console_control.c
>> @@ -75,7 +81,6 @@ gdbstub_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
>>
>>  libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
>>  libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
>> -libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/mongoosev/duart.rel
>>
>>  include $(srcdir)/preinstall.am
>>  include $(top_srcdir)/../../../../automake/local.am
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/README b/c/src/lib/libbsp/mips/genmongoosev/README
>> index 97db696..87f57a9 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/README
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/README
>> @@ -1,6 +1,56 @@
>>  BSP supporting the on-CPU capabilities of the Synova Mongoose-V.
>> -This BSP assumes that basic HW initialization is performed by
>> -PMON.
>> +The Synova Mongoose-V is a radiation hardened derivative of the
>> +LSI 33K with on-CPU peripherals.
>> +
>> +This BSP assumes that basic HW initialization is performed by PMON.
>> +
>> +Status
>> +======
>> +Per-task floating point enable/disable is supported for both immediate
>> +and deferred FPU context swaps.
>> +
>> +Interrupt Levels are adapted reasonably well to the MIPS interrupt
>> +model. Bit 0 of the int level is a global enable/disable, corresponding
>> +to bit 0 of the processor's SR register.  Bits 1 thru 6 are configured
>> +as masks for the Int0 thru Int5 interrupts.  The 2 software interrupt
>> +bits are always enabled by default.  Each task maintains its own
>> +Interrupt Level setting, reconfiguring the SR register's interrupt bits
>> +whenever scheduled in.  The software ints, though not addressable via
>> +the various Interrupt Level functions, are maintained on a per-task
>> +basis, so if software manipulates them directly, things should behave as
>> +expected.  At the time of these udpates, the Interrupt Level was only 8
>> +bits, and completely supporting the global enable, software ints and the
>> +hardware ints would require 9 bits.  When more than 8 bits are
>> +available, there is no reason the software interrupts could not be added
>> +to the Interrupt Level.
>> +
>> +While supporting the Int0 thru Int5 bits in this way doesn't seem
>> +wonderfully useful, it does increase the level of compliance with the
>> +RTEMS spec.
>> +
>> +Interrupt Level 0 corresponds to interrupts globally enabled, software
>> +ints enabled and Int0 thru Int5 enabled.  If values other than 0 are
>> +supplied, they should be formulated to impose the desired bitmask.
>> +Interrupt priority is not a strong concept on this bsp, it is provided
>> +only by the order in which interrupts are checked.
>> +
>> +If during the vectoring of an interrupt, others arrive, they will all be
>> +processed in accordance with their ordering in SR & the peripheral
>> +register.  For example, if while we're vectoring Int4, Int3 and Int5 are
>> +asserted, Int3 will be serviced before Int5.  The peripheral interrupts
>> +are individually vectored as a consequence of Int5 being asserted,
>> +however Int5 is not itself vectored.  Within the set of peripheral
>> +interrupts, bit 0 is vectored first, 31 is last.
>> +
>> +Interrupts are not nested for MIPS1 or MIPS3 processors, but are
>> +processed serially as possible.  On an unloaded 50 task RTEMS program,
>> +runnning on a 12mhz MIPS1 processor, worst-case latencies of 100us were
>> +observed, the average being down at 60us or below.
>> +
>> +
>> +These features are principally a consequence of fixes and tweaks to the
>> +MIPS1 and MIPS3 processor support, and should be equally effective on
>> +both levels of MIPS processors for any of their bsp's.
>>
>>  Address Map
>>  ===========
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/console/README.mguart b/c/src/lib/libbsp/mips/genmongoosev/console/README.mguart
>> new file mode 100644
>> index 0000000..7c6a290
>> --- /dev/null
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/console/README.mguart
>> @@ -0,0 +1,100 @@
>> +Configuration Table Use
>> +=======================
>> +
>> +sDeviceName
>> +
>> +   The name of this device.
>> +
>> +deviceType
>> +
>> +   This field must be SERIAL_MG5UART.
>> +
>> +pDeviceFns
>> +
>> +   The device interface control table.  This may be:
>> +      + mg5uart_fns for interrupt driven IO
>> +      + mg5uart_fns_polled for polled IO
>> +
>> +deviceProbe
>> +
>> +   This is the address of the routine which probes to see if the device
>> +   is present.
>> +
>> +pDeviceFlow
>> +
>> +   This field is ignored as hardware flow control is not currently supported.
>> +
>> +ulMargin
>> +
>> +    This is currently unused.
>> +
>> +ulHysteresis
>> +
>> +    This is currently unused.
>> +
>> +pDeviceParams
>> +
>> +    This is set to the default settings.
>> +
>> +ulCtrlPort1
>> +
>> +   This field is the address of the command register shared by both ports.
>> +
>> +ulCtrlPort2
>> +
>> +   This field is the address of the port being used.
>> +
>> +ulDataPort
>> +
>> +   This field is set to MG5UART_PORTA or MG5UART_PORTB.
>> +
>> +getRegister
>> +setRegister
>> +
>> +   These do NOT follow standard conventions and are ignored.
>> +   The register address routines are hard-coded as this is
>> +   an on-CPU part and assumed to provide a 32-bit wide interface.
>> +
>> +getData
>> +
>> +   This is address of the RX buffer register.
>> +
>> +setData
>> +
>> +   This is address of the TX buffer register.
>> +
>> +ulClock
>> +
>> +   baudRate Clock
>> +
>> +ulIntVector
>> +
>> +   This is the interrupt vector number associated with this chip.
>> +
>> +Example:
>> +
>> +#if (CONSOLE_USE_INTERRUPTS)
>> +#define MG5UART_FUNCTIONS &mg5uart_fns
>> +#else
>> +#define MG5UART_FUNCTIONS &mg5uart_fns_polled
>> +#endif
>> +
>> +{
>> +  "/dev/com0",                            /* sDeviceName */
>> +  SERIAL_MG5UART,                         /* deviceType */
>> +  MG5UART_FUNCTIONS,                      /* pDeviceFns */
>> +  NULL,                                   /* deviceProbe, assume it is there */
>> +  NULL,                                   /* pDeviceFlow */
>> +  16,                                     /* ulMargin */
>> +  8,                                      /* ulHysteresis */
>> +  (void *) NULL,               /* NULL */ /* pDeviceParams */
>> +  MONGOOSEV_PERIPHERAL_COMMAND_REGISTER,  /* ulCtrlPort1 */
>> +  MONGOOSEV_UART0_BASE,                   /* ulCtrlPort2 */
>> +  MG5UART_UART0,                          /* ulDataPort */
>> +  mg5uart_get_register,                   /* getRegister */
>> +  mg5uart_set_register,                   /* setRegister */
>> +  NULL, /* unused */                      /* getData */
>> +  NULL, /* unused */                      /* setData */
>> +  12000000,                               /* ulClock */
>> +  MONGOOSEV_IRQ_UART0_RX_FRAME_ERROR      /* ulIntVector -- base for port */
>> +}
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c b/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c
>> index 61ac56e..87df736 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/console/conscfg.c
>> @@ -21,7 +21,7 @@
>>  #include <bsp/irq.h>
>>
>>  #include <libchip/serial.h>
>> -#include <libchip/mg5uart.h>
>> +#include <bsp/mg5uart.h>
>>
>>  /* #define CONSOLE_USE_INTERRUPTS */
>>
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.c b/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.c
>> new file mode 100644
>> index 0000000..8c4177a
>> --- /dev/null
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.c
>> @@ -0,0 +1,917 @@
>> +/**
>> + *  @file
>> + *
>> + *  This file contains the termios TTY driver for the UART found
>> + *  on the Synova Mongoose-V.
>> + */
>> +
>> +/*
>> + *  COPYRIGHT (c) 1989-2012.
>> + *  On-Line Applications Research Corporation (OAR).
>> + *
>> + *  The license and distribution terms for this file may be
>> + *  found in the file LICENSE in this distribution or at
>> + *  http://www.rtems.org/license/LICENSE.
>> + */
>> +
>> +#include <rtems.h>
>> +#include <rtems/libio.h>
>> +#include <rtems/score/sysstate.h>
>> +#include <stdlib.h>
>> +
>> +#include <libchip/serial.h>
>> +#include <libchip/sersupp.h>
>> +#include <bsp/mg5uart.h>
>> +#include <bsp/mongoose-v.h>
>> +
>> +#include <bsp/irq.h>
>> +#include <bsp.h>
>> +
>> +/*
>> + *  Indices of registers
>> + */
>> +
>> +/*
>> + *  Per chip context control
>> + */
>> +
>> +typedef struct _mg5uart_context
>> +{
>> +  int            mate;
>> +} mg5uart_context;
>> +
>> +/*
>> + *  Define MG5UART_STATIC to nothing while debugging so the entry points
>> + *  will show up in the symbol table.
>> + */
>> +
>> +#define MG5UART_STATIC
>> +
>> +/* #define MG5UART_STATIC static */
>> +
>> +
>> +
>> +#define MG5UART_SETREG( _base, _register, _value ) \
>> +        MONGOOSEV_WRITE_REGISTER( _base, _register, _value )
>> +
>> +#define MG5UART_GETREG( _base, _register ) \
>> +        MONGOOSEV_READ_REGISTER( _base, _register )
>> +
>> +
>> +/*
>> + *  Console Device Driver Support Functions
>> + */
>> +
>> +MG5UART_STATIC int mg5uart_baud_rate(
>> +  int        minor,
>> +  uint32_t   baud,
>> +  uint32_t  *code
>> +);
>> +
>> +MG5UART_STATIC void mg5uart_enable_interrupts(
>> +  int minor,
>> +  int mask
>> +);
>> +
>> +/*
>> + *  mg5uart_isr_XXX
>> + *
>> + *  This is the single interrupt entry point which parcels interrupts
>> + *  out to the handlers for specific sources and makes sure that the
>> + *  shared handler gets the right arguments.
>> + *
>> + *  NOTE: Yes .. this is ugly but it provides 5 interrupt source
>> + *  wrappers which are nearly functionally identical.
>> + */
>> +
>> +
>> +extern void mips_default_isr(int vector);
>> +
>> +#define __ISR(_TYPE, _OFFSET) \
>> +  MG5UART_STATIC void mg5uart_process_isr_ ## _TYPE ( \
>> +    int  minor \
>> +  ); \
>> +  \
>> +  MG5UART_STATIC rtems_isr mg5uart_isr_ ## _TYPE ( \
>> +    void *arg \
>> +  ) \
>> +  { \
>> +    rtems_vector_number vector = (rtems_vector_number) arg; \
>> +    int   minor; \
>> +    \
>> +    for(minor=0 ; minor<Console_Port_Count ; minor++) { \
>> +      if( Console_Port_Tbl[minor]->deviceType == SERIAL_MG5UART && \
>> +          vector == Console_Port_Tbl[minor]->ulIntVector + _OFFSET ) { \
>> +        mg5uart_process_isr_ ## _TYPE (minor); \
>> +       return; \
>> +      } \
>> +    } \
>> +    mips_default_isr( vector ); \
>> +  }
>> +
>> +__ISR(rx_frame_error, MG5UART_IRQ_RX_FRAME_ERROR)
>> +__ISR(rx_overrun_error, MG5UART_IRQ_RX_OVERRUN_ERROR)
>> +__ISR(tx_empty, MG5UART_IRQ_TX_EMPTY)
>> +__ISR(tx_ready, MG5UART_IRQ_TX_READY)
>> +__ISR(rx_ready, MG5UART_IRQ_RX_READY)
>> +
>> +/*
>> + *  mg5uart_set_attributes
>> + *
>> + *  This function sets the UART channel to reflect the requested termios
>> + *  port settings.
>> + */
>> +
>> +MG5UART_STATIC int mg5uart_set_attributes(
>> +  int minor,
>> +  const struct termios *t
>> +)
>> +{
>> +  uint32_t               pMG5UART_port;
>> +  uint32_t               pMG5UART;
>> +  uint32_t               cmd, cmdSave;
>> +  uint32_t               baudcmd;
>> +  uint32_t               shift;
>> +  rtems_interrupt_level  Irql;
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  /*
>> +   *  Set the baud rate
>> +   */
>> +
>> +  if (mg5uart_baud_rate( minor, t->c_cflag, &baudcmd ) == -1)
>> +    return -1;
>> +
>> +  /*
>> +   *  Base settings
>> +   */
>> +
>> +  /*
>> +   *  Base settings
>> +   */
>> +
>> +  cmd = MONGOOSEV_UART_CMD_RX_ENABLE | MONGOOSEV_UART_CMD_TX_ENABLE;
>> +
>> +  /*
>> +   *  Parity
>> +   */
>> +
>> +  if (t->c_cflag & PARENB) {
>> +    cmd |= MONGOOSEV_UART_CMD_PARITY_ENABLE;
>> +    if (t->c_cflag & PARODD)
>> +      cmd |= MONGOOSEV_UART_CMD_PARITY_ODD;
>> +    else
>> +      cmd |= MONGOOSEV_UART_CMD_PARITY_EVEN;
>> +  } else {
>> +    cmd |= MONGOOSEV_UART_CMD_PARITY_DISABLE;
>> +  }
>> +
>> +  /*
>> +   *  Character Size
>> +   */
>> +
>> +  if (t->c_cflag & CSIZE) {
>> +    switch (t->c_cflag & CSIZE) {
>> +      case CS5:
>> +      case CS6:
>> +      case CS7:
>> +        return -1;
>> +        break;
>> +      case CS8:
>> +        /* Mongoose-V only supports CS8 */
>> +        break;
>> +
>> +    }
>> +  } /* else default to CS8 */
>> +
>> +  /*
>> +   *  Stop Bits
>> +   */
>> +
>> +#if 0
>> +  if (t->c_cflag & CSTOPB) {
>> +    /* 2 stop bits not supported by Mongoose-V uart */
>> +    return -1;
>> +  }
>> +#endif
>> +
>> +  /*
>> +   *  XXX what about CTS/RTS
>> +   */
>> +
>> +  /* XXX */
>> +
>> +  /*
>> +   *  Now write the registers
>> +   */
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +    shift = MONGOOSEV_UART0_CMD_SHIFT;
>> +  else
>> +    shift = MONGOOSEV_UART1_CMD_SHIFT;
>> +
>> +
>> +
>> +  rtems_interrupt_disable(Irql);
>> +
>> +  cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER );
>> +
>> +  MG5UART_SETREG( pMG5UART,
>> +                 MG5UART_COMMAND_REGISTER,
>> +                 (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) );
>> +
>> +  MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd );
>> +
>> +  rtems_interrupt_enable(Irql);
>> +  return 0;
>> +}
>> +
>> +/*
>> + *  mg5uart_initialize_context
>> + *
>> + *  This function sets the default values of the per port context structure.
>> + */
>> +
>> +MG5UART_STATIC void mg5uart_initialize_context(
>> +  int               minor,
>> +  mg5uart_context  *pmg5uartContext
>> +)
>> +{
>> +  int          port;
>> +  unsigned int pMG5UART;
>> +  unsigned int pMG5UART_port;
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  pmg5uartContext->mate = -1;
>> +
>> +  for (port=0 ; port<Console_Port_Count ; port++ ) {
>> +    if ( Console_Port_Tbl[port]->ulCtrlPort1 == pMG5UART &&
>> +         Console_Port_Tbl[port]->ulCtrlPort2 != pMG5UART_port ) {
>> +      pmg5uartContext->mate = port;
>> +      break;
>> +    }
>> +  }
>> +
>> +}
>> +
>> +/*
>> + *  mg5uart_init
>> + *
>> + *  This function initializes the DUART to a quiecsent state.
>> + */
>> +
>> +MG5UART_STATIC void mg5uart_init(int minor)
>> +{
>> +  uint32_t              pMG5UART_port;
>> +  uint32_t              pMG5UART;
>> +  uint32_t             cmdSave;
>> +  uint32_t             shift;
>> +
>> +  mg5uart_context        *pmg5uartContext;
>> +
>> +  pmg5uartContext = (mg5uart_context *) malloc(sizeof(mg5uart_context));
>> +
>> +  Console_Port_Data[minor].pDeviceContext = (void *)pmg5uartContext;
>> +
>> +  mg5uart_initialize_context( minor, pmg5uartContext );
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +     shift = MONGOOSEV_UART0_CMD_SHIFT;
>> +  else
>> +     shift = MONGOOSEV_UART1_CMD_SHIFT;
>> +
>> +  /*
>> +   *  Disable the uart and leave this port disabled.
>> +   */
>> +
>> +  cmdSave = MG5UART_GETREG(pMG5UART, MG5UART_COMMAND_REGISTER) & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift);
>> +
>> +  MG5UART_SETREG( pMG5UART, MG5UART_COMMAND_REGISTER, cmdSave );
>> +
>> +  /*
>> +   *  Disable interrupts on RX and TX for this port
>> +   */
>> +  mg5uart_enable_interrupts( minor, MG5UART_DISABLE_ALL );
>> +}
>> +
>> +/*
>> + *  mg5uart_open
>> + *
>> + *  This function opens a port for communication.
>> + *
>> + *  Default state is 9600 baud, 8 bits, No parity, and 1 stop bit.
>> + */
>> +
>> +MG5UART_STATIC int mg5uart_open(
>> +  int      major,
>> +  int      minor,
>> +  void    *arg
>> +)
>> +{
>> +  uint32_t      pMG5UART;
>> +  uint32_t      pMG5UART_port;
>> +  uint32_t     vector;
>> +  uint32_t      cmd, cmdSave;
>> +  uint32_t      baudcmd;
>> +  uint32_t      shift;
>> +
>> +  rtems_interrupt_level  Irql;
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +  vector        = Console_Port_Tbl[minor]->ulIntVector;
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +    shift = MONGOOSEV_UART0_CMD_SHIFT;
>> +  else
>> +    shift = MONGOOSEV_UART1_CMD_SHIFT;
>> +
>> +
>> +  /* XXX default baud rate could be from configuration table */
>> +
>> +  (void) mg5uart_baud_rate( minor, B19200, &baudcmd );
>> +
>> +  /*
>> +   *  Set the DUART channel to a default useable state
>> +   *  B19200, 8Nx since there is no stop bit control.
>> +   */
>> +
>> +  cmd = MONGOOSEV_UART_CMD_TX_ENABLE | MONGOOSEV_UART_CMD_RX_ENABLE;
>> +
>> +  rtems_interrupt_disable(Irql);
>> +
>> +  cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER );
>> +
>> +  MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd );
>> +
>> +  MG5UART_SETREG( pMG5UART,
>> +                 MG5UART_COMMAND_REGISTER,
>> +                 cmd = (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) );
>> +
>> +  rtems_interrupt_enable(Irql);
>> +
>> +  return RTEMS_SUCCESSFUL;
>> +}
>> +
>> +/*
>> + *  mg5uart_close
>> + *
>> + *  This function shuts down the requested port.
>> + */
>> +
>> +MG5UART_STATIC int mg5uart_close(
>> +  int      major,
>> +  int      minor,
>> +  void    *arg
>> +)
>> +{
>> +  uint32_t      pMG5UART;
>> +  uint32_t      pMG5UART_port;
>> +  uint32_t     cmd, cmdSave;
>> +  uint32_t      shift;
>> +  rtems_interrupt_level  Irql;
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  /*
>> +   *  Disable interrupts from this channel and then disable it totally.
>> +   */
>> +
>> +  /* XXX interrupts */
>> +
>> +  cmd = MONGOOSEV_UART_CMD_TX_DISABLE | MONGOOSEV_UART_CMD_RX_DISABLE;
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +    shift = MONGOOSEV_UART0_CMD_SHIFT;
>> +  else
>> +    shift = MONGOOSEV_UART1_CMD_SHIFT;
>> +
>> +
>> +  rtems_interrupt_disable(Irql);
>> +  cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER );
>> +
>> +  MG5UART_SETREG( pMG5UART,
>> +                 MG5UART_COMMAND_REGISTER,
>> +                 (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) );
>> +  rtems_interrupt_enable(Irql);
>> +
>> +  return(RTEMS_SUCCESSFUL);
>> +}
>> +
>> +
>> +
>> +
>> +/*
>> + *  mg5uart_write_polled
>> + *
>> + *  This routine polls out the requested character.
>> + */
>> +
>> +MG5UART_STATIC void mg5uart_write_polled(
>> +  int   minor,
>> +  char  c
>> +)
>> +{
>> +  uint32_t                pMG5UART;
>> +  uint32_t                pMG5UART_port;
>> +  uint32_t                status;
>> +  int                     shift;
>> +  int                     timeout;
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> +  else
>> +    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> +
>> +  /*
>> +   * wait for transmitter holding register to be empty
>> +   */
>> +  timeout = 2000;
>> +
>> +  while( --timeout )
>> +  {
>> +    status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift;
>> +
>> +    /*
>> +    if ( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) ==
>> +            (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY) )
>> +      break;
>> +    */
>> +
>> +    if( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) )
>> +       break;
>> +
>> +    /*
>> +     * Yield while we wait
>> +     */
>> +
>> +#if 0
>> +     if(_System_state_Is_up(_System_state_Get()))
>> +     {
>> +       rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
>> +     }
>> +#endif
>> +  }
>> +
>> +  /*
>> +   * transmit character
>> +   */
>> +
>> +  MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, c);
>> +}
>> +
>> +MG5UART_STATIC void mg5uart_process_isr_rx_error(
>> +   int  minor,
>> +   uint32_t   mask
>> +)
>> +{
>> +  uint32_t                pMG5UART;
>> +  int                     shift;
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> +  else
>> +    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> +
>> +  /* now clear the error */
>> +
>> +  MG5UART_SETREG(
>> +     pMG5UART,
>> +     MG5UART_STATUS_REGISTER,
>> +     mask << shift );
>> +}
>> +
>> +
>> +MG5UART_STATIC void mg5uart_process_isr_rx_frame_error(
>> +  int  minor
>> +)
>> +{
>> +   mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_FRAME_ERROR );
>> +}
>> +
>> +MG5UART_STATIC void mg5uart_process_isr_rx_overrun_error(
>> +  int  minor
>> +)
>> +{
>> +   mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_OVERRUN_ERROR );
>> +}
>> +
>> +
>> +
>> +
>> +
>> +
>> +
>> +
>> +MG5UART_STATIC void mg5uart_process_tx_isr(
>> +   int        minor,
>> +   uint32_t   source
>> +)
>> +{
>> +   uint32_t        pMG5UART;
>> +   int             shift;
>> +
>> +   pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +
>> +   mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX);
>> +
>> +   if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +      shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> +   else
>> +      shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> +
>> +   MG5UART_SETREG(
>> +      pMG5UART,
>> +      MG5UART_STATUS_REGISTER,
>> +      source << shift );
>> +
>> +   if( rtems_termios_dequeue_characters( Console_Port_Data[minor].termios_data, 1) )
>> +   {
>> +      mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL);
>> +      return;
>> +   }
>> +
>> +   /*
>> +    *  There are no more characters to transmit.  The tx interrupts are be cleared
>> +    *  by writing data to the uart, so just disable the tx interrupt sources.
>> +    */
>> +
>> +   Console_Port_Data[minor].bActive = FALSE;
>> +
>> +   /* mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); */
>> +}
>> +
>> +
>> +
>> +MG5UART_STATIC void mg5uart_process_isr_tx_empty(
>> +  int  minor
>> +)
>> +{
>> +   /* mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_EMPTY ); */
>> +}
>> +
>> +MG5UART_STATIC void mg5uart_process_isr_tx_ready(
>> +  int  minor
>> +)
>> +{
>> +   mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_READY );
>> +}
>> +
>> +
>> +
>> +
>> +
>> +MG5UART_STATIC void mg5uart_process_isr_rx_ready(
>> +  int  minor
>> +)
>> +{
>> +  uint32_t   pMG5UART_port;
>> +  char       c;
>> +
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  /* reading the RX buffer automatically resets the interrupt flag */
>> +
>> +  c = (char) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER);
>> +
>> +  rtems_termios_enqueue_raw_characters(
>> +     Console_Port_Data[minor].termios_data,
>> +     &c, 1 );
>> +}
>> +
>> +static rtems_irq_connect_data mg5uart_rx_frame_error_cd  = {  \
>> +  0,                             /* filled in at initialization */
>> +  mg5uart_isr_rx_frame_error,   /* filled in at initialization */
>> +  NULL,   /* (void *) minor */
>> +  NULL,
>> +  NULL,
>> +  NULL
>> +};
>> +
>> +static rtems_irq_connect_data mg5uart_rx_overrun_error_cd  = {  \
>> +  0,                             /* filled in at initialization */
>> +  mg5uart_isr_rx_overrun_error,   /* filled in at initialization */
>> +  NULL,   /* (void *) minor */
>> +  NULL,
>> +  NULL,
>> +  NULL
>> +};
>> +
>> +static rtems_irq_connect_data mg5uart_tx_empty_cd  = {  \
>> +  0,                             /* filled in at initialization */
>> +  mg5uart_isr_tx_empty,   /* filled in at initialization */
>> +  NULL,   /* (void *) minor */
>> +  NULL,
>> +  NULL,
>> +  NULL
>> +};
>> +
>> +static rtems_irq_connect_data mg5uart_tx_ready_cd  = {  \
>> +  0,                             /* filled in at initialization */
>> +  mg5uart_isr_tx_ready,   /* filled in at initialization */
>> +  NULL,   /* (void *) minor */
>> +  NULL,
>> +  NULL,
>> +  NULL
>> +};
>> +
>> +static rtems_irq_connect_data mg5uart_rx_ready_cd  = {  \
>> +  0,                             /* filled in at initialization */
>> +  mg5uart_isr_rx_ready,   /* filled in at initialization */
>> +  NULL,   /* (void *) minor */
>> +  NULL,
>> +  NULL,
>> +  NULL
>> +};
>> +
>> +
>> +/*
>> + *  mg5uart_initialize_interrupts
>> + *
>> + *  This routine initializes the console's receive and transmit
>> + *  ring buffers and loads the appropriate vectors to handle the interrupts.
>> + */
>> +
>> +MG5UART_STATIC void mg5uart_initialize_interrupts(int minor)
>> +{
>> +  unsigned long v;
>> +  mg5uart_init(minor);
>> +
>> +  Console_Port_Data[minor].bActive = FALSE;
>> +  v = Console_Port_Tbl[minor]->ulIntVector;
>> +
>> +  mg5uart_rx_frame_error_cd.name    =  v + MG5UART_IRQ_RX_FRAME_ERROR;
>> +  mg5uart_rx_overrun_error_cd.name  =  v + MG5UART_IRQ_RX_OVERRUN_ERROR;
>> +  mg5uart_tx_empty_cd.name          =  v + MG5UART_IRQ_TX_EMPTY;
>> +  mg5uart_tx_ready_cd.name          =  v + MG5UART_IRQ_TX_READY;
>> +  mg5uart_rx_ready_cd.name          =  v + MG5UART_IRQ_RX_READY;
>> +
>> +  mg5uart_rx_frame_error_cd.handle    =  (void *)mg5uart_rx_frame_error_cd.name;
>> +  mg5uart_rx_overrun_error_cd.handle  =  (void *)mg5uart_rx_overrun_error_cd.name;
>> +  mg5uart_tx_empty_cd.handle          =  (void *)mg5uart_tx_empty_cd.name;
>> +  mg5uart_tx_ready_cd.handle          =  (void *)mg5uart_tx_ready_cd.name;
>> +  mg5uart_rx_ready_cd.handle          =  (void *)mg5uart_rx_ready_cd.name;
>> +
>> +
>> +  BSP_install_rtems_irq_handler( &mg5uart_rx_frame_error_cd );
>> +  BSP_install_rtems_irq_handler( &mg5uart_rx_overrun_error_cd );
>> +  BSP_install_rtems_irq_handler( &mg5uart_tx_empty_cd );
>> +  BSP_install_rtems_irq_handler( &mg5uart_tx_ready_cd );
>> +  BSP_install_rtems_irq_handler( &mg5uart_rx_ready_cd );
>> +
>> +  mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX);
>> +}
>> +
>> +/*
>> + *  mg5uart_write_support_int
>> + *
>> + *  Console Termios output entry point when using interrupt driven output.
>> + */
>> +
>> +MG5UART_STATIC int mg5uart_write_support_int(
>> +  int         minor,
>> +  const char *buf,
>> +  size_t      len
>> +)
>> +{
>> +  uint32_t        pMG5UART_port;
>> +
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  /*
>> +   *  We are using interrupt driven output and termios only sends us
>> +   *  one character at a time.
>> +   */
>> +
>> +  if ( !len )
>> +     return 0;
>> +
>> +  /*
>> +   *  Put the character out and enable interrupts if necessary.
>> +   */
>> +
>> +  MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, *buf);
>> +
>> +  if( Console_Port_Data[minor].bActive == FALSE )
>> +  {
>> +     Console_Port_Data[minor].bActive = TRUE;
>> +     mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL);
>> +  }
>> +
>> +  return 1;
>> +}
>> +
>> +
>> +
>> +
>> +/*
>> + *  mg5uart_write_support_polled
>> + *
>> + *  Console Termios output entry point when using polled output.
>> + *
>> + */
>> +
>> +MG5UART_STATIC ssize_t mg5uart_write_support_polled(
>> +  int         minor,
>> +  const char *buf,
>> +  size_t      len
>> +)
>> +{
>> +  int nwrite = 0;
>> +
>> +  /*
>> +   * poll each byte in the string out of the port.
>> +   */
>> +  while (nwrite < len)
>> +  {
>> +    mg5uart_write_polled(minor, *buf++);
>> +    nwrite++;
>> +  }
>> +
>> +  /*
>> +   * return the number of bytes written.
>> +   */
>> +  return nwrite;
>> +}
>> +
>> +/*
>> + *  mg5uart_inbyte_nonblocking_polled
>> + *
>> + *  Console Termios polling input entry point.
>> + */
>> +
>> +MG5UART_STATIC int mg5uart_inbyte_nonblocking_polled(
>> +  int minor
>> +)
>> +{
>> +  uint32_t                pMG5UART;
>> +  uint32_t                pMG5UART_port;
>> +  uint32_t                status;
>> +  uint32_t                tmp,shift;
>> +
>> +  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> +  else
>> +    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> +
>> +  /* reset overrrun or framing errors */
>> +  status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift;
>> +
>> +  if( (tmp = (status & 0x3)) )
>> +  {
>> +     MG5UART_SETREG(pMG5UART, MG5UART_STATUS_REGISTER, (tmp << shift) );
>> +     status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift;
>> +  }
>> +
>> +  if ( status & MONGOOSEV_UART_RX_READY )
>> +  {
>> +     return (int) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER);
>> +  }
>> +  else
>> +  {
>> +     return -1;
>> +  }
>> +}
>> +
>> +/*
>> + *  mg5uart_baud_rate
>> + */
>> +
>> +MG5UART_STATIC int mg5uart_baud_rate(
>> +  int           minor,
>> +  uint32_t      baud,
>> +  uint32_t     *code
>> +)
>> +{
>> +  uint32_t   clock;
>> +  uint32_t   tmp_code;
>> +  uint32_t   baud_requested;
>> +
>> +  baud_requested = baud & CBAUD;
>> +  if (!baud_requested)
>> +    baud_requested = B9600;              /* default to 9600 baud */
>> +
>> +  baud_requested = rtems_termios_baud_to_number( baud_requested );
>> +
>> +  clock = (uint32_t) Console_Port_Tbl[minor]->ulClock;
>> +  if (!clock)
>> +    rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER);
>> +
>> +  /*
>> +   *  Formula is Code = round(ClockFrequency / Baud - 1).
>> +   *
>> +   *  Since this is integer math, we will divide by twice the baud and
>> +   *  check the remaining odd bit.
>> +   */
>> +
>> +  tmp_code = (clock / baud_requested) - 1;
>> +
>> +  /*
>> +   *  From section 12.7, "Keep C>100 for best receiver operation."
>> +   *  That is 100 cycles which is not a lot of instructions.  It is
>> +   *  reasonable to think that the Mongoose-V could not keep
>> +   *  up with C < 100.
>> +   */
>> +
>> +  if ( tmp_code < 100 )
>> +    return RTEMS_INVALID_NUMBER;
>> +
>> +  /*
>> +   *  upper word is receiver baud and lower word is transmitter baud
>> +   */
>> +
>> +  *code = (tmp_code << 16) | tmp_code;
>> +
>> +  return 0;
>> +}
>> +
>> +
>> +
>> +
>> +/*
>> + *  mg5uart_enable_interrupts
>> + *
>> + *  This function enables specific interrupt sources on the DUART.
>> + */
>> +
>> +MG5UART_STATIC void mg5uart_enable_interrupts(
>> +  int minor,
>> +  int mask
>> +)
>> +{
>> +  uint32_t              pMG5UART;
>> +  uint32_t             maskSave;
>> +  uint32_t              shift;
>> +  rtems_interrupt_level  Irql;
>> +
>> +  pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1;
>> +
>> +  /*
>> +   *  Enable interrupts on RX and TX -- not break
>> +   */
>> +
>> +  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> +    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> +  else
>> +    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> +
>> +
>> +  rtems_interrupt_disable(Irql);
>> +
>> +  maskSave = MG5UART_GETREG( pMG5UART, MG5UART_INTERRUPT_MASK_REGISTER );
>> +
>> +  MG5UART_SETREG(
>> +     pMG5UART,
>> +     MG5UART_INTERRUPT_MASK_REGISTER,
>> +     (maskSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (mask << shift) );
>> +
>> +  rtems_interrupt_enable(Irql);
>> +}
>> +
>> +
>> +
>> +/*
>> + * Flow control is only supported when using interrupts
>> + */
>> +
>> +const console_fns mg5uart_fns =
>> +{
>> +  libchip_serial_default_probe,   /* deviceProbe */
>> +  mg5uart_open,                   /* deviceFirstOpen */
>> +  NULL,                           /* deviceLastClose */
>> +  NULL,                           /* deviceRead */
>> +  mg5uart_write_support_int,      /* deviceWrite */
>> +  mg5uart_initialize_interrupts,  /* deviceInitialize */
>> +  mg5uart_write_polled,           /* deviceWritePolled */
>> +  mg5uart_set_attributes,         /* deviceSetAttributes */
>> +  TRUE                            /* deviceOutputUsesInterrupts */
>> +};
>> +
>> +const console_fns mg5uart_fns_polled =
>> +{
>> +  libchip_serial_default_probe,        /* deviceProbe */
>> +  mg5uart_open,                        /* deviceFirstOpen */
>> +  mg5uart_close,                       /* deviceLastClose */
>> +  mg5uart_inbyte_nonblocking_polled,   /* deviceRead */
>> +  mg5uart_write_support_polled,        /* deviceWrite */
>> +  mg5uart_init,                        /* deviceInitialize */
>> +  mg5uart_write_polled,                /* deviceWritePolled */
>> +  mg5uart_set_attributes,              /* deviceSetAttributes */
>> +  FALSE,                               /* deviceOutputUsesInterrupts */
>> +};
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.h b/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.h
>> new file mode 100644
>> index 0000000..fa7bed6
>> --- /dev/null
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart.h
>> @@ -0,0 +1,98 @@
>> +/*
>> + *
>> + *  COPYRIGHT (c) 1989-1999.
>> + *  On-Line Applications Research Corporation (OAR).
>> + *
>> + *  The license and distribution terms for this file may be
>> + *  found in the file LICENSE in this distribution or at
>> + *  http://www.rtems.org/license/LICENSE.
>> + */
>> +
>> +#ifndef _MG5UART_H_
>> +#define _MG5UART_H_
>> +
>> +#ifdef __cplusplus
>> +extern "C" {
>> +#endif
>> +
>> +/*
>> + *  This is the ASCII for "MG5U" which should be unique enough to
>> + *  distinguish this type of serial device from others.
>> + */
>> +
>> +#define SERIAL_MG5UART 0x474D5535
>> +
>> +#define MG5UART_UART0  0
>> +#define MG5UART_UART1  1
>> +
>> +/*
>> + *  These are just used in the interface between this driver and
>> + *  the read/write register routines when accessing the first
>> + *  control port.  They are indices of registers from the bases.
>> + */
>> +
>> +/* shared registers from peripheral base (i.e. from ulCtrlPort1) */
>> +/*
>> +#define MG5UART_COMMAND_REGISTER          0
>> +#define MG5UART_STATUS_REGISTER           1
>> +#define MG5UART_INTERRUPT_CAUSE_REGISTER  2
>> +#define MG5UART_INTERRUPT_MASK_REGISTER   3
>> +*/
>> +
>> +#define MG5UART_COMMAND_REGISTER          0
>> +#define MG5UART_STATUS_REGISTER           0x04
>> +#define MG5UART_INTERRUPT_CAUSE_REGISTER  0x08
>> +#define MG5UART_INTERRUPT_MASK_REGISTER   0x0C
>> +
>> +/* port specific registers from uart base (i.e. from ulCtrlPort2) */
>> +#define MG5UART_RX_BUFFER  0
>> +#define MG5UART_TX_BUFFER  4
>> +#define MG5UART_BAUD_RATE  8
>> +
>> +/*
>> + *  Interrupt mask values
>> + */
>> +
>> +#define MG5UART_ENABLE_ALL_EXCEPT_TX MONGOOSEV_UART_ALL_RX_STATUS_BITS
>> +
>> +/* all rx ints on, but only tx ready.  no need to also int on tx empty */
>> +#define MG5UART_ENABLE_ALL           (MONGOOSEV_UART_ALL_STATUS_BITS & ~MONGOOSEV_UART_TX_EMPTY)
>> +
>> +#define MG5UART_DISABLE_ALL          0x0000
>> +
>> +/*
>> + *  Assume vectors are sequential.
>> + */
>> +
>> +#define MG5UART_IRQ_RX_FRAME_ERROR   0
>> +#define MG5UART_IRQ_RX_OVERRUN_ERROR 1
>> +#define MG5UART_IRQ_TX_EMPTY         2
>> +#define MG5UART_IRQ_TX_READY         3
>> +#define MG5UART_IRQ_RX_READY         4
>> +/*
>> + * Driver function table
>> + */
>> +
>> +extern const console_fns mg5uart_fns;
>> +extern const console_fns mg5uart_fns_polled;
>> +
>> +/*
>> + * Default register access routines
>> + */
>> +
>> +uint32_t   mg5uart_get_register(    /* registers are on 32-bit boundaries */
>> +  uint32_t    ulCtrlPort,           /*   and accessed as word             */
>> +  uint32_t    ucRegNum
>> +);
>> +
>> +void  mg5uart_set_register(
>> +  uint32_t    ulCtrlPort,
>> +  uint32_t    ucRegNum,
>> +  uint32_t    ucData
>> +);
>> +
>> +#ifdef __cplusplus
>> +}
>> +#endif
>> +
>> +#endif /* _MG5UART_H_ */
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart_reg.c b/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart_reg.c
>> new file mode 100644
>> index 0000000..134695f
>> --- /dev/null
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/console/mg5uart_reg.c
>> @@ -0,0 +1,58 @@
>> +/*
>> + *  This file contains a typical set of register access routines which may be
>> + *  used with the mg5uart chip if accesses to the chip are as follows:
>> + *
>> + *    + registers are accessed as uint32_t  's
>> + *    + registers are only u32-aligned (no address gaps)
>> + *
>> + *  COPYRIGHT (c) 1989-2001.
>> + *  On-Line Applications Research Corporation (OAR).
>> + *
>> + *  The license and distribution terms for this file may be
>> + *  found in the file LICENSE in this distribution or at
>> + *  http://www.rtems.org/license/LICENSE.
>> + */
>> +
>> +#include <rtems.h>
>> +
>> +#ifndef _MG5UART_MULTIPLIER
>> +#define _MG5UART_MULTIPLIER 1
>> +#define _MG5UART_NAME(_X) _X
>> +#define _MG5UART_TYPE uint32_t
>> +#endif
>> +
>> +#define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \
>> +  (_MG5UART_TYPE *)((_base) + ((_reg) * _MG5UART_MULTIPLIER ))
>> +
>> +/*
>> + *  MG5UART Get Register Routine
>> + */
>> +
>> +uint8_t   _MG5UART_NAME(mg5uart_get_register)(
>> +  uint32_t    ulCtrlPort,
>> +  uint8_t     ucRegNum
>> +)
>> +{
>> +  _MG5UART_TYPE *port;
>> +
>> +  port = CALCULATE_REGISTER_ADDRESS( ulCtrlPort, ucRegNum );
>> +
>> +  return *port;
>> +}
>> +
>> +/*
>> + *  MG5UART Set Register Routine
>> + */
>> +
>> +void  _MG5UART_NAME(mg5uart_set_register)(
>> +  uint32_t    ulCtrlPort,
>> +  uint8_t     ucRegNum,
>> +  uint8_t     ucData
>> +)
>> +{
>> +  _MG5UART_TYPE *port;
>> +
>> +  port = CALCULATE_REGISTER_ADDRESS( ulCtrlPort, ucRegNum );
>> +
>> +  *port = ucData;
>> +}
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h b/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h
>> index da4c198..5146b7f 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h
>> @@ -28,7 +28,7 @@ extern "C" {
>>  #include <rtems/iosupp.h>
>>  #include <rtems/console.h>
>>  #include <rtems/clockdrv.h>
>> -#include <libcpu/mongoose-v.h>
>> +#include <bsp/mongoose-v.h>
>>
>>  #define BSP_FEATURE_IRQ_EXTENSION
>>  #define BSP_SHARED_HANDLER_SUPPORT      1
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/include/mongoose-v.h b/c/src/lib/libbsp/mips/genmongoosev/include/mongoose-v.h
>> new file mode 100644
>> index 0000000..e69d25a
>> --- /dev/null
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/include/mongoose-v.h
>> @@ -0,0 +1,306 @@
>> +/**
>> + *  @file
>> + *
>> + *  MIPS Mongoose-V specific information
>> + */
>> +
>> +/*
>> + *  COPYRIGHT (c) 1989-2012.
>> + *  On-Line Applications Research Corporation (OAR).
>> + *
>> + *  The license and distribution terms for this file may be
>> + *  found in the file LICENSE in this distribution or at
>> + *  http://www.rtems.org/license/LICENSE.
>> + */
>> +
>> +#ifndef __MONGOOSEV_h
>> +#define __MONGOOSEV_h
>> +
>> +/*
>> + *  Macros to assist in accessing memory mapped Mongoose registers
>> + */
>> +
>> +
>> +#define MONGOOSEV_READ( _base ) \
>> +  ( *((volatile uint32_t*)(_base)) )
>> +
>> +#define MONGOOSEV_WRITE( _base, _value ) \
>> +  ( *((volatile uint32_t*)(_base)) = (_value) )
>> +
>> +#define MONGOOSEV_READ_REGISTER( _base, _register ) \
>> +  ( *((volatile uint32_t*)((_base) + (_register))) )
>> +
>> +#define MONGOOSEV_WRITE_REGISTER( _base, _register, _value ) \
>> +  ( *((volatile uint32_t*)((_base) + (_register))) = (_value) )
>> +
>> +
>> +
>> +
>> +
>> +/*
>> + * Macros to read/write the Mongoose FPU control register.
>> + */
>> +
>> +
>> +
>> +
>> +/*
>> + *  BIU and DRAM Registers
>> + */
>> +
>> +#define MONGOOSEV_BIU_CACHE_CONFIGURATION_REGISTER       0xFFFE0130
>> +#define MONGOOSEV_DRAM_CONFIGURATION_REGISTER            0xFFFE0120
>> +#define MONGOOSEV_REFRESH_TIMER_INITIAL_COUNTER_REGISTER 0xFFFE0010
>> +#define MONGOOSEV_WAIT_STATE_CONFIGURATION_REGISTER_BASE 0xFFFE0100
>> +
>> +/*
>> + *  Peripheral Function Addresses
>> + *
>> + *  NOTE: Status and Interrupt Cause use the same bits
>> + */
>> +
>> +#define MONGOOSEV_PERIPHERAL_COMMAND_REGISTER                   0xFFFE0180
>> +#define MONGOOSEV_PERIPHERAL_STATUS_REGISTER                    0xFFFE0184
>> +#define MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER  0xFFFE0188
>> +#define MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER   0xFFFE018C
>> +
>> +#define MONGOOSEV_WATCHDOG                     0xBE000000
>> +
>> +/* UART Bits in Peripheral Command Register Bits (TX/RX tied together here) */
>> +#define MONGOOSEV_UART_CMD_RESET_BOTH_PORTS    0x0001
>> +#define MONGOOSEV_UART_CMD_LOOPBACK_CTSN       0x0002
>> +#define MONGOOSEV_UART_CMD_LOOPBACK_RXTX       0x0004
>> +
>> +#define MONGOOSEV_UART_CMD_RX_ENABLE           0x001
>> +#define MONGOOSEV_UART_CMD_RX_DISABLE          0x000
>> +#define MONGOOSEV_UART_CMD_TX_ENABLE           0x002
>> +#define MONGOOSEV_UART_CMD_TX_DISABLE          0x000
>> +#define MONGOOSEV_UART_CMD_TX_READY            0x004
>> +#define MONGOOSEV_UART_CMD_PARITY_ENABLE       0x008
>> +#define MONGOOSEV_UART_CMD_PARITY_DISABLE      0x000
>> +#define MONGOOSEV_UART_CMD_PARITY_EVEN         0x010
>> +#define MONGOOSEV_UART_CMD_PARITY_ODD          0x000
>> +
>> +#define MONGOOSEV_UART0_CMD_SHIFT 5
>> +#define MONGOOSEV_UART1_CMD_SHIFT 11
>> +
>> +#define MONGOOSEV_UART_CMD_TX_ENABLE_0 \
>> +        (MONGOOSEV_UART_CMD_TX_ENABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_RX_ENABLE_0 \
>> +        (MONGOOSEV_UART_CMD_RX_ENABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_TX_READY_0 \
>> +        (MONGOOSEV_UART_CMD_TX_READY << MONGOOSEV_UART0_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_ENABLE_0 \
>> +        (MONGOOSEV_UART_CMD_PARITY_ENABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_DISABLE_0 \
>> +        (MONGOOSEV_UART_CMD_PARITY_DISABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_EVEN_0 \
>> +        (MONGOOSEV_UART_CMD_PARITY_EVEN << MONGOOSEV_UART0_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_ODD_0 \
>> +        (MONGOOSEV_UART_CMD_PARITY_ODD << MONGOOSEV_UART0_CMD_SHIFT)
>> +
>> +#define MONGOOSEV_UART_CMD_TX_ENABLE_1 \
>> +        (MONGOOSEV_UART_CMD_TX_ENABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_RX_ENABLE_1 \
>> +        (MONGOOSEV_UART_CMD_RX_ENABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_TX_READY_1 \
>> +        (MONGOOSEV_UART_CMD_TX_READY << MONGOOSEV_UART1_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_ENABLE_1 \
>> +        (MONGOOSEV_UART_CMD_PARITY_ENABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_DISABLE_1 \
>> +        (MONGOOSEV_UART_CMD_PARITY_DISABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_EVEN_1 \
>> +        (MONGOOSEV_UART_CMD_PARITY_EVEN << MONGOOSEV_UART1_CMD_SHIFT)
>> +#define MONGOOSEV_UART_CMD_PARITY_ODD_1 \
>> +        (MONGOOSEV_UART_CMD_PARITY_ODD << MONGOOSEV_UART1_CMD_SHIFT)
>> +
>> +/* UART Bits in Peripheral Status and Interrupt Cause Register */
>> +#define MONGOOSEV_UART_RX_FRAME_ERROR              0x0001
>> +#define MONGOOSEV_UART_RX_OVERRUN_ERROR            0x0002
>> +#define MONGOOSEV_UART_TX_EMPTY                    0x0004
>> +#define MONGOOSEV_UART_TX_READY                    0x0008
>> +#define MONGOOSEV_UART_RX_READY                    0x0010
>> +
>> +#define MONGOOSEV_UART_ALL_RX_STATUS_BITS          0x0013
>> +#define MONGOOSEV_UART_ALL_STATUS_BITS             0x001F
>> +
>> +/*
>> + *  The Peripheral Interrupt Status, Cause, and Mask registers have the
>> + *  same bit assignments although some revisions of the document have
>> + *  the Cause and Status registers incorrect.
>> + */
>> +
>> +#define MONGOOSEV_UART0_IRQ_SHIFT 11
>> +#define MONGOOSEV_UART1_IRQ_SHIFT 17
>> +
>> +#define MONGOOSEV_UART_FRAME_ERROR_0 \
>> +        (MONGOOSEV_UART_FRAME_ERROR << MONGOOSEV_UART0_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_RX_OVERRUN_ERROR_0 \
>> +        (MONGOOSEV_UART_RX_OVERRUN_ERROR << MONGOOSEV_UART0_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_TX_EMPTY_0 \
>> +        (MONGOOSEV_UART_TX_EMPTY << MONGOOSEV_UART0_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_TX_READY_0 \
>> +        (MONGOOSEV_UART_TX_READY << MONGOOSEV_UART0_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_RX_READY_0 \
>> +        (MONGOOSEV_UART_RX_READY << MONGOOSEV_UART0_IRQ_SHIFT)
>> +
>> +#define MONGOOSEV_UART_FRAME_ERROR_1 \
>> +        (MONGOOSEV_UART_FRAME_ERROR << MONGOOSEV_UART1_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_RX_OVERRUN_ERROR_1 \
>> +        (MONGOOSEV_UART_RX_OVERRUN_ERROR << MONGOOSEV_UART1_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_TX_EMPTY_1 \
>> +        (MONGOOSEV_UART_TX_EMPTY << MONGOOSEV_UART1_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_TX_READY_1 \
>> +        (MONGOOSEV_UART_TX_READY << MONGOOSEV_UART1_IRQ_SHIFT)
>> +#define MONGOOSEV_UART_RX_READY_1 \
>> +        (MONGOOSEV_UART_RX_READY << MONGOOSEV_UART1_IRQ_SHIFT)
>> +
>> +/*
>> + *  Bits in the Peripheral Interrupt Mask Register
>> + */
>> +
>> +/*
>> +** Interrupt Status/Cause/Mask register bits - from 31 to 0
>> +*/
>> +#define MONGOOSEV_EDAC_SERR_BIT          0x80000000
>> +#define MONGOOSEV_EDAC_MERR_BIT          0x40000000
>> +/* 29 - 24 reserved */
>> +#define MONGOOSEV_MAVN_WRITE_ACCESS      0x00800000
>> +#define MONGOOSEV_MAVN_READ_ACCESS       0x00400000
>> +#define MONGOOSEV_UART_1_RX_READY        0x00200000
>> +#define MONGOOSEV_UART_1_TX_READY        0x00100000
>> +#define MONGOOSEV_UART_1_TX_EMPTY        0x00080000
>> +#define MONGOOSEV_UART_1_RX_OVERRUN      0x00040000
>> +#define MONGOOSEV_UART_1_FRAME_ERROR     0x00020000
>> +#define MONGOOSEV_RESERVED_16            0x00010000
>> +#define MONGOOSEV_UART_0_RX_READY        0x00008000
>> +#define MONGOOSEV_UART_0_TX_READY        0x00004000
>> +#define MONGOOSEV_UART_0_TX_EMPTY        0x00002000
>> +#define MONGOOSEV_UART_0_RX_OVERRUN      0x00001000
>> +#define MONGOOSEV_UART_0_FRAME_ERROR     0x00000800
>> +#define MONGOOSEV_RESERVED_10            0x00000400
>> +#define MONGOOSEV_EXTERN_INT_9           0x00000200
>> +#define MONGOOSEV_EXTERN_INT_8           0x00000100
>> +#define MONGOOSEV_EXTERN_INT_7           0x00000080
>> +#define MONGOOSEV_EXTERN_INT_6           0x00000040
>> +#define MONGOOSEV_EXTERN_INT_5           0x00000020
>> +#define MONGOOSEV_EXTERN_INT_4           0x00000010
>> +#define MONGOOSEV_EXTERN_INT_3           0x00000008
>> +#define MONGOOSEV_EXTERN_INT_2           0x00000004
>> +#define MONGOOSEV_EXTERN_INT_1           0x00000002
>> +#define MONGOOSEV_EXTERN_INT_0           0x00000001
>> +
>> +
>> +/*
>> +** Peripheral Command bits (non-uart, those are defined above)
>> +*/
>> +#define MONGOOSEV_COMMAND_ENABLE_EDAC  MONGOOSEV_EDAC_SERR_BIT
>> +#define MONGOOSEV_COMMAND_OVERRIDE_EDAC MONGOOSEV_EDAC_MERR_BIT
>> +
>> +
>> +
>> +/*
>> + *  EDAC Registers
>> + */
>> +
>> +#define MONGOOSEV_EDAC_ERROR_ADDRESS_REGISTER       0xFFFE0190
>> +#define MONGOOSEV_EDAC_PARITY_TEST_MODE_REGISTER    0xFFFE0194
>> +
>> +/*
>> + *  MAVN Registers
>> + */
>> +
>> +#define MONGOOSEV_MAVN_TEST_REGISTER               0xFFFE01B4
>> +#define MONGOOSEV_MAVN_ACCESS_PRIVILEGE_REGISTER   0xFFFE01B8
>> +#define MONGOOSEV_MAVN_ACCESS_VIOLATION_REGISTER   0xFFFE01BC
>> +#define MONGOOSEV_MAVN_RANGE_0_REGISTER            0xFFFE01C0
>> +#define MONGOOSEV_MAVN_RANGE_1_REGISTER            0xFFFE01C4
>> +#define MONGOOSEV_MAVN_RANGE_2_REGISTER            0xFFFE01C8
>> +#define MONGOOSEV_MAVN_RANGE_3_REGISTER            0xFFFE01CC
>> +#define MONGOOSEV_MAVN_RANGE_4_REGISTER            0xFFFE01D0
>> +#define MONGOOSEV_MAVN_RANGE_5_REGISTER            0xFFFE01D4
>> +#define MONGOOSEV_MAVN_RANGE_6_REGISTER            0xFFFE01D8
>> +#define MONGOOSEV_MAVN_RANGE_7_REGISTER            0xFFFE01DC
>> +
>> +/*
>> + *  Timer Base Addresses, Offsets, and Values
>> + */
>> +
>> +#define MONGOOSEV_TIMER1_BASE    0xFFFE0000
>> +#define MONGOOSEV_TIMER2_BASE    0xFFFE0008
>> +
>> +#define MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER 0
>> +#define MONGOOSEV_TIMER_CONTROL_REGISTER         4
>> +
>> +/* Timer Control Register Constants */
>> +#define MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE    0x04
>> +#define MONGOOSEV_TIMER_CONTROL_INTERRUPT_ENABLE  0x02
>> +#define MONGOOSEV_TIMER_CONTROL_TIMEOUT           0x01
>> +
>> +/*
>> + *  UART Base Addresses and Offsets
>> + *
>> + *  Many bits in the peripheral command register are UART related
>> + *  and the bits are defined there.
>> + */
>> +
>> +#define MONGOOSEV_UART0_BASE   0xFFFE01E8
>> +#define MONGOOSEV_UART1_BASE   0xFFFE01F4
>> +
>> +#define MONGOOSEV_RX_BUFFER    0
>> +#define MONGOOSEV_TX_BUFFER    4
>> +#define MONGOOSEV_BAUD_RATE    8
>> +
>> +
>> +/*
>> + *  Status Register Bits
>> + */
>> +
>> +#define SR_CUMASK      0xf0000000      /* coproc usable bits */
>> +#define SR_CU3         0x80000000      /* Coprocessor 3 usable */
>> +#define SR_CU2         0x40000000      /* Coprocessor 2 usable */
>> +#define SR_CU1         0x20000000      /* Coprocessor 1 usable */
>> +#define SR_CU0         0x10000000      /* Coprocessor 0 usable */
>> +#define SR_BEV         0x00400000      /* use boot exception vectors */
>> +#define SR_TS          0x00200000      /* TLB shutdown */
>> +#define SR_PE          0x00100000      /* cache parity error */
>> +#define SR_CM          0x00080000      /* cache miss */
>> +#define SR_PZ          0x00040000      /* cache parity zero */
>> +#define SR_SWC         0x00020000      /* swap cache */
>> +#define SR_ISC         0x00010000      /* Isolate data cache */
>> +#define SR_IMASK       0x0000ff00      /* Interrupt mask */
>> +#define SR_IMASK8      0x00000000      /* mask level 8 */
>> +#define SR_IMASK7      0x00008000      /* mask level 7 */
>> +#define SR_IMASK6      0x0000c000      /* mask level 6 */
>> +#define SR_IMASK5      0x0000e000      /* mask level 5 */
>> +#define SR_IMASK4      0x0000f000      /* mask level 4 */
>> +#define SR_IMASK3      0x0000f800      /* mask level 3 */
>> +#define SR_IMASK2      0x0000fc00      /* mask level 2 */
>> +#define SR_IMASK1      0x0000fe00      /* mask level 1 */
>> +#define SR_IMASK0      0x0000ff00      /* mask level 0 */
>> +
>> +#define SR_IBIT8       0x00008000      /* bit level 8 */
>> +#define SR_IBIT7       0x00004000      /* bit level 7 */
>> +#define SR_IBIT6       0x00002000      /* bit level 6 */
>> +#define SR_IBIT5       0x00001000      /* bit level 5 */
>> +#define SR_IBIT4       0x00000800      /* bit level 4 */
>> +#define SR_IBIT3       0x00000400      /* bit level 3 */
>> +#define SR_IBIT2       0x00000200      /* bit level 2 */
>> +#define SR_IBIT1       0x00000100      /* bit level 1 */
>> +
>> +#define SR_KUO         0x00000020      /* old kernel/user, 0 => k, 1 => u */
>> +#define SR_IEO         0x00000010      /* old interrupt enable, 1 => enable */
>> +#define SR_KUP         0x00000008      /* prev kernel/user, 0 => k, 1 => u */
>> +#define SR_IEP         0x00000004      /* prev interrupt enable, 1 => enable */
>> +#define SR_KUC         0x00000002      /* cur kernel/user, 0 => k, 1 => u */
>> +#define SR_IEC         0x00000001      /* cur interrupt enable, 1 => enable */
>> +#define SR_KUMSK       (SR_KUO|SR_IEO|SR_KUP|SR_IEP|SR_KUC|SR_IEC)
>> +
>> +#define SR_IMASKSHIFT  8
>> +
>> +
>> +
>> +#define MONGOOSEV_IC_SIZE      0x1000          /* instruction cache = 4Kbytes */
>> +#define MONGOOSEV_DC_SIZE      0x800           /* data cache 2Kbytes */
>> +
>> +#endif
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/irq/vectorisrs.c b/c/src/lib/libbsp/mips/genmongoosev/irq/vectorisrs.c
>> index 8a23643..b7210f7 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/irq/vectorisrs.c
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/irq/vectorisrs.c
>> @@ -15,7 +15,7 @@
>>
>>  #include <rtems.h>
>>  #include <stdlib.h>
>> -#include <libcpu/mongoose-v.h>
>> +#include <bsp/mongoose-v.h>
>>
>>  #include <rtems/mips/iregdef.h>
>>  #include <rtems/mips/idtcpu.h>
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/preinstall.am b/c/src/lib/libbsp/mips/genmongoosev/preinstall.am
>> index f11c87a..e5988a4 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/preinstall.am
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/preinstall.am
>> @@ -69,6 +69,26 @@ $(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INC
>>         $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
>>  PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
>>
>> +$(PROJECT_INCLUDE)/bsp/lr33000.h: include/lr33000.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lr33000.h
>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lr33000.h
>> +
>> +$(PROJECT_INCLUDE)/bsp/lr333x0.h: include/lr333x0.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lr333x0.h
>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lr333x0.h
>> +
>> +$(PROJECT_INCLUDE)/bsp/mongoose-v.h: include/mongoose-v.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mongoose-v.h
>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mongoose-v.h
>> +
>> +$(PROJECT_INCLUDE)/bsp/r3000.h: include/r3000.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/r3000.h
>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/r3000.h
>> +
>> +$(PROJECT_INCLUDE)/bsp/mg5uart.h: console/mg5uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mg5uart.h
>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mg5uart.h
>> +
>>  $(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
>>         $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
>>  PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c
>> index 744dd69..a8dd2cb 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c
>> @@ -23,7 +23,7 @@
>>  #include <string.h>
>>
>>  #include <bsp.h>
>> -#include <libcpu/mongoose-v.h>
>> +#include <bsp/mongoose-v.h>
>>  #include <libcpu/isr_entries.h>
>>  #include <bsp/irq-generic.h>
>>
>> diff --git a/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c b/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c
>> index 5f6ec0d..481774e 100644
>> --- a/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c
>> +++ b/c/src/lib/libbsp/mips/genmongoosev/startup/gdb-support.c
>> @@ -11,7 +11,7 @@
>>
>>  #include <rtems.h>
>>  #include <rtems/bspIo.h>
>> -#include <libcpu/mongoose-v.h>
>> +#include <bsp/mongoose-v.h>
>>  #include "gdb_if.h"
>>
>>  #include <rtems/libio.h>
>> diff --git a/c/src/lib/libcpu/mips/Makefile.am b/c/src/lib/libcpu/mips/Makefile.am
>> index 6dc6258..e4dd7ca 100644
>> --- a/c/src/lib/libcpu/mips/Makefile.am
>> +++ b/c/src/lib/libcpu/mips/Makefile.am
>> @@ -31,10 +31,6 @@ if tx49
>>  interrupts_CPPFLAGS = -DTX49
>>  endif
>>
>> -if mongoosev
>> -interrupts_CPPFLAGS = -DMONGOOSEV
>> -endif
>> -
>>  noinst_PROGRAMS += shared/interrupts.rel
>>  shared_interrupts_rel_SOURCES = shared/interrupts/installisrentries.c \
>>      shared/interrupts/isr_entries.S shared/interrupts/isr_entries.h
>> @@ -42,23 +38,6 @@ shared_interrupts_rel_CPPFLAGS = $(AM_CPPFLAGS) $(interrupts_CPPFLAGS)
>>  shared_interrupts_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
>>  include_libcpu_HEADERS += shared/interrupts/isr_entries.h
>>
>> -EXTRA_DIST += mongoosev/README
>> -EXTRA_DIST += mongoosev/duart/README.mguart
>> -if mongoosev
>> -include_libcpu_HEADERS += mongoosev/include/mongoose-v.h
>> -
>> -## mongoosev/duart
>> -include_libchipdir = $(includedir)/libchip
>> -include_libchip_HEADERS = mongoosev/duart/mg5uart.h
>> -
>> -noinst_PROGRAMS += mongoosev/duart.rel
>> -mongoosev_duart_rel_SOURCES = mongoosev/duart/mg5uart.c \
>> -    mongoosev/duart/mg5uart.h mongoosev/duart/mg5uart_reg.c
>> -mongoosev_duart_rel_CPPFLAGS = $(AM_CPPFLAGS)
>> -mongoosev_duart_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
>> -
>> -endif
>> -
>>  if tx39
>>  include_libcpu_HEADERS += tx39/include/tx3904.h
>>  endif
>> diff --git a/c/src/lib/libcpu/mips/mongoosev/duart/README.mguart b/c/src/lib/libcpu/mips/mongoosev/duart/README.mguart
>> deleted file mode 100644
>> index 8073ab7..0000000
>> --- a/c/src/lib/libcpu/mips/mongoosev/duart/README.mguart
>> +++ /dev/null
>> @@ -1,101 +0,0 @@
>> -Configuration Table Use
>> -=======================
>> -
>> -sDeviceName
>> -
>> -   The name of this device.
>> -
>> -deviceType
>> -
>> -   This field must be SERIAL_MG5UART.
>> -
>> -pDeviceFns
>> -
>> -   The device interface control table.  This may be:
>> -      + mg5uart_fns for interrupt driven IO
>> -      + mg5uart_fns_polled for polled IO
>> -
>> -deviceProbe
>> -
>> -   This is the address of the routine which probes to see if the device
>> -   is present.
>> -
>> -pDeviceFlow
>> -
>> -   This field is ignored as hardware flow control is not currently supported.
>> -
>> -ulMargin
>> -
>> -    This is currently unused.
>> -
>> -ulHysteresis
>> -
>> -    This is currently unused.
>> -
>> -pDeviceParams
>> -
>> -    This is set to the default settings.
>> -
>> -ulCtrlPort1
>> -
>> -   This field is the address of the command register shared by both ports.
>> -
>> -ulCtrlPort2
>> -
>> -   This field is the address of the port being used.
>> -
>> -ulDataPort
>> -
>> -   This field is set to MG5UART_PORTA or MG5UART_PORTB.
>> -
>> -getRegister
>> -setRegister
>> -
>> -   These do NOT follow standard conventions and are ignored.
>> -   The register address routines are hard-coded as this is
>> -   an on-CPU part and assumed to provide a 32-bit wide interface.
>> -
>> -getData
>> -
>> -   This is address of the RX buffer register.
>> -
>> -setData
>> -
>> -   This is address of the TX buffer register.
>> -
>> -ulClock
>> -
>> -   baudRate Clock
>> -
>> -ulIntVector
>> -
>> -   This is the interrupt vector number associated with this chip.
>> -
>> -Example:
>> -
>> -#if (CONSOLE_USE_INTERRUPTS)
>> -#define MG5UART_FUNCTIONS &mg5uart_fns
>> -#else
>> -#define MG5UART_FUNCTIONS &mg5uart_fns_polled
>> -#endif
>> -
>> -{
>> -  "/dev/com0",                            /* sDeviceName */
>> -  SERIAL_MG5UART,                         /* deviceType */
>> -  MG5UART_FUNCTIONS,                      /* pDeviceFns */
>> -  NULL,                                   /* deviceProbe, assume it is there */
>> -  NULL,                                   /* pDeviceFlow */
>> -  16,                                     /* ulMargin */
>> -  8,                                      /* ulHysteresis */
>> -  (void *) NULL,               /* NULL */ /* pDeviceParams */
>> -  MONGOOSEV_PERIPHERAL_COMMAND_REGISTER,  /* ulCtrlPort1 */
>> -  MONGOOSEV_UART0_BASE,                   /* ulCtrlPort2 */
>> -  MG5UART_UART0,                          /* ulDataPort */
>> -  mg5uart_get_register,                   /* getRegister */
>> -  mg5uart_set_register,                   /* setRegister */
>> -  NULL, /* unused */                      /* getData */
>> -  NULL, /* unused */                      /* setData */
>> -  12000000,                               /* ulClock */
>> -  MONGOOSEV_IRQ_UART0_RX_FRAME_ERROR      /* ulIntVector -- base for port */
>> -}
>> -
>> diff --git a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.c b/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.c
>> deleted file mode 100644
>> index 50f6586..0000000
>> --- a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.c
>> +++ /dev/null
>> @@ -1,917 +0,0 @@
>> -/**
>> - *  @file
>> - *
>> - *  This file contains the termios TTY driver for the UART found
>> - *  on the Synova Mongoose-V.
>> - */
>> -
>> -/*
>> - *  COPYRIGHT (c) 1989-2012.
>> - *  On-Line Applications Research Corporation (OAR).
>> - *
>> - *  The license and distribution terms for this file may be
>> - *  found in the file LICENSE in this distribution or at
>> - *  http://www.rtems.org/license/LICENSE.
>> - */
>> -
>> -#include <rtems.h>
>> -#include <rtems/libio.h>
>> -#include <rtems/score/sysstate.h>
>> -#include <stdlib.h>
>> -
>> -#include <libchip/serial.h>
>> -#include <libchip/mg5uart.h>
>> -#include <libchip/sersupp.h>
>> -#include <libcpu/mongoose-v.h>
>> -
>> -#include <bsp/irq.h>
>> -#include <bsp.h>
>> -
>> -/*
>> - *  Indices of registers
>> - */
>> -
>> -/*
>> - *  Per chip context control
>> - */
>> -
>> -typedef struct _mg5uart_context
>> -{
>> -  int            mate;
>> -} mg5uart_context;
>> -
>> -/*
>> - *  Define MG5UART_STATIC to nothing while debugging so the entry points
>> - *  will show up in the symbol table.
>> - */
>> -
>> -#define MG5UART_STATIC
>> -
>> -/* #define MG5UART_STATIC static */
>> -
>> -
>> -
>> -#define MG5UART_SETREG( _base, _register, _value ) \
>> -        MONGOOSEV_WRITE_REGISTER( _base, _register, _value )
>> -
>> -#define MG5UART_GETREG( _base, _register ) \
>> -        MONGOOSEV_READ_REGISTER( _base, _register )
>> -
>> -
>> -/*
>> - *  Console Device Driver Support Functions
>> - */
>> -
>> -MG5UART_STATIC int mg5uart_baud_rate(
>> -  int        minor,
>> -  uint32_t   baud,
>> -  uint32_t  *code
>> -);
>> -
>> -MG5UART_STATIC void mg5uart_enable_interrupts(
>> -  int minor,
>> -  int mask
>> -);
>> -
>> -/*
>> - *  mg5uart_isr_XXX
>> - *
>> - *  This is the single interrupt entry point which parcels interrupts
>> - *  out to the handlers for specific sources and makes sure that the
>> - *  shared handler gets the right arguments.
>> - *
>> - *  NOTE: Yes .. this is ugly but it provides 5 interrupt source
>> - *  wrappers which are nearly functionally identical.
>> - */
>> -
>> -
>> -extern void mips_default_isr(int vector);
>> -
>> -#define __ISR(_TYPE, _OFFSET) \
>> -  MG5UART_STATIC void mg5uart_process_isr_ ## _TYPE ( \
>> -    int  minor \
>> -  ); \
>> -  \
>> -  MG5UART_STATIC rtems_isr mg5uart_isr_ ## _TYPE ( \
>> -    void *arg \
>> -  ) \
>> -  { \
>> -    rtems_vector_number vector = (rtems_vector_number) arg; \
>> -    int   minor; \
>> -    \
>> -    for(minor=0 ; minor<Console_Port_Count ; minor++) { \
>> -      if( Console_Port_Tbl[minor]->deviceType == SERIAL_MG5UART && \
>> -          vector == Console_Port_Tbl[minor]->ulIntVector + _OFFSET ) { \
>> -        mg5uart_process_isr_ ## _TYPE (minor); \
>> -       return; \
>> -      } \
>> -    } \
>> -    mips_default_isr( vector ); \
>> -  }
>> -
>> -__ISR(rx_frame_error, MG5UART_IRQ_RX_FRAME_ERROR)
>> -__ISR(rx_overrun_error, MG5UART_IRQ_RX_OVERRUN_ERROR)
>> -__ISR(tx_empty, MG5UART_IRQ_TX_EMPTY)
>> -__ISR(tx_ready, MG5UART_IRQ_TX_READY)
>> -__ISR(rx_ready, MG5UART_IRQ_RX_READY)
>> -
>> -/*
>> - *  mg5uart_set_attributes
>> - *
>> - *  This function sets the UART channel to reflect the requested termios
>> - *  port settings.
>> - */
>> -
>> -MG5UART_STATIC int mg5uart_set_attributes(
>> -  int minor,
>> -  const struct termios *t
>> -)
>> -{
>> -  uint32_t               pMG5UART_port;
>> -  uint32_t               pMG5UART;
>> -  uint32_t               cmd, cmdSave;
>> -  uint32_t               baudcmd;
>> -  uint32_t               shift;
>> -  rtems_interrupt_level  Irql;
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  /*
>> -   *  Set the baud rate
>> -   */
>> -
>> -  if (mg5uart_baud_rate( minor, t->c_cflag, &baudcmd ) == -1)
>> -    return -1;
>> -
>> -  /*
>> -   *  Base settings
>> -   */
>> -
>> -  /*
>> -   *  Base settings
>> -   */
>> -
>> -  cmd = MONGOOSEV_UART_CMD_RX_ENABLE | MONGOOSEV_UART_CMD_TX_ENABLE;
>> -
>> -  /*
>> -   *  Parity
>> -   */
>> -
>> -  if (t->c_cflag & PARENB) {
>> -    cmd |= MONGOOSEV_UART_CMD_PARITY_ENABLE;
>> -    if (t->c_cflag & PARODD)
>> -      cmd |= MONGOOSEV_UART_CMD_PARITY_ODD;
>> -    else
>> -      cmd |= MONGOOSEV_UART_CMD_PARITY_EVEN;
>> -  } else {
>> -    cmd |= MONGOOSEV_UART_CMD_PARITY_DISABLE;
>> -  }
>> -
>> -  /*
>> -   *  Character Size
>> -   */
>> -
>> -  if (t->c_cflag & CSIZE) {
>> -    switch (t->c_cflag & CSIZE) {
>> -      case CS5:
>> -      case CS6:
>> -      case CS7:
>> -        return -1;
>> -        break;
>> -      case CS8:
>> -        /* Mongoose-V only supports CS8 */
>> -        break;
>> -
>> -    }
>> -  } /* else default to CS8 */
>> -
>> -  /*
>> -   *  Stop Bits
>> -   */
>> -
>> -#if 0
>> -  if (t->c_cflag & CSTOPB) {
>> -    /* 2 stop bits not supported by Mongoose-V uart */
>> -    return -1;
>> -  }
>> -#endif
>> -
>> -  /*
>> -   *  XXX what about CTS/RTS
>> -   */
>> -
>> -  /* XXX */
>> -
>> -  /*
>> -   *  Now write the registers
>> -   */
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -    shift = MONGOOSEV_UART0_CMD_SHIFT;
>> -  else
>> -    shift = MONGOOSEV_UART1_CMD_SHIFT;
>> -
>> -
>> -
>> -  rtems_interrupt_disable(Irql);
>> -
>> -  cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER );
>> -
>> -  MG5UART_SETREG( pMG5UART,
>> -                 MG5UART_COMMAND_REGISTER,
>> -                 (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) );
>> -
>> -  MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd );
>> -
>> -  rtems_interrupt_enable(Irql);
>> -  return 0;
>> -}
>> -
>> -/*
>> - *  mg5uart_initialize_context
>> - *
>> - *  This function sets the default values of the per port context structure.
>> - */
>> -
>> -MG5UART_STATIC void mg5uart_initialize_context(
>> -  int               minor,
>> -  mg5uart_context  *pmg5uartContext
>> -)
>> -{
>> -  int          port;
>> -  unsigned int pMG5UART;
>> -  unsigned int pMG5UART_port;
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  pmg5uartContext->mate = -1;
>> -
>> -  for (port=0 ; port<Console_Port_Count ; port++ ) {
>> -    if ( Console_Port_Tbl[port]->ulCtrlPort1 == pMG5UART &&
>> -         Console_Port_Tbl[port]->ulCtrlPort2 != pMG5UART_port ) {
>> -      pmg5uartContext->mate = port;
>> -      break;
>> -    }
>> -  }
>> -
>> -}
>> -
>> -/*
>> - *  mg5uart_init
>> - *
>> - *  This function initializes the DUART to a quiecsent state.
>> - */
>> -
>> -MG5UART_STATIC void mg5uart_init(int minor)
>> -{
>> -  uint32_t              pMG5UART_port;
>> -  uint32_t              pMG5UART;
>> -  uint32_t             cmdSave;
>> -  uint32_t             shift;
>> -
>> -  mg5uart_context        *pmg5uartContext;
>> -
>> -  pmg5uartContext = (mg5uart_context *) malloc(sizeof(mg5uart_context));
>> -
>> -  Console_Port_Data[minor].pDeviceContext = (void *)pmg5uartContext;
>> -
>> -  mg5uart_initialize_context( minor, pmg5uartContext );
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -     shift = MONGOOSEV_UART0_CMD_SHIFT;
>> -  else
>> -     shift = MONGOOSEV_UART1_CMD_SHIFT;
>> -
>> -  /*
>> -   *  Disable the uart and leave this port disabled.
>> -   */
>> -
>> -  cmdSave = MG5UART_GETREG(pMG5UART, MG5UART_COMMAND_REGISTER) & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift);
>> -
>> -  MG5UART_SETREG( pMG5UART, MG5UART_COMMAND_REGISTER, cmdSave );
>> -
>> -  /*
>> -   *  Disable interrupts on RX and TX for this port
>> -   */
>> -  mg5uart_enable_interrupts( minor, MG5UART_DISABLE_ALL );
>> -}
>> -
>> -/*
>> - *  mg5uart_open
>> - *
>> - *  This function opens a port for communication.
>> - *
>> - *  Default state is 9600 baud, 8 bits, No parity, and 1 stop bit.
>> - */
>> -
>> -MG5UART_STATIC int mg5uart_open(
>> -  int      major,
>> -  int      minor,
>> -  void    *arg
>> -)
>> -{
>> -  uint32_t      pMG5UART;
>> -  uint32_t      pMG5UART_port;
>> -  uint32_t     vector;
>> -  uint32_t      cmd, cmdSave;
>> -  uint32_t      baudcmd;
>> -  uint32_t      shift;
>> -
>> -  rtems_interrupt_level  Irql;
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -  vector        = Console_Port_Tbl[minor]->ulIntVector;
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -    shift = MONGOOSEV_UART0_CMD_SHIFT;
>> -  else
>> -    shift = MONGOOSEV_UART1_CMD_SHIFT;
>> -
>> -
>> -  /* XXX default baud rate could be from configuration table */
>> -
>> -  (void) mg5uart_baud_rate( minor, B19200, &baudcmd );
>> -
>> -  /*
>> -   *  Set the DUART channel to a default useable state
>> -   *  B19200, 8Nx since there is no stop bit control.
>> -   */
>> -
>> -  cmd = MONGOOSEV_UART_CMD_TX_ENABLE | MONGOOSEV_UART_CMD_RX_ENABLE;
>> -
>> -  rtems_interrupt_disable(Irql);
>> -
>> -  cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER );
>> -
>> -  MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd );
>> -
>> -  MG5UART_SETREG( pMG5UART,
>> -                 MG5UART_COMMAND_REGISTER,
>> -                 cmd = (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) );
>> -
>> -  rtems_interrupt_enable(Irql);
>> -
>> -  return RTEMS_SUCCESSFUL;
>> -}
>> -
>> -/*
>> - *  mg5uart_close
>> - *
>> - *  This function shuts down the requested port.
>> - */
>> -
>> -MG5UART_STATIC int mg5uart_close(
>> -  int      major,
>> -  int      minor,
>> -  void    *arg
>> -)
>> -{
>> -  uint32_t      pMG5UART;
>> -  uint32_t      pMG5UART_port;
>> -  uint32_t     cmd, cmdSave;
>> -  uint32_t      shift;
>> -  rtems_interrupt_level  Irql;
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  /*
>> -   *  Disable interrupts from this channel and then disable it totally.
>> -   */
>> -
>> -  /* XXX interrupts */
>> -
>> -  cmd = MONGOOSEV_UART_CMD_TX_DISABLE | MONGOOSEV_UART_CMD_RX_DISABLE;
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -    shift = MONGOOSEV_UART0_CMD_SHIFT;
>> -  else
>> -    shift = MONGOOSEV_UART1_CMD_SHIFT;
>> -
>> -
>> -  rtems_interrupt_disable(Irql);
>> -  cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER );
>> -
>> -  MG5UART_SETREG( pMG5UART,
>> -                 MG5UART_COMMAND_REGISTER,
>> -                 (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) );
>> -  rtems_interrupt_enable(Irql);
>> -
>> -  return(RTEMS_SUCCESSFUL);
>> -}
>> -
>> -
>> -
>> -
>> -/*
>> - *  mg5uart_write_polled
>> - *
>> - *  This routine polls out the requested character.
>> - */
>> -
>> -MG5UART_STATIC void mg5uart_write_polled(
>> -  int   minor,
>> -  char  c
>> -)
>> -{
>> -  uint32_t                pMG5UART;
>> -  uint32_t                pMG5UART_port;
>> -  uint32_t                status;
>> -  int                     shift;
>> -  int                     timeout;
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> -  else
>> -    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> -
>> -  /*
>> -   * wait for transmitter holding register to be empty
>> -   */
>> -  timeout = 2000;
>> -
>> -  while( --timeout )
>> -  {
>> -    status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift;
>> -
>> -    /*
>> -    if ( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) ==
>> -            (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY) )
>> -      break;
>> -    */
>> -
>> -    if( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) )
>> -       break;
>> -
>> -    /*
>> -     * Yield while we wait
>> -     */
>> -
>> -#if 0
>> -     if(_System_state_Is_up(_System_state_Get()))
>> -     {
>> -       rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
>> -     }
>> -#endif
>> -  }
>> -
>> -  /*
>> -   * transmit character
>> -   */
>> -
>> -  MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, c);
>> -}
>> -
>> -MG5UART_STATIC void mg5uart_process_isr_rx_error(
>> -   int  minor,
>> -   uint32_t   mask
>> -)
>> -{
>> -  uint32_t                pMG5UART;
>> -  int                     shift;
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> -  else
>> -    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> -
>> -  /* now clear the error */
>> -
>> -  MG5UART_SETREG(
>> -     pMG5UART,
>> -     MG5UART_STATUS_REGISTER,
>> -     mask << shift );
>> -}
>> -
>> -
>> -MG5UART_STATIC void mg5uart_process_isr_rx_frame_error(
>> -  int  minor
>> -)
>> -{
>> -   mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_FRAME_ERROR );
>> -}
>> -
>> -MG5UART_STATIC void mg5uart_process_isr_rx_overrun_error(
>> -  int  minor
>> -)
>> -{
>> -   mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_OVERRUN_ERROR );
>> -}
>> -
>> -
>> -
>> -
>> -
>> -
>> -
>> -
>> -MG5UART_STATIC void mg5uart_process_tx_isr(
>> -   int        minor,
>> -   uint32_t   source
>> -)
>> -{
>> -   uint32_t        pMG5UART;
>> -   int             shift;
>> -
>> -   pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -
>> -   mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX);
>> -
>> -   if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -      shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> -   else
>> -      shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> -
>> -   MG5UART_SETREG(
>> -      pMG5UART,
>> -      MG5UART_STATUS_REGISTER,
>> -      source << shift );
>> -
>> -   if( rtems_termios_dequeue_characters( Console_Port_Data[minor].termios_data, 1) )
>> -   {
>> -      mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL);
>> -      return;
>> -   }
>> -
>> -   /*
>> -    *  There are no more characters to transmit.  The tx interrupts are be cleared
>> -    *  by writing data to the uart, so just disable the tx interrupt sources.
>> -    */
>> -
>> -   Console_Port_Data[minor].bActive = FALSE;
>> -
>> -   /* mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); */
>> -}
>> -
>> -
>> -
>> -MG5UART_STATIC void mg5uart_process_isr_tx_empty(
>> -  int  minor
>> -)
>> -{
>> -   /* mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_EMPTY ); */
>> -}
>> -
>> -MG5UART_STATIC void mg5uart_process_isr_tx_ready(
>> -  int  minor
>> -)
>> -{
>> -   mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_READY );
>> -}
>> -
>> -
>> -
>> -
>> -
>> -MG5UART_STATIC void mg5uart_process_isr_rx_ready(
>> -  int  minor
>> -)
>> -{
>> -  uint32_t   pMG5UART_port;
>> -  char       c;
>> -
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  /* reading the RX buffer automatically resets the interrupt flag */
>> -
>> -  c = (char) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER);
>> -
>> -  rtems_termios_enqueue_raw_characters(
>> -     Console_Port_Data[minor].termios_data,
>> -     &c, 1 );
>> -}
>> -
>> -static rtems_irq_connect_data mg5uart_rx_frame_error_cd  = {  \
>> -  0,                             /* filled in at initialization */
>> -  mg5uart_isr_rx_frame_error,   /* filled in at initialization */
>> -  NULL,   /* (void *) minor */
>> -  NULL,
>> -  NULL,
>> -  NULL
>> -};
>> -
>> -static rtems_irq_connect_data mg5uart_rx_overrun_error_cd  = {  \
>> -  0,                             /* filled in at initialization */
>> -  mg5uart_isr_rx_overrun_error,   /* filled in at initialization */
>> -  NULL,   /* (void *) minor */
>> -  NULL,
>> -  NULL,
>> -  NULL
>> -};
>> -
>> -static rtems_irq_connect_data mg5uart_tx_empty_cd  = {  \
>> -  0,                             /* filled in at initialization */
>> -  mg5uart_isr_tx_empty,   /* filled in at initialization */
>> -  NULL,   /* (void *) minor */
>> -  NULL,
>> -  NULL,
>> -  NULL
>> -};
>> -
>> -static rtems_irq_connect_data mg5uart_tx_ready_cd  = {  \
>> -  0,                             /* filled in at initialization */
>> -  mg5uart_isr_tx_ready,   /* filled in at initialization */
>> -  NULL,   /* (void *) minor */
>> -  NULL,
>> -  NULL,
>> -  NULL
>> -};
>> -
>> -static rtems_irq_connect_data mg5uart_rx_ready_cd  = {  \
>> -  0,                             /* filled in at initialization */
>> -  mg5uart_isr_rx_ready,   /* filled in at initialization */
>> -  NULL,   /* (void *) minor */
>> -  NULL,
>> -  NULL,
>> -  NULL
>> -};
>> -
>> -
>> -/*
>> - *  mg5uart_initialize_interrupts
>> - *
>> - *  This routine initializes the console's receive and transmit
>> - *  ring buffers and loads the appropriate vectors to handle the interrupts.
>> - */
>> -
>> -MG5UART_STATIC void mg5uart_initialize_interrupts(int minor)
>> -{
>> -  unsigned long v;
>> -  mg5uart_init(minor);
>> -
>> -  Console_Port_Data[minor].bActive = FALSE;
>> -  v = Console_Port_Tbl[minor]->ulIntVector;
>> -
>> -  mg5uart_rx_frame_error_cd.name    =  v + MG5UART_IRQ_RX_FRAME_ERROR;
>> -  mg5uart_rx_overrun_error_cd.name  =  v + MG5UART_IRQ_RX_OVERRUN_ERROR;
>> -  mg5uart_tx_empty_cd.name          =  v + MG5UART_IRQ_TX_EMPTY;
>> -  mg5uart_tx_ready_cd.name          =  v + MG5UART_IRQ_TX_READY;
>> -  mg5uart_rx_ready_cd.name          =  v + MG5UART_IRQ_RX_READY;
>> -
>> -  mg5uart_rx_frame_error_cd.handle    =  (void *)mg5uart_rx_frame_error_cd.name;
>> -  mg5uart_rx_overrun_error_cd.handle  =  (void *)mg5uart_rx_overrun_error_cd.name;
>> -  mg5uart_tx_empty_cd.handle          =  (void *)mg5uart_tx_empty_cd.name;
>> -  mg5uart_tx_ready_cd.handle          =  (void *)mg5uart_tx_ready_cd.name;
>> -  mg5uart_rx_ready_cd.handle          =  (void *)mg5uart_rx_ready_cd.name;
>> -
>> -
>> -  BSP_install_rtems_irq_handler( &mg5uart_rx_frame_error_cd );
>> -  BSP_install_rtems_irq_handler( &mg5uart_rx_overrun_error_cd );
>> -  BSP_install_rtems_irq_handler( &mg5uart_tx_empty_cd );
>> -  BSP_install_rtems_irq_handler( &mg5uart_tx_ready_cd );
>> -  BSP_install_rtems_irq_handler( &mg5uart_rx_ready_cd );
>> -
>> -  mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX);
>> -}
>> -
>> -/*
>> - *  mg5uart_write_support_int
>> - *
>> - *  Console Termios output entry point when using interrupt driven output.
>> - */
>> -
>> -MG5UART_STATIC int mg5uart_write_support_int(
>> -  int         minor,
>> -  const char *buf,
>> -  size_t      len
>> -)
>> -{
>> -  uint32_t        pMG5UART_port;
>> -
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  /*
>> -   *  We are using interrupt driven output and termios only sends us
>> -   *  one character at a time.
>> -   */
>> -
>> -  if ( !len )
>> -     return 0;
>> -
>> -  /*
>> -   *  Put the character out and enable interrupts if necessary.
>> -   */
>> -
>> -  MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, *buf);
>> -
>> -  if( Console_Port_Data[minor].bActive == FALSE )
>> -  {
>> -     Console_Port_Data[minor].bActive = TRUE;
>> -     mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL);
>> -  }
>> -
>> -  return 1;
>> -}
>> -
>> -
>> -
>> -
>> -/*
>> - *  mg5uart_write_support_polled
>> - *
>> - *  Console Termios output entry point when using polled output.
>> - *
>> - */
>> -
>> -MG5UART_STATIC ssize_t mg5uart_write_support_polled(
>> -  int         minor,
>> -  const char *buf,
>> -  size_t      len
>> -)
>> -{
>> -  int nwrite = 0;
>> -
>> -  /*
>> -   * poll each byte in the string out of the port.
>> -   */
>> -  while (nwrite < len)
>> -  {
>> -    mg5uart_write_polled(minor, *buf++);
>> -    nwrite++;
>> -  }
>> -
>> -  /*
>> -   * return the number of bytes written.
>> -   */
>> -  return nwrite;
>> -}
>> -
>> -/*
>> - *  mg5uart_inbyte_nonblocking_polled
>> - *
>> - *  Console Termios polling input entry point.
>> - */
>> -
>> -MG5UART_STATIC int mg5uart_inbyte_nonblocking_polled(
>> -  int minor
>> -)
>> -{
>> -  uint32_t                pMG5UART;
>> -  uint32_t                pMG5UART_port;
>> -  uint32_t                status;
>> -  uint32_t                tmp,shift;
>> -
>> -  pMG5UART      = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -  pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2;
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> -  else
>> -    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> -
>> -  /* reset overrrun or framing errors */
>> -  status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift;
>> -
>> -  if( (tmp = (status & 0x3)) )
>> -  {
>> -     MG5UART_SETREG(pMG5UART, MG5UART_STATUS_REGISTER, (tmp << shift) );
>> -     status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift;
>> -  }
>> -
>> -  if ( status & MONGOOSEV_UART_RX_READY )
>> -  {
>> -     return (int) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER);
>> -  }
>> -  else
>> -  {
>> -     return -1;
>> -  }
>> -}
>> -
>> -/*
>> - *  mg5uart_baud_rate
>> - */
>> -
>> -MG5UART_STATIC int mg5uart_baud_rate(
>> -  int           minor,
>> -  uint32_t      baud,
>> -  uint32_t     *code
>> -)
>> -{
>> -  uint32_t   clock;
>> -  uint32_t   tmp_code;
>> -  uint32_t   baud_requested;
>> -
>> -  baud_requested = baud & CBAUD;
>> -  if (!baud_requested)
>> -    baud_requested = B9600;              /* default to 9600 baud */
>> -
>> -  baud_requested = rtems_termios_baud_to_number( baud_requested );
>> -
>> -  clock = (uint32_t) Console_Port_Tbl[minor]->ulClock;
>> -  if (!clock)
>> -    rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER);
>> -
>> -  /*
>> -   *  Formula is Code = round(ClockFrequency / Baud - 1).
>> -   *
>> -   *  Since this is integer math, we will divide by twice the baud and
>> -   *  check the remaining odd bit.
>> -   */
>> -
>> -  tmp_code = (clock / baud_requested) - 1;
>> -
>> -  /*
>> -   *  From section 12.7, "Keep C>100 for best receiver operation."
>> -   *  That is 100 cycles which is not a lot of instructions.  It is
>> -   *  reasonable to think that the Mongoose-V could not keep
>> -   *  up with C < 100.
>> -   */
>> -
>> -  if ( tmp_code < 100 )
>> -    return RTEMS_INVALID_NUMBER;
>> -
>> -  /*
>> -   *  upper word is receiver baud and lower word is transmitter baud
>> -   */
>> -
>> -  *code = (tmp_code << 16) | tmp_code;
>> -
>> -  return 0;
>> -}
>> -
>> -
>> -
>> -
>> -/*
>> - *  mg5uart_enable_interrupts
>> - *
>> - *  This function enables specific interrupt sources on the DUART.
>> - */
>> -
>> -MG5UART_STATIC void mg5uart_enable_interrupts(
>> -  int minor,
>> -  int mask
>> -)
>> -{
>> -  uint32_t              pMG5UART;
>> -  uint32_t             maskSave;
>> -  uint32_t              shift;
>> -  rtems_interrupt_level  Irql;
>> -
>> -  pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1;
>> -
>> -  /*
>> -   *  Enable interrupts on RX and TX -- not break
>> -   */
>> -
>> -  if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 )
>> -    shift = MONGOOSEV_UART0_IRQ_SHIFT;
>> -  else
>> -    shift = MONGOOSEV_UART1_IRQ_SHIFT;
>> -
>> -
>> -  rtems_interrupt_disable(Irql);
>> -
>> -  maskSave = MG5UART_GETREG( pMG5UART, MG5UART_INTERRUPT_MASK_REGISTER );
>> -
>> -  MG5UART_SETREG(
>> -     pMG5UART,
>> -     MG5UART_INTERRUPT_MASK_REGISTER,
>> -     (maskSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (mask << shift) );
>> -
>> -  rtems_interrupt_enable(Irql);
>> -}
>> -
>> -
>> -
>> -/*
>> - * Flow control is only supported when using interrupts
>> - */
>> -
>> -const console_fns mg5uart_fns =
>> -{
>> -  libchip_serial_default_probe,   /* deviceProbe */
>> -  mg5uart_open,                   /* deviceFirstOpen */
>> -  NULL,                           /* deviceLastClose */
>> -  NULL,                           /* deviceRead */
>> -  mg5uart_write_support_int,      /* deviceWrite */
>> -  mg5uart_initialize_interrupts,  /* deviceInitialize */
>> -  mg5uart_write_polled,           /* deviceWritePolled */
>> -  mg5uart_set_attributes,         /* deviceSetAttributes */
>> -  TRUE                            /* deviceOutputUsesInterrupts */
>> -};
>> -
>> -const console_fns mg5uart_fns_polled =
>> -{
>> -  libchip_serial_default_probe,        /* deviceProbe */
>> -  mg5uart_open,                        /* deviceFirstOpen */
>> -  mg5uart_close,                       /* deviceLastClose */
>> -  mg5uart_inbyte_nonblocking_polled,   /* deviceRead */
>> -  mg5uart_write_support_polled,        /* deviceWrite */
>> -  mg5uart_init,                        /* deviceInitialize */
>> -  mg5uart_write_polled,                /* deviceWritePolled */
>> -  mg5uart_set_attributes,              /* deviceSetAttributes */
>> -  FALSE,                               /* deviceOutputUsesInterrupts */
>> -};
>> diff --git a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h b/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h
>> deleted file mode 100644
>> index fa7bed6..0000000
>> --- a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h
>> +++ /dev/null
>> @@ -1,98 +0,0 @@
>> -/*
>> - *
>> - *  COPYRIGHT (c) 1989-1999.
>> - *  On-Line Applications Research Corporation (OAR).
>> - *
>> - *  The license and distribution terms for this file may be
>> - *  found in the file LICENSE in this distribution or at
>> - *  http://www.rtems.org/license/LICENSE.
>> - */
>> -
>> -#ifndef _MG5UART_H_
>> -#define _MG5UART_H_
>> -
>> -#ifdef __cplusplus
>> -extern "C" {
>> -#endif
>> -
>> -/*
>> - *  This is the ASCII for "MG5U" which should be unique enough to
>> - *  distinguish this type of serial device from others.
>> - */
>> -
>> -#define SERIAL_MG5UART 0x474D5535
>> -
>> -#define MG5UART_UART0  0
>> -#define MG5UART_UART1  1
>> -
>> -/*
>> - *  These are just used in the interface between this driver and
>> - *  the read/write register routines when accessing the first
>> - *  control port.  They are indices of registers from the bases.
>> - */
>> -
>> -/* shared registers from peripheral base (i.e. from ulCtrlPort1) */
>> -/*
>> -#define MG5UART_COMMAND_REGISTER          0
>> -#define MG5UART_STATUS_REGISTER           1
>> -#define MG5UART_INTERRUPT_CAUSE_REGISTER  2
>> -#define MG5UART_INTERRUPT_MASK_REGISTER   3
>> -*/
>> -
>> -#define MG5UART_COMMAND_REGISTER          0
>> -#define MG5UART_STATUS_REGISTER           0x04
>> -#define MG5UART_INTERRUPT_CAUSE_REGISTER  0x08
>> -#define MG5UART_INTERRUPT_MASK_REGISTER   0x0C
>> -
>> -/* port specific registers from uart base (i.e. from ulCtrlPort2) */
>> -#define MG5UART_RX_BUFFER  0
>> -#define MG5UART_TX_BUFFER  4
>> -#define MG5UART_BAUD_RATE  8
>> -
>> -/*
>> - *  Interrupt mask values
>> - */
>> -
>> -#define MG5UART_ENABLE_ALL_EXCEPT_TX MONGOOSEV_UART_ALL_RX_STATUS_BITS
>> -
>> -/* all rx ints on, but only tx ready.  no need to also int on tx empty */
>> -#define MG5UART_ENABLE_ALL           (MONGOOSEV_UART_ALL_STATUS_BITS & ~MONGOOSEV_UART_TX_EMPTY)
>> -
>> -#define MG5UART_DISABLE_ALL          0x0000
>> -
>> -/*
>> - *  Assume vectors are sequential.
>> - */
>> -
>> -#define MG5UART_IRQ_RX_FRAME_ERROR   0
>> -#define MG5UART_IRQ_RX_OVERRUN_ERROR 1
>> -#define MG5UART_IRQ_TX_EMPTY         2
>> -#define MG5UART_IRQ_TX_READY         3
>> -#define MG5UART_IRQ_RX_READY         4
>> -/*
>> - * Driver function table
>> - */
>> -
>> -extern const console_fns mg5uart_fns;
>> -extern const console_fns mg5uart_fns_polled;
>> -
>> -/*
>> - * Default register access routines
>> - */
>> -
>> -uint32_t   mg5uart_get_register(    /* registers are on 32-bit boundaries */
>> -  uint32_t    ulCtrlPort,           /*   and accessed as word             */
>> -  uint32_t    ucRegNum
>> -);
>> -
>> -void  mg5uart_set_register(
>> -  uint32_t    ulCtrlPort,
>> -  uint32_t    ucRegNum,
>> -  uint32_t    ucData
>> -);
>> -
>> -#ifdef __cplusplus
>> -}
>> -#endif
>> -
>> -#endif /* _MG5UART_H_ */
>> diff --git a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart_reg.c b/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart_reg.c
>> deleted file mode 100644
>> index 134695f..0000000
>> --- a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart_reg.c
>> +++ /dev/null
>> @@ -1,58 +0,0 @@
>> -/*
>> - *  This file contains a typical set of register access routines which may be
>> - *  used with the mg5uart chip if accesses to the chip are as follows:
>> - *
>> - *    + registers are accessed as uint32_t  's
>> - *    + registers are only u32-aligned (no address gaps)
>> - *
>> - *  COPYRIGHT (c) 1989-2001.
>> - *  On-Line Applications Research Corporation (OAR).
>> - *
>> - *  The license and distribution terms for this file may be
>> - *  found in the file LICENSE in this distribution or at
>> - *  http://www.rtems.org/license/LICENSE.
>> - */
>> -
>> -#include <rtems.h>
>> -
>> -#ifndef _MG5UART_MULTIPLIER
>> -#define _MG5UART_MULTIPLIER 1
>> -#define _MG5UART_NAME(_X) _X
>> -#define _MG5UART_TYPE uint32_t
>> -#endif
>> -
>> -#define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \
>> -  (_MG5UART_TYPE *)((_base) + ((_reg) * _MG5UART_MULTIPLIER ))
>> -
>> -/*
>> - *  MG5UART Get Register Routine
>> - */
>> -
>> -uint8_t   _MG5UART_NAME(mg5uart_get_register)(
>> -  uint32_t    ulCtrlPort,
>> -  uint8_t     ucRegNum
>> -)
>> -{
>> -  _MG5UART_TYPE *port;
>> -
>> -  port = CALCULATE_REGISTER_ADDRESS( ulCtrlPort, ucRegNum );
>> -
>> -  return *port;
>> -}
>> -
>> -/*
>> - *  MG5UART Set Register Routine
>> - */
>> -
>> -void  _MG5UART_NAME(mg5uart_set_register)(
>> -  uint32_t    ulCtrlPort,
>> -  uint8_t     ucRegNum,
>> -  uint8_t     ucData
>> -)
>> -{
>> -  _MG5UART_TYPE *port;
>> -
>> -  port = CALCULATE_REGISTER_ADDRESS( ulCtrlPort, ucRegNum );
>> -
>> -  *port = ucData;
>> -}
>> diff --git a/c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h b/c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h
>> deleted file mode 100644
>> index b8ded3d..0000000
>> --- a/c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h
>> +++ /dev/null
>> @@ -1,306 +0,0 @@
>> -/**
>> - *  @file
>> - *
>> - *  MIPS Mongoose-V specific information
>> - */
>> -
>> -/*
>> - *  COPYRIGHT (c) 1989-2012.
>> - *  On-Line Applications Research Corporation (OAR).
>> - *
>> - *  The license and distribution terms for this file may be
>> - *  found in the file LICENSE in this distribution or at
>> - *  http://www.rtems.org/license/LICENSE.
>> - */
>> -
>> -#ifndef __MONGOOSEV_h
>> -#define __MONGOOSEV_h
>> -
>> -/*
>> - *  Macros to assist in accessing memory mapped Mongoose registers
>> - */
>> -
>> -
>> -#define MONGOOSEV_READ( _base ) \
>> -  ( *((volatile uint32_t*)(_base)) )
>> -
>> -#define MONGOOSEV_WRITE( _base, _value ) \
>> -  ( *((volatile uint32_t*)(_base)) = (_value) )
>> -
>> -#define MONGOOSEV_READ_REGISTER( _base, _register ) \
>> -  ( *((volatile uint32_t*)((_base) + (_register))) )
>> -
>> -#define MONGOOSEV_WRITE_REGISTER( _base, _register, _value ) \
>> -  ( *((volatile uint32_t*)((_base) + (_register))) = (_value) )
>> -
>> -
>> -
>> -
>> -
>> -/*
>> - * Macros to read/write the Mongoose FPU control register.
>> - */
>> -
>> -
>> -
>> -
>> -/*
>> - *  BIU and DRAM Registers
>> - */
>> -
>> -#define MONGOOSEV_BIU_CACHE_CONFIGURATION_REGISTER       0xFFFE0130
>> -#define MONGOOSEV_DRAM_CONFIGURATION_REGISTER            0xFFFE0120
>> -#define MONGOOSEV_REFRESH_TIMER_INITIAL_COUNTER_REGISTER 0xFFFE0010
>> -#define MONGOOSEV_WAIT_STATE_CONFIGURATION_REGISTER_BASE 0xFFFE0100
>> -
>> -/*
>> - *  Peripheral Function Addresses
>> - *
>> - *  NOTE: Status and Interrupt Cause use the same bits
>> - */
>> -
>> -#define MONGOOSEV_PERIPHERAL_COMMAND_REGISTER                   0xFFFE0180
>> -#define MONGOOSEV_PERIPHERAL_STATUS_REGISTER                    0xFFFE0184
>> -#define MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER  0xFFFE0188
>> -#define MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER   0xFFFE018C
>> -
>> -#define MONGOOSEV_WATCHDOG                     0xBE000000
>> -
>> -/* UART Bits in Peripheral Command Register Bits (TX/RX tied together here) */
>> -#define MONGOOSEV_UART_CMD_RESET_BOTH_PORTS    0x0001
>> -#define MONGOOSEV_UART_CMD_LOOPBACK_CTSN       0x0002
>> -#define MONGOOSEV_UART_CMD_LOOPBACK_RXTX       0x0004
>> -
>> -#define MONGOOSEV_UART_CMD_RX_ENABLE           0x001
>> -#define MONGOOSEV_UART_CMD_RX_DISABLE          0x000
>> -#define MONGOOSEV_UART_CMD_TX_ENABLE           0x002
>> -#define MONGOOSEV_UART_CMD_TX_DISABLE          0x000
>> -#define MONGOOSEV_UART_CMD_TX_READY            0x004
>> -#define MONGOOSEV_UART_CMD_PARITY_ENABLE       0x008
>> -#define MONGOOSEV_UART_CMD_PARITY_DISABLE      0x000
>> -#define MONGOOSEV_UART_CMD_PARITY_EVEN         0x010
>> -#define MONGOOSEV_UART_CMD_PARITY_ODD          0x000
>> -
>> -#define MONGOOSEV_UART0_CMD_SHIFT 5
>> -#define MONGOOSEV_UART1_CMD_SHIFT 11
>> -
>> -#define MONGOOSEV_UART_CMD_TX_ENABLE_0 \
>> -        (MONGOOSEV_UART_CMD_TX_ENABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_RX_ENABLE_0 \
>> -        (MONGOOSEV_UART_CMD_RX_ENABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_TX_READY_0 \
>> -        (MONGOOSEV_UART_CMD_TX_READY << MONGOOSEV_UART0_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_ENABLE_0 \
>> -        (MONGOOSEV_UART_CMD_PARITY_ENABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_DISABLE_0 \
>> -        (MONGOOSEV_UART_CMD_PARITY_DISABLE << MONGOOSEV_UART0_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_EVEN_0 \
>> -        (MONGOOSEV_UART_CMD_PARITY_EVEN << MONGOOSEV_UART0_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_ODD_0 \
>> -        (MONGOOSEV_UART_CMD_PARITY_ODD << MONGOOSEV_UART0_CMD_SHIFT)
>> -
>> -#define MONGOOSEV_UART_CMD_TX_ENABLE_1 \
>> -        (MONGOOSEV_UART_CMD_TX_ENABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_RX_ENABLE_1 \
>> -        (MONGOOSEV_UART_CMD_RX_ENABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_TX_READY_1 \
>> -        (MONGOOSEV_UART_CMD_TX_READY << MONGOOSEV_UART1_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_ENABLE_1 \
>> -        (MONGOOSEV_UART_CMD_PARITY_ENABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_DISABLE_1 \
>> -        (MONGOOSEV_UART_CMD_PARITY_DISABLE << MONGOOSEV_UART1_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_EVEN_1 \
>> -        (MONGOOSEV_UART_CMD_PARITY_EVEN << MONGOOSEV_UART1_CMD_SHIFT)
>> -#define MONGOOSEV_UART_CMD_PARITY_ODD_1 \
>> -        (MONGOOSEV_UART_CMD_PARITY_ODD << MONGOOSEV_UART1_CMD_SHIFT)
>> -
>> -/* UART Bits in Peripheral Status and Interrupt Cause Register */
>> -#define MONGOOSEV_UART_RX_FRAME_ERROR              0x0001
>> -#define MONGOOSEV_UART_RX_OVERRUN_ERROR            0x0002
>> -#define MONGOOSEV_UART_TX_EMPTY                    0x0004
>> -#define MONGOOSEV_UART_TX_READY                    0x0008
>> -#define MONGOOSEV_UART_RX_READY                    0x0010
>> -
>> -#define MONGOOSEV_UART_ALL_RX_STATUS_BITS          0x0013
>> -#define MONGOOSEV_UART_ALL_STATUS_BITS             0x001F
>> -
>> -/*
>> - *  The Peripheral Interrupt Status, Cause, and Mask registers have the
>> - *  same bit assignments although some revisions of the document have
>> - *  the Cause and Status registers incorrect.
>> - */
>> -
>> -#define MONGOOSEV_UART0_IRQ_SHIFT 11
>> -#define MONGOOSEV_UART1_IRQ_SHIFT 17
>> -
>> -#define MONGOOSEV_UART_FRAME_ERROR_0 \
>> -        (MONGOOSEV_UART_FRAME_ERROR << MONGOOSEV_UART0_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_RX_OVERRUN_ERROR_0 \
>> -        (MONGOOSEV_UART_RX_OVERRUN_ERROR << MONGOOSEV_UART0_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_TX_EMPTY_0 \
>> -        (MONGOOSEV_UART_TX_EMPTY << MONGOOSEV_UART0_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_TX_READY_0 \
>> -        (MONGOOSEV_UART_TX_READY << MONGOOSEV_UART0_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_RX_READY_0 \
>> -        (MONGOOSEV_UART_RX_READY << MONGOOSEV_UART0_IRQ_SHIFT)
>> -
>> -#define MONGOOSEV_UART_FRAME_ERROR_1 \
>> -        (MONGOOSEV_UART_FRAME_ERROR << MONGOOSEV_UART1_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_RX_OVERRUN_ERROR_1 \
>> -        (MONGOOSEV_UART_RX_OVERRUN_ERROR << MONGOOSEV_UART1_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_TX_EMPTY_1 \
>> -        (MONGOOSEV_UART_TX_EMPTY << MONGOOSEV_UART1_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_TX_READY_1 \
>> -        (MONGOOSEV_UART_TX_READY << MONGOOSEV_UART1_IRQ_SHIFT)
>> -#define MONGOOSEV_UART_RX_READY_1 \
>> -        (MONGOOSEV_UART_RX_READY << MONGOOSEV_UART1_IRQ_SHIFT)
>> -
>> -/*
>> - *  Bits in the Peripheral Interrupt Mask Register
>> - */
>> -
>> -/*
>> -** Interrupt Status/Cause/Mask register bits - from 31 to 0
>> -*/
>> -#define MONGOOSEV_EDAC_SERR_BIT          0x80000000
>> -#define MONGOOSEV_EDAC_MERR_BIT          0x40000000
>> -/* 29 - 24 reserved */
>> -#define MONGOOSEV_MAVN_WRITE_ACCESS      0x00800000
>> -#define MONGOOSEV_MAVN_READ_ACCESS       0x00400000
>> -#define MONGOOSEV_UART_1_RX_READY        0x00200000
>> -#define MONGOOSEV_UART_1_TX_READY        0x00100000
>> -#define MONGOOSEV_UART_1_TX_EMPTY        0x00080000
>> -#define MONGOOSEV_UART_1_RX_OVERRUN      0x00040000
>> -#define MONGOOSEV_UART_1_FRAME_ERROR     0x00020000
>> -#define MONGOOSEV_RESERVED_16            0x00010000
>> -#define MONGOOSEV_UART_0_RX_READY        0x00008000
>> -#define MONGOOSEV_UART_0_TX_READY        0x00004000
>> -#define MONGOOSEV_UART_0_TX_EMPTY        0x00002000
>> -#define MONGOOSEV_UART_0_RX_OVERRUN      0x00001000
>> -#define MONGOOSEV_UART_0_FRAME_ERROR     0x00000800
>> -#define MONGOOSEV_RESERVED_10            0x00000400
>> -#define MONGOOSEV_EXTERN_INT_9           0x00000200
>> -#define MONGOOSEV_EXTERN_INT_8           0x00000100
>> -#define MONGOOSEV_EXTERN_INT_7           0x00000080
>> -#define MONGOOSEV_EXTERN_INT_6           0x00000040
>> -#define MONGOOSEV_EXTERN_INT_5           0x00000020
>> -#define MONGOOSEV_EXTERN_INT_4           0x00000010
>> -#define MONGOOSEV_EXTERN_INT_3           0x00000008
>> -#define MONGOOSEV_EXTERN_INT_2           0x00000004
>> -#define MONGOOSEV_EXTERN_INT_1           0x00000002
>> -#define MONGOOSEV_EXTERN_INT_0           0x00000001
>> -
>> -
>> -/*
>> -** Peripheral Command bits (non-uart, those are defined above)
>> -*/
>> -#define MONGOOSEV_COMMAND_ENABLE_EDAC  MONGOOSEV_EDAC_SERR_BIT
>> -#define MONGOOSEV_COMMAND_OVERRIDE_EDAC MONGOOSEV_EDAC_MERR_BIT
>> -
>> -
>> -
>> -/*
>> - *  EDAC Registers
>> - */
>> -
>> -#define MONGOOSEV_EDAC_ERROR_ADDRESS_REGISTER       0xFFFE0190
>> -#define MONGOOSEV_EDAC_PARITY_TEST_MODE_REGISTER    0xFFFE0194
>> -
>> -/*
>> - *  MAVN Registers
>> - */
>> -
>> -#define MONGOOSEV_MAVN_TEST_REGISTER               0xFFFE01B4
>> -#define MONGOOSEV_MAVN_ACCESS_PRIVILEGE_REGISTER   0xFFFE01B8
>> -#define MONGOOSEV_MAVN_ACCESS_VIOLATION_REGISTER   0xFFFE01BC
>> -#define MONGOOSEV_MAVN_RANGE_0_REGISTER            0xFFFE01C0
>> -#define MONGOOSEV_MAVN_RANGE_1_REGISTER            0xFFFE01C4
>> -#define MONGOOSEV_MAVN_RANGE_2_REGISTER            0xFFFE01C8
>> -#define MONGOOSEV_MAVN_RANGE_3_REGISTER            0xFFFE01CC
>> -#define MONGOOSEV_MAVN_RANGE_4_REGISTER            0xFFFE01D0
>> -#define MONGOOSEV_MAVN_RANGE_5_REGISTER            0xFFFE01D4
>> -#define MONGOOSEV_MAVN_RANGE_6_REGISTER            0xFFFE01D8
>> -#define MONGOOSEV_MAVN_RANGE_7_REGISTER            0xFFFE01DC
>> -
>> -/*
>> - *  Timer Base Addresses, Offsets, and Values
>> - */
>> -
>> -#define MONGOOSEV_TIMER1_BASE    0xFFFE0000
>> -#define MONGOOSEV_TIMER2_BASE    0xFFFE0008
>> -
>> -#define MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER 0
>> -#define MONGOOSEV_TIMER_CONTROL_REGISTER         4
>> -
>> -/* Timer Control Register Constants */
>> -#define MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE    0x04
>> -#define MONGOOSEV_TIMER_CONTROL_INTERRUPT_ENABLE  0x02
>> -#define MONGOOSEV_TIMER_CONTROL_TIMEOUT           0x01
>> -
>> -/*
>> - *  UART Base Addresses and Offsets
>> - *
>> - *  Many bits in the peripheral command register are UART related
>> - *  and the bits are defined there.
>> - */
>> -
>> -#define MONGOOSEV_UART0_BASE   0xFFFE01E8
>> -#define MONGOOSEV_UART1_BASE   0xFFFE01F4
>> -
>> -#define MONGOOSEV_RX_BUFFER    0
>> -#define MONGOOSEV_TX_BUFFER    4
>> -#define MONGOOSEV_BAUD_RATE    8
>> -
>> -
>> -/*
>> - *  Status Register Bits
>> - */
>> -
>> -#define SR_CUMASK      0xf0000000      /* coproc usable bits */
>> -#define SR_CU3         0x80000000      /* Coprocessor 3 usable */
>> -#define SR_CU2         0x40000000      /* Coprocessor 2 usable */
>> -#define SR_CU1         0x20000000      /* Coprocessor 1 usable */
>> -#define SR_CU0         0x10000000      /* Coprocessor 0 usable */
>> -#define SR_BEV         0x00400000      /* use boot exception vectors */
>> -#define SR_TS          0x00200000      /* TLB shutdown */
>> -#define SR_PE          0x00100000      /* cache parity error */
>> -#define SR_CM          0x00080000      /* cache miss */
>> -#define SR_PZ          0x00040000      /* cache parity zero */
>> -#define SR_SWC         0x00020000      /* swap cache */
>> -#define SR_ISC         0x00010000      /* Isolate data cache */
>> -#define SR_IMASK       0x0000ff00      /* Interrupt mask */
>> -#define SR_IMASK8      0x00000000      /* mask level 8 */
>> -#define SR_IMASK7      0x00008000      /* mask level 7 */
>> -#define SR_IMASK6      0x0000c000      /* mask level 6 */
>> -#define SR_IMASK5      0x0000e000      /* mask level 5 */
>> -#define SR_IMASK4      0x0000f000      /* mask level 4 */
>> -#define SR_IMASK3      0x0000f800      /* mask level 3 */
>> -#define SR_IMASK2      0x0000fc00      /* mask level 2 */
>> -#define SR_IMASK1      0x0000fe00      /* mask level 1 */
>> -#define SR_IMASK0      0x0000ff00      /* mask level 0 */
>> -
>> -#define SR_IBIT8       0x00008000      /* bit level 8 */
>> -#define SR_IBIT7       0x00004000      /* bit level 7 */
>> -#define SR_IBIT6       0x00002000      /* bit level 6 */
>> -#define SR_IBIT5       0x00001000      /* bit level 5 */
>> -#define SR_IBIT4       0x00000800      /* bit level 4 */
>> -#define SR_IBIT3       0x00000400      /* bit level 3 */
>> -#define SR_IBIT2       0x00000200      /* bit level 2 */
>> -#define SR_IBIT1       0x00000100      /* bit level 1 */
>> -
>> -#define SR_KUO         0x00000020      /* old kernel/user, 0 => k, 1 => u */
>> -#define SR_IEO         0x00000010      /* old interrupt enable, 1 => enable */
>> -#define SR_KUP         0x00000008      /* prev kernel/user, 0 => k, 1 => u */
>> -#define SR_IEP         0x00000004      /* prev interrupt enable, 1 => enable */
>> -#define SR_KUC         0x00000002      /* cur kernel/user, 0 => k, 1 => u */
>> -#define SR_IEC         0x00000001      /* cur interrupt enable, 1 => enable */
>> -#define SR_KUMSK       (SR_KUO|SR_IEO|SR_KUP|SR_IEP|SR_KUC|SR_IEC)
>> -
>> -#define SR_IMASKSHIFT  8
>> -
>> -
>> -
>> -#define MONGOOSEV_IC_SIZE      0x1000          /* instruction cache = 4Kbytes */
>> -#define MONGOOSEV_DC_SIZE      0x800           /* data cache 2Kbytes */
>> -
>> -#endif
>> diff --git a/c/src/lib/libcpu/mips/preinstall.am b/c/src/lib/libcpu/mips/preinstall.am
>> index 4a83d60..85aec82 100644
>> --- a/c/src/lib/libcpu/mips/preinstall.am
>> +++ b/c/src/lib/libcpu/mips/preinstall.am
>> @@ -26,20 +26,6 @@ $(PROJECT_INCLUDE)/libcpu/isr_entries.h: shared/interrupts/isr_entries.h $(PROJE
>>         $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/isr_entries.h
>>  PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/isr_entries.h
>>
>> -if mongoosev
>> -$(PROJECT_INCLUDE)/libcpu/mongoose-v.h: mongoosev/include/mongoose-v.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
>> -       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/mongoose-v.h
>> -PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/mongoose-v.h
>> -
>> -$(PROJECT_INCLUDE)/libchip/$(dirstamp):
>> -       @$(MKDIR_P) $(PROJECT_INCLUDE)/libchip
>> -       @: > $(PROJECT_INCLUDE)/libchip/$(dirstamp)
>> -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/libchip/$(dirstamp)
>> -
>> -$(PROJECT_INCLUDE)/libchip/mg5uart.h: mongoosev/duart/mg5uart.h $(PROJECT_INCLUDE)/libchip/$(dirstamp)
>> -       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libchip/mg5uart.h
>> -PREINSTALL_FILES += $(PROJECT_INCLUDE)/libchip/mg5uart.h
>> -endif
>>  if tx39
>>  $(PROJECT_INCLUDE)/libcpu/tx3904.h: tx39/include/tx3904.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
>>         $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/tx3904.h
>> --
>> 1.9.3
>>
>> _______________________________________________
>> devel mailing list
>> devel at rtems.org
>> http://lists.rtems.org/mailman/listinfo/devel

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
Support Available                (256) 722-9985




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