[PATCH 36/62] mpc5xx libcpu and ss555 BSP: Fix warnings

Joel Sherrill joel.sherrill at oarcorp.com
Wed Oct 15 20:00:26 UTC 2014


---
 c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c     |  6 +---
 c/src/lib/libbsp/powerpc/ss555/include/bsp.h       | 19 ++++++++----
 c/src/lib/libbsp/powerpc/ss555/irq/irq.h           |  2 ++
 c/src/lib/libbsp/powerpc/ss555/start/start.S       |  9 ++++--
 c/src/lib/libbsp/powerpc/ss555/startup/iss555.c    |  6 ++--
 c/src/lib/libcpu/powerpc/mpc5xx/clock/clock.c      |  3 +-
 .../mpc5xx/console-generic/console-generic.c       |  9 +++---
 c/src/lib/libcpu/powerpc/mpc5xx/include/mpc5xx.h   | 14 +++++++--
 c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c          | 34 +++++-----------------
 c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c     | 10 +++----
 c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h  |  4 +--
 .../libcpu/powerpc/mpc5xx/vectors/vectors_init.c   | 11 +++----
 12 files changed, 63 insertions(+), 64 deletions(-)

diff --git a/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c b/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c
index d6d339d..25785b0 100644
--- a/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c
+++ b/c/src/lib/libbsp/powerpc/ss555/clock/p_clock.c
@@ -20,11 +20,7 @@
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <rtems/bspIo.h>
-
-extern void clockOn(void*);
-extern void clockOff (void*);
-extern int clockIsOn(void*);
-extern void Clock_isr(void *);
+#include <mpc5xx.h>
 
 static rtems_irq_connect_data clockIrqData = {
   CPU_PERIODIC_TIMER,
diff --git a/c/src/lib/libbsp/powerpc/ss555/include/bsp.h b/c/src/lib/libbsp/powerpc/ss555/include/bsp.h
index a1a8c55..fbe0c56 100644
--- a/c/src/lib/libbsp/powerpc/ss555/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/ss555/include/bsp.h
@@ -1,10 +1,8 @@
-/*  bsp.h
- *
- *  This include file contains all board IO definitions.
- *
+/*
  *  This file includes definitions for the Intec SS555.
- *
- *
+ */
+
+/*
  *  SS555 port sponsored by Defence Research and Development Canada - Suffield
  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach at realtime.bc.ca)
  *
@@ -21,6 +19,8 @@
 #ifndef _BSP_H
 #define _BSP_H
 
+#ifndef ASM
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -79,8 +79,15 @@ extern int BSP_disconnect_clock_handler (void);
 
 extern int BSP_connect_clock_handler (rtems_irq_hdl hdl);
 
+/*
+ *  Prototypes for methods called from .S to support dependency tracking.
+ */
+void _InitSS555(void);
+
 #ifdef __cplusplus
 }
 #endif
 
+#endif /* !ASM */
+
 #endif
diff --git a/c/src/lib/libbsp/powerpc/ss555/irq/irq.h b/c/src/lib/libbsp/powerpc/ss555/irq/irq.h
index 3a0d7a1..31c4be9 100644
--- a/c/src/lib/libbsp/powerpc/ss555/irq/irq.h
+++ b/c/src/lib/libbsp/powerpc/ss555/irq/irq.h
@@ -44,6 +44,8 @@ int CPU_get_current_rtems_irq_handler(rtems_irq_connect_data* irq);
 int CPU_remove_rtems_irq_handler(const rtems_irq_connect_data* irq);
 int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config);
 int CPU_rtems_irq_mngt_get(rtems_irq_global_settings** config);
+void C_dispatch_irq_handler(CPU_Interrupt_frame *frame, unsigned int excNum);
+void C_default_exception_handler(CPU_Exception_frame* excPtr);
 
 /*
  * The SS555 has no external interrupt controller chip, so use the standard
diff --git a/c/src/lib/libbsp/powerpc/ss555/start/start.S b/c/src/lib/libbsp/powerpc/ss555/start/start.S
index c7575b0..6a8ef85 100644
--- a/c/src/lib/libbsp/powerpc/ss555/start/start.S
+++ b/c/src/lib/libbsp/powerpc/ss555/start/start.S
@@ -1,9 +1,10 @@
-/*  start.S
- *
+/*
  *  This file contains the entry veneer for RTEMS programs on the Intec
  *  SS555 board.  It jumps to the BSP which is responsible for performing
  *  all remaining initialization.
- *
+ */
+
+/*
  * This file is based on several others:
  *
  * (1) start360.s from the gen68360 BSP by
@@ -52,6 +53,8 @@
 #include <rtems/asm.h>
 #include <rtems/powerpc/registers.h>
 
+#include <bsp.h>
+
 /*
  *  The initial stack is set to the top of the internal RAM.
  *
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c b/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c
index 1f5e879..034ae74 100644
--- a/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c
+++ b/c/src/lib/libbsp/powerpc/ss555/startup/iss555.c
@@ -1,8 +1,8 @@
 /*
- *  iss555.c
- *
  *  Intec SS555 initialization routines.
- *
+ */
+
+/*
  *  SS555 port sponsored by Defence Research and Development Canada - Suffield
  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach at realtime.bc.ca)
  *
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/clock/clock.c b/c/src/lib/libcpu/powerpc/mpc5xx/clock/clock.c
index c344271..9f843ce 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/clock/clock.c
@@ -1,7 +1,6 @@
 /*
- *
  *  This routine initializes the PIT on the MPC5xx.
- *  The tick frequency is specified by the bsp.
+ *  The tick frequency is specified by the BSP.
  */
 
 /*
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/console-generic/console-generic.c b/c/src/lib/libcpu/powerpc/mpc5xx/console-generic/console-generic.c
index f00d111..22fee2d 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/console-generic/console-generic.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/console-generic/console-generic.c
@@ -9,8 +9,9 @@
  *   resource   minor                note
  *	SCI1	  0
  *	SCI2	  1
- *
- *
+ */
+
+/*
  *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach at realtime.bc.ca)
  *
@@ -266,11 +267,11 @@ m5xx_sci_interrupt_handler (rtems_irq_hdl_param unused)
   }
 }
 
-void m5xx_sci_nop(const rtems_irq_connect_data* ptr)
+static void m5xx_sci_nop(const rtems_irq_connect_data* ptr)
 {
 }
 
-int m5xx_sci_isOn(const rtems_irq_connect_data* ptr)
+static int m5xx_sci_isOn(const rtems_irq_connect_data* ptr)
 {
   return 1;
 }
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/include/mpc5xx.h b/c/src/lib/libcpu/powerpc/mpc5xx/include/mpc5xx.h
index 5183842..fc9b756 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/include/mpc5xx.h
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/include/mpc5xx.h
@@ -1,9 +1,9 @@
 /*
- * mpc5xx.h
  *
  * MPC5xx Internal I/O Definitions
- *
- *
+ */
+
+/*
  *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach at realtime.bc.ca)
  *
@@ -609,6 +609,14 @@ typedef struct imb_ {
 extern volatile imb_t imb;		/* defined in linkcmds */
 
 
+/*
+ * Methods shared across libcpu and the BSP.
+ */
+void clockOn(void* unused);
+void clockOff(void* unused);
+int clockIsOn(void* unused);
+rtems_isr Clock_isr(rtems_vector_number vector);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c
index 943c79f..0eb444c 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq.c
@@ -1,8 +1,8 @@
 /*
- * irq.c
- *
  *  This file contains the implementation of the function described in irq.h
- *
+ */
+
+/*
  *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach at realtime.bc.ca)
  *
@@ -21,12 +21,12 @@
 #include <libcpu/vectors.h>
 #include <libcpu/raw_exception.h>
 #include <libcpu/irq.h>
+#include <bsp/irq.h>
 
 /*
  * Convert an rtems_irq_number constant to an interrupt level
  * suitable for programming into an I/O device's interrupt level field.
  */
-
 int CPU_irq_level_from_symbolic_name(const rtems_irq_number name)
 {
   if (CPU_USIU_EXT_IRQ_0 <= name && name <= CPU_USIU_INT_IRQ_7)
@@ -138,28 +138,21 @@ static int isValidInterrupt(int irq)
   return 1;
 }
 
-int CPU_irq_enable_at_uimb(const rtems_irq_number irqLine)
+static int CPU_irq_enable_at_uimb(const rtems_irq_number irqLine)
 {
   if (!is_uimb_irq(irqLine))
     return 1;
   return 0;
 }
 
-int CPU_irq_disable_at_uimb(const rtems_irq_number irqLine)
+static int CPU_irq_disable_at_uimb(const rtems_irq_number irqLine)
 {
   if (!is_uimb_irq(irqLine))
     return 1;
   return 0;
 }
 
-int CPU_irq_enabled_at_uimb(const rtems_irq_number irqLine)
-{
-  if (!is_uimb_irq(irqLine))
-    return 0;
-  return 1;
-}
-
-int CPU_irq_enable_at_usiu(const rtems_irq_number irqLine)
+static int CPU_irq_enable_at_usiu(const rtems_irq_number irqLine)
 {
   int usiu_irq_index;
 
@@ -173,7 +166,7 @@ int CPU_irq_enable_at_usiu(const rtems_irq_number irqLine)
   return 0;
 }
 
-int CPU_irq_disable_at_usiu(const rtems_irq_number irqLine)
+static int CPU_irq_disable_at_usiu(const rtems_irq_number irqLine)
 {
   int usiu_irq_index;
 
@@ -187,17 +180,6 @@ int CPU_irq_disable_at_usiu(const rtems_irq_number irqLine)
   return 0;
 }
 
-int CPU_irq_enabled_at_usiu(const rtems_irq_number irqLine)
-{
-  int usiu_irq_index;
-
-  if (!is_usiu_irq(irqLine))
-    return 0;
-
-  usiu_irq_index = ((int) (irqLine) - CPU_USIU_IRQ_MIN_OFFSET);
-  return ppc_cached_irq_mask & (1 << (31-usiu_irq_index));
-}
-
 /*
  * --------------- RTEMS Single Irq Handler Mngt Routines ----------------
  */
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c
index 7b9cfd0..3ba7e8f 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c
@@ -3,8 +3,9 @@
  *
  *  This file contains the implementation of rtems initialization
  *  related to interrupt handling.
- *
- *
+ */
+
+/*
  *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach at realtime.bc.ca)
  *
@@ -89,7 +90,7 @@ static rtems_irq_prio irqPrioTable[CPU_IRQ_COUNT]={
   0
 };
 
-void CPU_USIU_irq_init(void)
+static void CPU_USIU_irq_init(void)
 {
   /*
    * In theory we should initialize two registers at least : SIMASK and
@@ -106,8 +107,7 @@ void CPU_USIU_irq_init(void)
 /*
  * Initialize UIMB interrupt management
  */
-void
-CPU_UIMB_irq_init(void)
+static void CPU_UIMB_irq_init(void)
 {
 }
 
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h
index c460027..2c8914e 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h
@@ -85,9 +85,9 @@
  * default raw exception handlers
  */
 
-extern	void default_exception_vector_code_prolog();
+extern	void default_exception_vector_code_prolog(void);
 extern	int  default_exception_vector_code_prolog_size;
-extern  void initialize_exceptions();
+extern  void initialize_exceptions(void);
 
 typedef void rtems_exception_handler_t (CPU_Exception_frame* excPtr);
 /*DEBUG typedef rtems_exception_handler_t cpuExcHandlerType; */
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c
index 768bd04..4a6c5be 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors_init.c
@@ -3,8 +3,9 @@
  *
  *  This include file describe the data structure and the functions implemented
  *  by rtems to handle exceptions.
- *
- *
+ */
+
+/*
  *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
  *  Copyright (C) 2004, Real-Time Systems Inc. (querbach at realtime.bc.ca)
  *
@@ -19,6 +20,7 @@
 #include <rtems/bspIo.h>
 #include <libcpu/vectors.h>
 #include <libcpu/raw_exception.h>
+#include <bsp/irq.h>
 
 extern rtems_exception_handler_t default_exception_handler;
 
@@ -26,7 +28,6 @@ static rtems_raw_except_global_settings exception_config;
 static rtems_raw_except_connect_data    exception_table[NUM_EXCEPTIONS];
 rtems_exception_handler_t* exception_handler_table[NUM_EXCEPTIONS];
 
-
 void C_default_exception_handler(CPU_Exception_frame* excPtr)
 {
   int recoverable = 0;
@@ -84,11 +85,11 @@ void C_default_exception_handler(CPU_Exception_frame* excPtr)
     }
 }
 
-void nop_except_enable(const rtems_raw_except_connect_data* ptr)
+static void nop_except_enable(const rtems_raw_except_connect_data* ptr)
 {
 }
 
-int except_always_enabled(const rtems_raw_except_connect_data* ptr)
+static int except_always_enabled(const rtems_raw_except_connect_data* ptr)
 {
   return 1;
 }
-- 
1.9.3




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