[PATCH 53/62] powerpc/score603e: Fix warnings
Joel Sherrill
joel.sherrill at oarcorp.com
Wed Oct 15 20:00:43 UTC 2014
---
c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c | 14 +-
c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c | 2 +
.../libbsp/powerpc/score603e/PCI_bus/universe.c | 23 +-
.../lib/libbsp/powerpc/score603e/console/console.c | 40 +-
c/src/lib/libbsp/powerpc/score603e/cscope.out | 11129 +++++++++++++++++++
c/src/lib/libbsp/powerpc/score603e/include/bsp.h | 88 +-
c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c | 11 +-
7 files changed, 11197 insertions(+), 110 deletions(-)
create mode 100644 c/src/lib/libbsp/powerpc/score603e/cscope.out
diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
index 817037e..999ab93 100644
--- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
+++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
@@ -1,6 +1,5 @@
/*
- *
- * COPYRIGHT (c) 1989-2009.
+ * COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -25,10 +24,10 @@
* an UNIVERSE register, without sufficient delay, the second access will
* not work correctly.
*/
-void PCI_bus_delay (void)
+static void PCI_bus_delay (void)
{
- __asm__ (" nop");
- __asm__ (" nop");
+ __asm__ volatile ("nop");
+ __asm__ volatile ("nop");
}
/*
@@ -43,7 +42,7 @@ void PCI_bus_write(
*_addr = _data;
}
-uint32_t PCI_bus_read(
+uint32_t PCI_bus_read(
volatile uint32_t * _addr /* IN */
)
{
@@ -57,8 +56,7 @@ uint32_t PCI_bus_read(
* PCI Configuration Cycle Read/Write Access which is used to access all of
* devices registers on the PCI bus. i.e.: Universe, Ethernet & PMC.
*/
-
-uint32_t Read_pci_device_register(
+uint32_t Read_pci_device_register(
uint32_t address
)
{
diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
index c50c09b..a2e084a 100644
--- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
+++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
@@ -60,6 +60,7 @@ unsigned int SCORE603e_FLASH_verify_enable( void )
return RTEMS_SUCCESSFUL;
}
+#if 0
unsigned int SCORE603e_FLASH_pci_reset_reg(
uint8_t reg,
uint32_t cmask,
@@ -79,6 +80,7 @@ unsigned int SCORE603e_FLASH_pci_reset_reg(
}
return RTEMS_SUCCESSFUL;
}
+#endif
/*
* SCORE603e_FLASH_Enable_writes
diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
index a1011da..c373aa6 100644
--- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
+++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
@@ -16,22 +16,6 @@
#include <bsp.h>
#include "PCI.h"
-/********************************************************************
- ********************************************************************
- ********* *********
- ********* Prototypes *********
- ********* *********
- ********************************************************************
- ********************************************************************/
-
-/********************************************************************
- ********************************************************************
- ********* *********
- ********* *********
- ********* *********
- ********************************************************************
- ********************************************************************/
-
typedef struct {
uint32_t PCI_ID; /* 0x80030000 */
uint32_t PCI_CSR; /* 0x80030004 */
@@ -153,7 +137,6 @@ volatile Universe_Memory *UNIVERSE =
* by the boot code. This routine should be called by user code only if
* a complete SCORE603e VME initialization is required.
*/
-
void initialize_universe(void)
{
uint32_t jumper_selection;
@@ -227,7 +210,7 @@ void set_vme_base_address (
/*
* Gets the VME base address
*/
-uint32_t get_vme_base_address (void)
+static uint32_t get_vme_base_address (void)
{
volatile uint32_t temp;
@@ -236,7 +219,7 @@ uint32_t get_vme_base_address (void)
return (temp);
}
-uint32_t get_vme_slave_size(void)
+uint32_t get_vme_slave_size(void)
{
volatile uint32_t temp;
temp = PCI_bus_read( &UNIVERSE->VSI0_BD);
@@ -249,7 +232,7 @@ uint32_t get_vme_slave_size(void)
* Set the size of the VME slave image
* Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF)
*/
-void set_vme_slave_size (uint32_t size)
+void set_vme_slave_size (uint32_t size)
{
volatile uint32_t temp;
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/console.c b/c/src/lib/libbsp/powerpc/score603e/console/console.c
index 5ae61ea..afbc5b4 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/console.c
+++ b/c/src/lib/libbsp/powerpc/score603e/console/console.c
@@ -4,8 +4,10 @@
* This driver uses the termios pseudo driver.
*
* Currently only polled mode is supported.
- *
- * COPYRIGHT (c) 1989-2009.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -36,14 +38,12 @@ int USE_FOR_CONSOLE = USE_FOR_CONSOLE_DEF;
* Console Device Driver Entry Points
*/
-/* PAGE
- *
+/*
* console_inbyte_nonblocking
*
* Console Termios polling input entry point.
*/
-
-int console_inbyte_nonblocking(
+static int console_inbyte_nonblocking(
int minor
)
{
@@ -164,8 +164,7 @@ void console_outbyte_interrupts(
#endif
-/* PAGE
- *
+/*
* console_initialize
*
* Routine called to initialize the console device driver.
@@ -178,7 +177,7 @@ rtems_device_driver console_initialize(
{
rtems_status_code status;
rtems_device_minor_number console;
- int port, chip, p0,p1;
+ int port, p0,p1;
/*
* initialize the termio interface.
@@ -234,7 +233,6 @@ rtems_device_driver console_initialize(
*/
for (port=1; port<NUM_Z85C30_PORTS; port++) {
- chip = port >> 1;
initialize_85c30_port( &Ports_85C30[port] );
}
@@ -245,14 +243,13 @@ rtems_device_driver console_initialize(
return RTEMS_SUCCESSFUL;
}
-/* PAGE
- *
+/*
* console_write_support
*
* Console Termios output entry point.
*
*/
-ssize_t console_write_support(
+static ssize_t console_write_support(
int minor,
const char *buf,
size_t len)
@@ -289,12 +286,10 @@ ssize_t console_write_support(
return nwrite;
}
-/* PAGE
- *
+/*
* console_open
*
* open a port as a termios console.
- *
*/
rtems_device_driver console_open(
rtems_device_major_number major,
@@ -354,19 +349,10 @@ rtems_device_driver console_open(
}
#if (CONSOLE_USE_INTERRUPTS)
-
/*
* console_outbyte_interrupts
*
* This routine transmits a character out.
- *
- * Input parameters:
- * port - port to transmit character to
- * ch - character to be transmitted
- *
- * Output parameters: NONE
- *
- * Return values: NONE
*/
void console_outbyte_interrupts(
const Port_85C30_info *Port,
@@ -396,12 +382,10 @@ void console_outbyte_interrupts(
Ring_buffer_Add_character( &protocol->TX_Buffer, ch );
}
-
#endif
/* const char arg to be compatible with BSP_output_char decl. */
-void
-debug_putc_onlcr(const char c)
+static void debug_putc_onlcr(const char c)
{
int console;
volatile uint8_t *csr;
diff --git a/c/src/lib/libbsp/powerpc/score603e/cscope.out b/c/src/lib/libbsp/powerpc/score603e/cscope.out
new file mode 100644
index 0000000..80b31bd
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/score603e/cscope.out
@@ -0,0 +1,11129 @@
+cscope 15 $HOME/rtems-4.11-work/rtems/c/src/lib/libbsp/powerpc/score603e 0000068551
+ @PCI_bus/PCI.c
+
+10
+ ~<¹ems.h
+>
+
+11
+ ~<as£¹.h
+>
+
+12
+ ~<¡dio.h
+>
+
+14
+ ~<b¥.h
+>
+
+27
+ $PCI_bus_day
+ ()
+
+29
+__asm__
+ volatile ("nop");
+
+30
+__asm__
+ volatile ("nop");
+
+31
+ }
+}
+
+36
+ $PCI_bus_wre
+(
+
+37 vÞ©
+ut32_t
+ *
+_addr
+,
+
+38
+ut32_t
+
+_d©a
+
+
+41
+_d©a
+ =
+ `CÚvt_Endn_32
+( _data );
+
+42 *
+_addr
+ =
+_d©a
+;
+
+43
+ }
+}
+
+45
+ut32_t
+
+ $PCI_bus_»ad
+(
+
+46 vÞ©
+ut32_t
+ *
+_addr
+
+
+49
+ut32_t
+
+d©a
+;
+
+51
+d©a
+ = *
+_addr
+;
+
+52
+d©a
+ =
+ `CÚvt_Endn_32
+( data );
+
+53
+d©a
+;
+
+54
+ }
+}
+
+59
+ut32_t
+
+ $Rd_pci_deviû_»gi¡
+(
+
+60
+ut32_t
+
+add»ss
+
+
+63
+ut32_t
+
+d©a
+;
+
+68
+ `PCI_bus_wre
+Ð(vÞ©
+ut32_t
+*)
+SCORE603E_PCI_IO_CFG_ADDR
+,
+add»ss
+ );
+
+73
+ `PCI_bus_day
+ ();
+
+78
+d©a
+ =
+ `PCI_bus_»ad
+Ð(vÞ©
+ut32_t
+*)
+SCORE603E_PCI_IO_CFG_DATA
+ );
+
+80
+d©a
+;
+
+81
+ }
+}
+
+83
+ $Wre_pci_deviû_»gi¡
+(
+
+84
+ut32_t
+
+add»ss
+,
+
+85
+ut32_t
+
+d©a
+
+
+91
+ `PCI_bus_wre
+Ð(vÞ©
+ut32_t
+*)
+SCORE603E_PCI_IO_CFG_ADDR
+,
+add»ss
+ );
+
+96
+ `PCI_bus_day
+ ();
+
+101
+ `PCI_bus_wre
+Ð(vÞ©
+ut32_t
+*)
+SCORE603E_PCI_IO_CFG_DATA
+,
+d©a
+ );
+
+102
+ }
+}
+
+ @PCI_bus/PCI.h
+
+17 #iâdeà
+__PCI_h
+
+
+18
+ #__PCI_h
+
+
+ )
+
+24
+PCI_bus_wre
+(
+
+25 vÞ©
+ut32_t
+ *
+_addr
+,
+
+26
+ut32_t
+
+_d©a
+
+
+29
+ut32_t
+
+PCI_bus_»ad
+(
+
+30 vÞ©
+ut32_t
+ *
+_addr
+
+
+33
+ut32_t
+
+Rd_pci_deviû_»gi¡
+(
+
+34
+ut32_t
+
+add»ss
+
+
+37
+Wre_pci_deviû_»gi¡
+(
+
+38
+ut32_t
+
+add»ss
+,
+
+39
+ut32_t
+
+d©a
+
+
+ @PCI_bus/flash.c
+
+10
+ ~<¹ems.h
+>
+
+11
+ ~<as£¹.h
+>
+
+12
+ ~<¡dio.h
+>
+
+13
+ ~<y³s.h
+>
+
+15
+ ~<b¥.h
+>
+
+16
+ ~<b¥/q.h
+>
+
+17
+ ~"PCI.h
+"
+
+22
+ $SCORE603e_FLASH_Di§bË
+(
+
+23
+ut32_t
+
+¬
+
+
+26
+ut8_t
+
+v®ue
+;
+
+28
+v®ue
+ = *
+SCORE603E_BOARD_CTRL_REG
+;
+
+29
+v®ue
+ = v®u| (~
+SCORE603E_BRD_FLASH_DISABLE_MASK
+);
+
+30 *
+SCORE603E_BOARD_CTRL_REG
+ =
+v®ue
+;
+
+32
+RTEMS_SUCCESSFUL
+;
+
+33
+ }
+}
+
+35
+ $SCORE603e_FLASH_vify_abË
+( )
+
+37 vÞ©
+ut8_t
+ *
+Cl_Stus_Regi¡
+ =
+
+38 (*)
+SCORE603E_BOARD_CTRL_REG
+;
+
+39
+ut8_t
+
+ù¾_v®ue
+;
+
+40
+ut32_t
+
+pci_v®ue
+;
+
+42
+ù¾_v®ue
+ = *
+Cl_Stus_Regi¡
+;
+
+43 iàÐ
+ù¾_v®ue
+ &
+SCORE603E_BRD_FLASH_DISABLE_MASK
+ ) {
+
+44
+ `´tf
+ ("Flash Writes Disabled by board controlegister %x\n",
+
+45
+ù¾_v®ue
+ );
+
+46
+ `as£¹
+( 0x0 );
+
+49
+pci_v®ue
+ =
+ `Rd_pci_deviû_»gi¡
+( 0x800000A8 );
+
+50 ià(Ð
+pci_v®ue
+ & 0x00001000 ) == 0) {
+
+51
+ `´tf
+("Error PCI A8 \n");
+
+52
+ `as£¹
+( 0x0 );
+
+55
+pci_v®ue
+ =
+ `Rd_pci_deviû_»gi¡
+( 0x800000AC );
+
+56 iàÐ
+pci_v®ue
+ & 0x02000000) {
+
+57
+ `´tf
+("Error PCI AC \n");
+
+58
+ `as£¹
+( 0x0 );
+
+60
+RTEMS_SUCCESSFUL
+;
+
+61
+ }
+}
+
+64
+ $SCORE603e_FLASH_pci_»£t_»g
+(
+
+65
+ut8_t
+
+»g
+,
+
+66
+ut32_t
+
+cmask
+,
+
+67
+ut32_t
+
+mask
+
+
+70
+ut32_t
+
+pci_v®ue
+;
+
+71
+ut32_t
+
+v®ue
+;
+
+73
+pci_v®ue
+ =
+ `Rd_pci_deviû_»gi¡
+Ð
+»g
+ );
+
+74
+pci_v®ue
+ &ð
+cmask
+;
+
+75
+pci_v®ue
+ |ð
+mask
+;
+
+76
+ `Wre_pci_deviû_»gi¡
+Ð
+»g
+,
+pci_v®ue
+ );
+
+77
+v®ue
+ =
+ `Rd_pci_deviû_»gi¡
+Ð
+»g
+ );
+
+78 ià(
+v®ue
+ !ð
+pci_v®ue
+) {
+
+79
+ `´tf
+("E¼Ü PCI 0x%2"
+PRIX8
+" wrÙ0x%8"
+PRIX32
+"d %8"PRIX32"\n",
+»g
+,
+pci_v®ue
+,
+v®ue
+);
+
+81
+RTEMS_SUCCESSFUL
+;
+
+82
+ }
+}
+
+88
+ $SCORE603e_FLASH_EÇbË_wres
+(
+
+89
+ut32_t
+
+¬
+
+
+92
+ut8_t
+
+ù¾_v®ue
+;
+
+93
+ut32_t
+
+pci_v®ue
+;
+
+95
+ù¾_v®ue
+ = *
+SCORE603E_BOARD_CTRL_REG
+;
+
+96
+ù¾_v®ue
+ = ctrl_value & 0xbf;
+
+97 *
+SCORE603E_BOARD_CTRL_REG
+ =
+ù¾_v®ue
+;
+
+99
+pci_v®ue
+ =
+ `Rd_pci_deviû_»gi¡
+( 0x800000A8 );
+
+100
+pci_v®ue
+ |= 0x00001000;
+
+101
+ `Wre_pci_deviû_»gi¡
+Ð0x800000A8,
+pci_v®ue
+ );
+
+103
+pci_v®ue
+ =
+ `Rd_pci_deviû_»gi¡
+( 0x800000AC );
+
+104
+pci_v®ue
+ &= (~0x02000000);
+
+105
+ `Wre_pci_deviû_»gi¡
+Ð0x000000AC,
+pci_v®ue
+ );
+
+107
+RTEMS_SUCCESSFUL
+;
+
+108
+ }
+}
+
+ @PCI_bus/universe.c
+
+10
+ ~<¹ems.h
+>
+
+11
+ ~<as£¹.h
+>
+
+12
+ ~<¡dio.h
+>
+
+13
+ ~<y³s.h
+>
+
+14
+ ~<¹ems/b¥Io.h
+>
+
+16
+ ~<b¥.h
+>
+
+17
+ ~"PCI.h
+"
+
+20
+ut32_t
+
+ mPCI_ID
+;
+
+21
+ut32_t
+
+ mPCI_CSR
+;
+
+22
+ut32_t
+
+ mPCI_CLASS
+;
+
+23
+ut32_t
+
+ mPCI_MISC0
+;
+
+24
+ut32_t
+
+ mPCI_BS
+;
+
+25
+ut32_t
+
+ mBuf_0x80030014
+[ 0x0A ];
+
+26
+ut32_t
+
+ mPCI_MISC1
+;
+
+27
+ut32_t
+
+ mBuf_0x80030040
+[ 0x30 ];
+
+28
+ut32_t
+
+ mLSI0_CTL
+;
+
+29
+ut32_t
+
+ mLSI0_BS
+;
+
+30
+ut32_t
+
+ mLSI0_BD
+;
+
+31
+ut32_t
+
+ mLSI0_TO
+;
+
+32
+ut32_t
+
+ mBuf_0x80030110
+;
+
+33
+ut32_t
+
+ mLSI1_CTL
+;
+
+34
+ut32_t
+
+ mLSI1_BS
+;
+
+35
+ut32_t
+
+ mLSI1_BD
+;
+
+36
+ut32_t
+
+ mLSI1_TO
+;
+
+37
+ut32_t
+
+ mBuf_0x80030124
+;
+
+38
+ut32_t
+
+ mLSI2_CTL
+;
+
+39
+ut32_t
+
+ mLSI2_BS
+;
+
+40
+ut32_t
+
+ mLSI2_BD
+;
+
+41
+ut32_t
+
+ mLSI2_TO
+;
+
+42
+ut32_t
+
+ mBuf_0x80030138
+;
+
+43
+ut32_t
+
+ mLSI3_CTL
+;
+
+44
+ut32_t
+
+ mLSI3_BS
+;
+
+45
+ut32_t
+
+ mLSI3_BD
+;
+
+46
+ut32_t
+
+ mLSI3_TO
+;
+
+47
+ut32_t
+
+ mBuf_0x8003014C
+[ 0x09 ];
+
+48
+ut32_t
+
+ mSCYC_CTL
+;
+
+49
+ut32_t
+
+ mSCYC_ADDR
+;
+
+50
+ut32_t
+
+ mSCYC_EN
+;
+
+51
+ut32_t
+
+ mSCYC_CMP
+;
+
+52
+ut32_t
+
+ mSCYC_SWP
+;
+
+53
+ut32_t
+
+ mLMISC
+;
+
+54
+ut32_t
+
+ mSLSI
+;
+
+55
+ut32_t
+
+ mL_CMDERR
+;
+
+56
+ut32_t
+
+ mLAERR
+;
+
+57
+ut32_t
+
+ mBuf_0x80030194
+[ 0x1B ];
+
+58
+ut32_t
+
+ mDCTL
+;
+
+59
+ut32_t
+
+ mDTBC
+;
+
+60
+ut32_t
+
+ mDLA
+;
+
+61
+ut32_t
+
+ mBuf_0x8003020C
+;
+
+62
+ut32_t
+
+ mDVA
+;
+
+63
+ut32_t
+
+ mBuf_0x80030214
+;
+
+64
+ut32_t
+
+ mDCPP
+;
+
+65
+ut32_t
+
+ mBuf_0x8003021C
+;
+
+66
+ut32_t
+
+ mDGCS
+;
+
+67
+ut32_t
+
+ mD_LLUE
+;
+
+68
+ut32_t
+
+ mBuf_0x80030228
+[ 0x36 ];
+
+69
+ut32_t
+
+ mLINT_EN
+;
+
+70
+ut32_t
+
+ mLINT_STAT
+;
+
+71
+ut32_t
+
+ mLINT_MAP0
+;
+
+72
+ut32_t
+
+ mLINT_MAP1
+;
+
+73
+ut32_t
+
+ mVINT_EN
+;
+
+74
+ut32_t
+
+ mVINT_STAT
+;
+
+75
+ut32_t
+
+ mVINT_MAP0
+;
+
+76
+ut32_t
+
+ mVINT_MAP1
+;
+
+77
+ut32_t
+
+ mSTATID
+;
+
+78
+ut32_t
+
+ mV1_STATID
+;
+
+79
+ut32_t
+
+ mV2_STATID
+;
+
+80
+ut32_t
+
+ mV3_STATID
+;
+
+81
+ut32_t
+
+ mV4_STATID
+;
+
+82
+ut32_t
+
+ mV5_STATID
+;
+
+83
+ut32_t
+
+ mV6_STATID
+;
+
+84
+ut32_t
+
+ mV7_STATID
+;
+
+85
+ut32_t
+
+ mBuf_0x80030340
+[ 0x30 ];
+
+86
+ut32_t
+
+ mMAST_CTL
+;
+
+87
+ut32_t
+
+ mMISC_CTL
+;
+
+88
+ut32_t
+
+ mMISC_STAT
+;
+
+89
+ut32_t
+
+ mUSER_AM
+;
+
+90
+ut32_t
+
+ mBuf_0x80030410
+[ 0x2bc ];
+
+91
+ut32_t
+
+ mVSI0_CTL
+;
+
+92
+ut32_t
+
+ mVSI0_BS
+;
+
+93
+ut32_t
+
+ mVSI0_BD
+;
+
+94
+ut32_t
+
+ mVSI0_TO
+;
+
+95
+ut32_t
+
+ mBuf_0x80030f10
+;
+
+96
+ut32_t
+
+ mVSI1_CTL
+;
+
+97
+ut32_t
+
+ mVSI1_BS
+;
+
+98
+ut32_t
+
+ mVSI1_BD
+;
+
+99
+ut32_t
+
+ mVSI1_TO
+;
+
+100
+ut32_t
+
+ mBuf_0x80030F24
+;
+
+101
+ut32_t
+
+ mVSI2_CTL
+;
+
+102
+ut32_t
+
+ mVSI2_BS
+;
+
+103
+ut32_t
+
+ mVSI2_BD
+;
+
+104
+ut32_t
+
+ mVSI2_TO
+;
+
+105
+ut32_t
+
+ mBuf_0x80030F38
+;
+
+106
+ut32_t
+
+ mVSI3_CTL
+;
+
+107
+ut32_t
+
+ mVSI3_BS
+;
+
+108
+ut32_t
+
+ mVSI3_BD
+;
+
+109
+ut32_t
+
+ mVSI3_TO
+;
+
+110
+ut32_t
+
+ mBuf_0x80030F4C
+[ 0x9 ];
+
+111
+ut32_t
+
+ mVRAI_CTL
+;
+
+112
+ut32_t
+
+ mVRAI_BS
+;
+
+113
+ut32_t
+
+ mBuf_0x80030F78
+[ 0x2 ];
+
+114
+ut32_t
+
+ mVCSR_CTL
+;
+
+115
+ut32_t
+
+ mVCSR_TO
+;
+
+116
+ut32_t
+
+ mV_AMERR
+;
+
+117
+ut32_t
+
+ mVAERR
+;
+
+118
+ut32_t
+
+ mBuf_0x80030F90
+[ 0x19 ];
+
+119
+ut32_t
+
+ mVCSR_CLR
+;
+
+120
+ut32_t
+
+ mVCSR_SET
+;
+
+121
+ut32_t
+
+ mVCSR_BS
+;
+
+122 }
+ tUniv£_MemÜy
+;
+
+124 vÞ©
+Univ£_MemÜy
+ *
+ gUNIVERSE
+ =
+
+125 (vÞ©
+Univ£_MemÜy
+ *)
+SCORE603E_UNIVERSE_BASE
+;
+
+140
+ $lize_univ£
+()
+
+142
+ut32_t
+
+jum³r_£ËùiÚ
+;
+
+143
+ut32_t
+
+pci_id
+;
+
+148
+jum³r_£ËùiÚ
+ =
+ `PCI_bus_»ad
+(
+
+149 (vÞ©
+ut32_t
+*)
+SCORE603E_VME_JUMPER_ADDR
+ );
+
+150
+ `´tk
+("initialize_universe: Read 0x%x = 0x%x\n",
+
+151
+SCORE603E_VME_JUMPER_ADDR
+,
+jum³r_£ËùiÚ
+);
+
+152
+jum³r_£ËùiÚ
+ = (jumper_selection >> 3) & 0x1f;
+
+157
+pci_id
+ =
+ `Rd_pci_deviû_»gi¡
+Ð
+SCORE603E_IO_VME_UNIVERSE_BASE
+ );
+
+162 ià(
+pci_id
+ !ð
+SCORE603E_UNIVERSE_CHIP_ID
+ ){
+
+163
+ `´tk
+ ("Inv®id SCORE603E_UNIVERSE_CHIP_ID: 0x08%"
+PRId32
+ "\n",
+pci_id
+);
+
+164
+ `¹ems_çl_rÜ_occu¼ed
+( 0x603e0bad );
+
+166
+ `´tk
+("initialize_universe: Reg 0x%xead 0x%x\n",
+
+167
+SCORE603E_IO_VME_UNIVERSE_BASE
+,
+pci_id
+ );
+
+173
+ }
+}
+
+180
+ $£t_vme_ba£_add»ss
+ (
+
+181
+ut32_t
+
+ba£_add»ss
+
+
+184 vÞ©
+ut32_t
+
+mp
+;
+
+189
+mp
+ = (
+ `PCI_bus_»ad
+Ð&
+UNIVERSE
+->
+VSI0_BD
+) & 0xFFFFF000) -
+
+190 Ð
+ `PCI_bus_»ad
+Ð&
+UNIVERSE
+->
+VSI0_BS
+) & 0xFFFFF000);
+
+196
+ `PCI_bus_wre
+Ð&
+UNIVERSE
+->
+VSI0_BS
+, (
+ba£_add»ss
+ & 0xFFFFF000) );
+
+201
+ `PCI_bus_wre
+Ð&
+UNIVERSE
+->
+VSI0_BD
+,
+mp
+ );
+
+206
+mp
+ = 0xFFFFFFFF - (
+ba£_add»ss
+ & 0xFFFFF000) + 1 + 0x80000000;
+
+207
+ `PCI_bus_wre
+Ð&
+UNIVERSE
+->
+VSI0_TO
+,
+mp
+ );
+
+208
+ }
+}
+
+213
+ut32_t
+
+ $g_vme_ba£_add»ss
+ ()
+
+215 vÞ©
+ut32_t
+
+mp
+;
+
+217
+mp
+ =
+ `PCI_bus_»ad
+Ð&
+UNIVERSE
+->
+VSI0_BS
+ );
+
+218
+mp
+ &= 0xFFFFF000;
+
+219 (
+mp
+);
+
+220
+ }
+}
+
+222
+ut32_t
+
+ $g_vme_¦ave_size
+()
+
+224 vÞ©
+ut32_t
+
+mp
+;
+
+225
+mp
+ =
+ `PCI_bus_»ad
+Ð&
+UNIVERSE
+->
+VSI0_BD
+);
+
+226
+mp
+ &= 0xFFFFF000;
+
+227
+mp
+ =em°-
+ `g_vme_ba£_add»ss
+ ();
+
+228
+mp
+;
+
+229
+ }
+}
+
+235
+ $£t_vme_¦ave_size
+ (
+ut32_t
+
+size
+)
+
+237 vÞ©
+ut32_t
+
+mp
+;
+
+239 ià(
+size
+<0)
+
+240
+size
+ = 0;
+
+242 ià(
+size
+ > 0x17FFFFF)
+
+243
+size
+ = 0x17FFFFF;
+
+248
+mp
+ =
+ `g_vme_ba£_add»ss
+ ();
+
+253
+mp
+ =em°+ (
+size
+ & 0xFFFFF000);
+
+254
+ `PCI_bus_wre
+Ð&
+UNIVERSE
+->
+VSI0_BD
+,
+mp
+ );
+
+255
+ }
+}
+
+ @console/85c30.c
+
+17
+ ~<¹ems.h
+>
+
+18
+ ~<b¥.h
+>
+
+19
+ ~<¹ems/libio.h
+>
+
+20
+ ~<as£¹.h
+>
+
+22
+ ~"85c30.h
+"
+
+23
+ ~"cÚsÞeb¥.h
+"
+
+25
+ #STATUS_REGISTER
+ 0x00
+
+ )
+
+26
+ #DATA_REGISTER
+ 0x08
+
+ )
+
+28
+ #Z8530_Stus_Is_RX_ch¬aù_avaabË
+Ð
+_¡©us
+ ) \
+
+29 Ð(
+_¡©us
+è& 0x01 )
+
+ )
+
+31
+ #Z8530_Stus_Is_TX_bufãr_em±y
+Ð
+_¡©us
+ ) \
+
+32 Ð(
+_¡©us
+è& 0x04 )
+
+ )
+
+34
+ #Z8530_Stus_Is_b»ak_abÜt
+Ð
+_¡©us
+ ) \
+
+35 Ð(
+_¡©us
+è& 0x80 )
+
+ )
+
+38
+ m»ad_£tup
+;
+
+39
+ mwre_£tup
+;
+
+40
+ mmask_v®ue
+;
+
+41 }
+ tch¬_size_fo
+;
+
+43 cÚ¡
+ch¬_size_fo
+
+ gCh¬_size_85c30
+[] = {
+
+44 {
+Z8530_READ_CHARACTER_BITS_8
+,
+Z8530_WRITE_CHARACTER_BITS_8
+, 0xFF },
+
+45 {
+Z8530_READ_CHARACTER_BITS_7
+,
+Z8530_WRITE_CHARACTER_BITS_7
+, 0x7F },
+
+46 {
+Z8530_READ_CHARACTER_BITS_6
+,
+Z8530_WRITE_CHARACTER_BITS_6
+, 0x3F },
+
+47 {
+Z8530_READ_CHARACTER_BITS_5
+,
+Z8530_WRITE_CHARACTER_BITS_5
+, 0x1F }
+
+50 cÚ¡
+ gClock_¥d_85c30
+[] = {
+
+51
+Z8530_x1_CLOCK
+,
+Z8530_x16_CLOCK
+,
+Z8530_x32_CLOCK
+,
+Z8530_x64_CLOCK
+ };
+
+53 cÚ¡
+ gStÝ_b_85c30
+[] = {
+
+54
+Z8530_STOP_BITS_1
+,
+Z8530_STOP_BITS_1_AND_A_HALF
+,
+Z8530_STOP_BITS_2
+ };
+
+56 cÚ¡
+ gP¬y_85c30
+[] = {
+
+57
+Z8530_PARITY_NONE
+,
+Z8530_PARITY_ODD
+,
+Z8530_PARITY_EVEN
+ };
+
+65
+ $Rd_85c30_»gi¡
+(
+
+66 vÞ©*
+c¤
+,
+
+67
+»gi¡_numb
+
+
+70
+D©a
+;
+
+72 *
+c¤
+ =
+»gi¡_numb
+;
+
+74
+ `¹ems_b¥_day__bus_cyþes
+( 40 );
+
+76
+D©a
+ = *
+c¤
+;
+
+78
+ `¹ems_b¥_day__bus_cyþes
+( 40 );
+
+80
+D©a
+;
+
+81
+ }
+}
+
+88
+ $Wre_85c30_»gi¡
+(
+
+89 vÞ©*
+c¤
+,
+
+90
+»gi¡_numb
+,
+
+91
+d©a
+
+
+94 *
+c¤
+ =
+»gi¡_numb
+;
+
+96
+ `¹ems_b¥_day__bus_cyþes
+( 40 );
+
+97 *
+c¤
+ =
+d©a
+;
+
+98
+ `¹ems_b¥_day__bus_cyþes
+( 40 );
+
+99
+ }
+}
+
+108
+ $Re£t_85c30_ch
+(
+
+109 vÞ©*
+ù¾_0
+,
+
+110 vÞ©*
+ù¾_1
+
+
+113
+ `Wre_85c30_»gi¡
+Ð
+ù¾_0
+, 0x09, 0x80 );
+
+114
+ `Wre_85c30_»gi¡
+Ð
+ù¾_1
+, 0x09, 0x40 );
+
+115
+ }
+}
+
+123
+ $lize_85c30_pÜt
+(
+
+124 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+
+
+127
+ut16_t
+
+v®ue
+;
+
+128 vÞ©*
+ù¾
+;
+
+129
+CÚsÞe_PrÙocÞ
+ *
+Sup
+;
+
+130
+ut16_t
+
+baud_cÚ¡ªt
+;
+
+132
+Sup
+ =
+PÜt
+->
+PrÙocÞ
+;
+
+133
+ù¾
+ =
+PÜt
+->ctrl;
+
+135
+baud_cÚ¡ªt
+ =
+ `_ScÜe603e_Z8530_Baud
+Ð
+PÜt
+->
+Ch
+->
+þock_äequcy
+,
+
+136
+PÜt
+->
+Ch
+->
+þock_x
+,
+Sup
+->
+baud_¿
+ );
+
+142
+v®ue
+ =
+Clock_¥d_85c30
+[
+PÜt
+->
+Ch
+->
+þock_¥d
+ ] |
+
+143
+StÝ_b_85c30
+[
+Sup
+->
+¡Ý_bs
+ ] |
+
+144
+P¬y_85c30
+[
+Sup
+->
+·ry
+ ];
+
+145
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x04,
+v®ue
+ );
+
+150
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 1, 0 );
+
+152 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+156
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 2,
+PÜt
+->
+Ch
+->
+veùÜ
+ );
+
+162
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x03, 0x00 );
+
+167
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 5, 0x00 );
+
+176
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 9, 0x00 );
+
+181
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x0a, 0x00 );
+
+188
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x0b, 0x56 );
+
+190
+v®ue
+ =
+baud_cÚ¡ªt
+;
+
+197
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x0c,
+v®ue
+ & 0xff );
+
+203
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x0d,
+v®ue
+>>8 );
+
+211
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x0e, 0x07 );
+
+223
+v®ue
+ = 0x01;
+
+224
+v®ue
+ = v®u|
+Ch¬_size_85c30
+[
+Sup
+->
+»ad_ch¬_bs
+ ].
+»ad_£tup
+;
+
+226
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x03,
+v®ue
+ );
+
+238
+v®ue
+ = 0x8a;
+
+239
+v®ue
+ = v®u|
+Ch¬_size_85c30
+[
+Sup
+->
+wre_ch¬_bs
+ ].
+wre_£tup
+;
+
+240
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x05,
+v®ue
+ );
+
+246
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x00, 0xf0 );
+
+248 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+252
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 1, 0x10 );
+
+259
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 15, 0x00 );
+
+264
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 0x00, 0x10 );
+
+266 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+274
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 1, 0x16 );
+
+280
+ `Wre_85c30_»gi¡
+Ð
+ù¾
+, 9, 0x0A );
+
+287
+ `Wre_85c30_»gi¡
+Ð
+PÜt
+->
+ù¾
+,
+STATUS_REGISTER
+, 0x38 );
+
+291
+ }
+}
+
+300
+ $outby_pÞËd_85c30
+(
+
+301 vÞ©*
+c¤
+,
+
+302
+ch
+
+
+305
+z8530_¡©us
+;
+
+306
+ut32_t
+
+i¤Ëv
+;
+
+308
+ `¹ems_¼u±_di§bË
+Ð
+i¤Ëv
+ );
+
+314
+z8530_¡©us
+ =
+ `Rd_85c30_»gi¡
+Ð
+c¤
+,
+STATUS_REGISTER
+ );
+
+315 } !
+ `Z8530_Stus_Is_TX_bufãr_em±y
+Ð
+z8530_¡©us
+ ) );
+
+320
+ `Wre_85c30_»gi¡
+Ð
+c¤
+,
+DATA_REGISTER
+, (è
+ch
+ );
+
+322
+ `¹ems_¼u±_abË
+Ð
+i¤Ëv
+ );
+
+323
+ }
+}
+
+332
+ $by_nÚblockg_85c30
+(
+
+333 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+
+
+336 vÞ©*
+c¤
+;
+
+337
+z8530_¡©us
+;
+
+338
+ut8_t
+
+d©a
+;
+
+340
+c¤
+ =
+PÜt
+->
+ù¾
+;
+
+345
+z8530_¡©us
+ =
+ `Rd_85c30_»gi¡
+Ð
+c¤
+,
+STATUS_REGISTER
+ );
+
+346 iàÐ!
+ `Z8530_Stus_Is_RX_ch¬aù_avaabË
+Ð
+z8530_¡©us
+ ) )
+
+352
+d©a
+ =
+ `Rd_85c30_»gi¡
+Ð
+c¤
+,
+DATA_REGISTER
+ );
+
+353
+d©a
+ &ð
+Ch¬_size_85c30
+[
+PÜt
+->
+PrÙocÞ
+->
+»ad_ch¬_bs
+ ].
+mask_v®ue
+;
+
+355
+d©a
+;
+
+356
+ }
+}
+
+362 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+369
+¹ems_i¤
+
+ $ISR_85c30_Async
+(
+
+370 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+
+
+373
+ut16_t
+
+¡©us
+;
+
+374 vÞ©
+CÚsÞe_PrÙocÞ
+ *
+PrÙocÞ
+;
+
+375
+d©a
+;
+
+376
+boÞ
+
+did_somhg
+ =
+çl£
+;
+
+378
+PrÙocÞ
+ =
+PÜt
+->Protocol;
+
+380
+¡©us
+ =
+ `Rd_85c30_»gi¡
+Ð
+PÜt
+->
+ù¾
+, 0x00 );
+
+386 iàÐ
+ `Z8530_Stus_Is_RX_ch¬aù_avaabË
+Ð
+¡©us
+ ) ) {
+
+387
+d©a
+ =
+ `Rd_85c30_»gi¡
+Ð
+PÜt
+->
+ù¾
+,
+DATA_REGISTER
+ );
+
+388
+d©a
+ &ð
+Ch¬_size_85c30
+[
+PÜt
+->
+PrÙocÞ
+->
+»ad_ch¬_bs
+ ].
+mask_v®ue
+;
+
+390
+ `¹ems_rmios_queue_¿w_ch¬aùs
+Ð
+PÜt
+->
+PrÙocÞ
+->
+cÚsÞe_rmios_d©a
+,
+
+391 &
+d©a
+, 1 );
+
+392
+did_somhg
+ =
+ue
+;
+
+399 ià(
+ `Z8530_Stus_Is_TX_bufãr_em±y
+Ð
+¡©us
+ ) ) {
+
+400 iàÐ!
+ `Rg_bufãr_Is_em±y
+Ð&
+PrÙocÞ
+->
+TX_Bufãr
+ ) ) {
+
+401
+ `Rg_bufãr_Remove_ch¬aù
+Ð&
+PrÙocÞ
+->
+TX_Bufãr
+,
+d©a
+ );
+
+402
+ `Wre_85c30_»gi¡
+Ð
+PÜt
+->
+ù¾
+,
+DATA_REGISTER
+,
+d©a
+ );
+
+405
+PrÙocÞ
+->
+Is_TX_aùive
+ =
+çl£
+;
+
+406
+ `Wre_85c30_»gi¡
+Ð
+PÜt
+->
+ù¾
+,
+STATUS_REGISTER
+, 0x28 );
+
+409
+did_somhg
+ =
+ue
+;
+
+419
+ `Wre_85c30_»gi¡
+Ð
+PÜt
+->
+ù¾
+,
+STATUS_REGISTER
+, 0x38 );
+
+420
+ }
+}
+
+ @console/85c30.h
+
+13 #iâdeà
+__85c30_H
+
+
+14
+ #__85c30_H
+
+
+ )
+
+20
+ #Z8530_x1_CLOCK
+ 0x00
+
+ )
+
+21
+ #Z8530_x16_CLOCK
+ 0x40
+
+ )
+
+22
+ #Z8530_x32_CLOCK
+ 0x80
+
+ )
+
+23
+ #Z8530_x64_CLOCK
+ 0xC0
+
+ )
+
+28
+ #Z8530_STOP_BITS_1
+ 0x04
+
+ )
+
+29
+ #Z8530_STOP_BITS_1_AND_A_HALF
+ 0x08
+
+ )
+
+30
+ #Z8530_STOP_BITS_2
+ 0x0C
+
+ )
+
+35
+ #Z8530_PARITY_NONE
+ 0x00
+
+ )
+
+36
+ #Z8530_PARITY_ODD
+ 0x01
+
+ )
+
+37
+ #Z8530_PARITY_EVEN
+ 0x03
+
+ )
+
+42
+ #Z8530_READ_CHARACTER_BITS_8
+ 0xC0
+
+ )
+
+43
+ #Z8530_READ_CHARACTER_BITS_7
+ 0x40
+
+ )
+
+44
+ #Z8530_READ_CHARACTER_BITS_6
+ 0x80
+
+ )
+
+45
+ #Z8530_READ_CHARACTER_BITS_5
+ 0x00
+
+ )
+
+47
+ #Z8530_WRITE_CHARACTER_BITS_8
+ 0x60
+
+ )
+
+48
+ #Z8530_WRITE_CHARACTER_BITS_7
+ 0x20
+
+ )
+
+49
+ #Z8530_WRITE_CHARACTER_BITS_6
+ 0x40
+
+ )
+
+50
+ #Z8530_WRITE_CHARACTER_BITS_5
+ 0x00
+
+ )
+
+ @console/console.c
+
+18
+ ~<b¥.h
+>
+
+19
+ ~<¹ems/libio.h
+>
+
+20
+ ~<¡dlib.h
+>
+
+21
+ ~<as£¹.h
+>
+
+23
+ ~"cÚsÞeb¥.h
+"
+
+24
+ ~<¹ems/b¥Io.h
+>
+
+33
+ #USE_FOR_CONSOLE_DEF
+ 0
+
+ )
+
+34
+ gUSE_FOR_CONSOLE
+ =
+USE_FOR_CONSOLE_DEF
+;
+
+46
+ $cÚsÞe_by_nÚblockg
+(
+
+47
+mÜ
+
+
+50
+pÜt
+ =
+mÜ
+;
+
+55
+ `as£¹
+ (
+pÜt
+ <
+NUM_Z85C30_PORTS
+ );
+
+60
+ `by_nÚblockg_85c30
+Ð&
+PÜts_85C30
+[
+pÜt
+ ] );
+
+61
+ }
+}
+
+63
+¹ems_deviû_driv
+
+ $cÚsÞe_þo£
+(
+
+64
+¹ems_deviû_majÜ_numb
+
+majÜ
+,
+
+65
+¹ems_deviû_mÜ_numb
+
+mÜ
+,
+
+66 *
+¬g
+
+
+69
+ `¹ems_rmios_þo£
+ (
+¬g
+);
+
+70
+ }
+}
+
+72
+¹ems_deviû_driv
+
+ $cÚsÞe_»ad
+(
+
+73
+¹ems_deviû_majÜ_numb
+
+majÜ
+,
+
+74
+¹ems_deviû_mÜ_numb
+
+mÜ
+,
+
+75 *
+¬g
+
+
+78
+ `¹ems_rmios_»ad
+ (
+¬g
+);
+
+79
+ }
+}
+
+81
+¹ems_deviû_driv
+
+ $cÚsÞe_wre
+(
+
+82
+¹ems_deviû_majÜ_numb
+
+majÜ
+,
+
+83
+¹ems_deviû_mÜ_numb
+
+mÜ
+,
+
+84 *
+¬g
+
+
+87
+ `¹ems_rmios_wre
+ (
+¬g
+);
+
+88
+ }
+}
+
+90
+¹ems_deviû_driv
+
+ $cÚsÞe_cÚÞ
+(
+
+91
+¹ems_deviû_majÜ_numb
+
+majÜ
+,
+
+92
+¹ems_deviû_mÜ_numb
+
+mÜ
+,
+
+93 *
+¬g
+
+
+96
+ `¹ems_rmios_ioùl
+ (
+¬g
+);
+
+97
+ }
+}
+
+103 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+105
+¹ems_i¤
+
+ $cÚsÞe_i¤
+(
+
+106
+¹ems_veùÜ_numb
+
+veùÜ
+
+
+109
+i
+;
+
+111
+i
+=0; i <
+NUM_Z85C30_PORTS
+; i++){
+
+112
+ `ISR_85c30_Async
+Ð&
+PÜts_85C30
+[
+i
+] );
+
+114
+ }
+}
+
+116
+ $cÚsÞe_ex
+()
+
+118
+i
+;
+
+119 vÞ©
+Rg_bufãr_t
+ *
+bufãr
+;
+
+120
+ut32_t
+
+ch
+;
+
+122
+i
+=0 ; i <
+NUM_Z85C30_PORTS
+ ; i++ ) {
+
+124
+bufãr
+ = &Ð
+PÜts_85C30
+[
+i
+].
+PrÙocÞ
+->
+TX_Bufãr
+);
+
+126 !
+ `Rg_bufãr_Is_em±y
+Ð
+bufãr
+ ) ) {
+
+127
+ `Rg_bufãr_Remove_ch¬aù
+Ð
+bufãr
+,
+ch
+ );
+
+128
+ `outby_pÞËd_85c30
+Ð
+PÜts_85C30
+[
+i
+].
+ù¾
+,
+ch
+ );
+
+131
+ }
+}
+
+133
+ $cÚsÞe_lize_¼u±s
+( )
+
+135 vÞ©
+Rg_bufãr_t
+ *
+bufãr
+;
+
+136
+CÚsÞe_PrÙocÞ
+ *
+´ÙocÞ
+;
+
+137
+i
+;
+
+139
+i
+=0 ; i <
+NUM_Z85C30_PORTS
+ ; i++ ) {
+
+140
+´ÙocÞ
+ =
+PÜts_85C30
+[
+i
+].
+PrÙocÞ
+;
+
+145
+bufãr
+ = &
+´ÙocÞ
+->
+TX_Bufãr
+;
+
+146
+ `Rg_bufãr_Inlize
+Ð
+bufãr
+ );
+
+147
+´ÙocÞ
+->
+Is_TX_aùive
+ =
+çl£
+;
+
+153
+i
+=0; i <
+NUM_Z85C30_CHIPS
+; i++)
+
+154
+ `£t_veùÜ
+Ð
+cÚsÞe_i¤
+,
+Chs_85C30
+[
+i
+].
+veùÜ
+, 1 );
+
+157
+ `©ex
+Ð
+cÚsÞe_ex
+ );
+
+159
+ }
+}
+
+160
+cÚsÞe_outby_¼u±s
+(
+
+161 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+,
+
+162
+ch
+
+
+172
+¹ems_deviû_driv
+
+ $cÚsÞe_lize
+(
+
+173
+¹ems_deviû_majÜ_numb
+
+majÜ
+,
+
+174
+¹ems_deviû_mÜ_numb
+
+mÜ
+,
+
+175 *
+¬g
+
+
+178
+¹ems_¡©us_code
+
+¡©us
+;
+
+179
+¹ems_deviû_mÜ_numb
+
+cÚsÞe
+;
+
+180
+pÜt
+,
+p0
+,
+p1
+;
+
+185
+ `¹ems_rmios_lize
+();
+
+190
+cÚsÞe
+ =
+USE_FOR_CONSOLE
+;
+
+191
+¡©us
+ =
+ `¹ems_io_»gi¡_Çme
+Ð"/dev/cÚsÞe",
+majÜ
+,
+cÚsÞe
+ );
+
+192 ià(
+¡©us
+ !ð
+RTEMS_SUCCESSFUL
+)
+
+193
+ `¹ems_çl_rÜ_occu¼ed
+(
+¡©us
+);
+
+205 #iàÐ
+INITIALIZE_COM_PORTS
+ )
+
+211
+pÜt
+=0;
Üt<
+NUM_Z85C30_PORTS
+;
ort++){
+
+212
+p0
+ =
+pÜt
+;
+
+213
+pÜt
+++;
+
+214
+p1
+ =
+pÜt
+;
+
+215
+ `Re£t_85c30_ch
+Ð
+PÜts_85C30
+[
+p0
+].
+ù¾
+, PÜts_85C30[
+p1
+].ctrl );
+
+221
+pÜt
+=2;
Üt<
+NUM_Z85C30_PORTS
+;
ort++){
+
+222
+p0
+ =
+pÜt
+;
+
+223
+pÜt
+++;
+
+224
+p1
+ =
+pÜt
+;
+
+225
+ `Re£t_85c30_ch
+Ð
+PÜts_85C30
+[
+p0
+].
+ù¾
+, PÜts_85C30[
+p1
+].ctrl );
+
+235
+pÜt
+=1;
Üt<
+NUM_Z85C30_PORTS
+;
ort++) {
+
+236
+ `lize_85c30_pÜt
+Ð&
+PÜts_85C30
+[
+pÜt
+] );
+
+239 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+240
+ `cÚsÞe_lize_¼u±s
+();
+
+243
+RTEMS_SUCCESSFUL
+;
+
+244
+ }
+}
+
+252
+ssize_t
+
+ $cÚsÞe_wre_suµÜt
+(
+
+253
+mÜ
+,
+
+254 cÚ¡ *
+buf
+,
+
+255
+size_t
+
+Ën
+)
+
+257
+nwre
+ = 0;
+
+258 vÞ©
+ut8_t
+ *
+c¤
+;
+
+259
+pÜt
+ =
+mÜ
+;
+
+264
+ `as£¹
+ (
+pÜt
+ <
+NUM_Z85C30_PORTS
+ );
+
+269
+c¤
+ =
+PÜts_85C30
+[
+pÜt
+ ].
+ù¾
+;
+
+274
+nwre
+ <
+Ën
+) {
+
+275 #ià(
+CONSOLE_USE_INTERRUPTS
+)
+
+276
+ `cÚsÞe_outby_¼u±s
+Ð&
+PÜts_85C30
+[
+pÜt
+ ], *
+buf
+++ );
+
+278
+ `outby_pÞËd_85c30
+Ð
+c¤
+, *
+buf
+++ );
+
+280
+nwre
+++;
+
+286
+nwre
+;
+
+287
+ }
+}
+
+294
+¹ems_deviû_driv
+
+ $cÚsÞe_Ý
+(
+
+295
+¹ems_deviû_majÜ_numb
+
+majÜ
+,
+
+296
+¹ems_deviû_mÜ_numb
+
+mÜ
+,
+
+297 *
+¬g
+
+
+300
+¹ems_¡©us_code
+
+sc
+;
+
+301
+pÜt
+ =
+mÜ
+;
+
+302 #ià(
+CONSOLE_USE_INTERRUPTS
+)
+
+303
+¹ems_libio_Ý_þo£_¬gs_t
+ *
+¬gs
+ =
+¬g
+;
+
+304 cÚ¡
+¹ems_rmios_ÿÎbacks
+
+C®lbacks
+ = {
+
+305
+NULL
+,
+
+306
+NULL
+,
+
+307
+NULL
+,
+
+308
+cÚsÞe_wre_suµÜt
+,
+
+309
+NULL
+,
+
+310
+NULL
+,
+
+311
+NULL
+,
+
+315 cÚ¡
+¹ems_rmios_ÿÎbacks
+
+pÞlC®lbacks
+ = {
+
+316
+NULL
+,
+
+317
+NULL
+,
+
+318
+cÚsÞe_by_nÚblockg
+,
+
+319
+cÚsÞe_wre_suµÜt
+,
+
+320
+NULL
+,
+
+321
+NULL
+,
+
+322
+NULL
+,
+
+330 ià(
+mÜ
+ < 0)
+
+331
+RTEMS_INVALID_NUMBER
+;
+
+333 iàÐ
+pÜt
+ >
+NUM_Z85C30_PORTS
+ )
+
+334
+RTEMS_INVALID_NUMBER
+;
+
+340 #ià(
+CONSOLE_USE_INTERRUPTS
+)
+
+341
+sc
+ =
+ `¹ems_rmios_Ý
+Ð
+majÜ
+,
+mÜ
+,
+¬g
+, &
+C®lbacks
+ );
+
+343
+PÜts_85C30
+[
+mÜ
+ ].
+PrÙocÞ
+->
+cÚsÞe_rmios_d©a
+ =
+¬gs
+->
+iÝ
+->
+d©a1
+;
+
+345
+sc
+ =
+ `¹ems_rmios_Ý
+Ð
+majÜ
+,
+mÜ
+,
+¬g
+, &
+pÞlC®lbacks
+ );
+
+348
+sc
+;
+
+349
+ }
+}
+
+351 #ià(
+CONSOLE_USE_INTERRUPTS
+)
+
+357
+ $cÚsÞe_outby_¼u±s
+(
+
+358 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+,
+
+359
+ch
+
+
+362
+CÚsÞe_PrÙocÞ
+ *
+´ÙocÞ
+;
+
+363
+ut32_t
+
+i¤Ëv
+;
+
+365
+´ÙocÞ
+ =
+PÜt
+->
+PrÙocÞ
+;
+
+371 iàÐ
+´ÙocÞ
+->
+Is_TX_aùive
+ =ð
+çl£
+ ) {
+
+373
+ `¹ems_¼u±_di§bË
+Ð
+i¤Ëv
+ );
+
+374
+´ÙocÞ
+->
+Is_TX_aùive
+ =
+ue
+;
+
+375
+ `outby_pÞËd_85c30
+Ð
+PÜt
+->
+ù¾
+,
+ch
+ );
+
+376
+ `¹ems_¼u±_abË
+Ð
+i¤Ëv
+ );
+
+381
+ `Rg_bufãr_Is_fuÎ
+Ð&
+´ÙocÞ
+->
+TX_Bufãr
+ ) );
+
+383
+ `Rg_bufãr_Add_ch¬aù
+Ð&
+´ÙocÞ
+->
+TX_Bufãr
+,
+ch
+ );
+
+384
+ }
+}
+
+388
+ $debug_putc_Úlü
+(cÚ¡
+c
+)
+
+390
+cÚsÞe
+;
+
+391 vÞ©
+ut8_t
+ *
+c¤
+;
+
+392
+ut32_t
+
+i¤Ëv
+;
+
+394
+cÚsÞe
+ =
+USE_FOR_CONSOLE
+;
+
+395
+c¤
+ =
+PÜts_85C30
+[
+cÚsÞe
+ ].
+ù¾
+;
+
+397 ià('\n'==
+c
+){
+
+398
+ `¹ems_¼u±_di§bË
+Ð
+i¤Ëv
+ );
+
+399
+ `outby_pÞËd_85c30
+Ð
+c¤
+, '\r' );
+
+400
+__asm__
+ volatile("isync");
+
+401
+ `¹ems_¼u±_abË
+Ð
+i¤Ëv
+ );
+
+404
+ `¹ems_¼u±_di§bË
+Ð
+i¤Ëv
+ );
+
+405
+ `outby_pÞËd_85c30
+Ð
+c¤
+,
+c
+ );
+
+406
+__asm__
+ volatile("isync");
+
+407
+ `¹ems_¼u±_abË
+Ð
+i¤Ëv
+ );
+
+408
+ }
+}
+
+410
+BSP_ouut_ch¬_funùiÚ_ty³
+
+ gBSP_ouut_ch¬
+ =
+debug_putc_Úlü
+;
+
+411
+BSP_pÞlg_gch¬_funùiÚ_ty³
+
+ gBSP_pÞl_ch¬
+ =
+NULL
+;
+
+ @console/consolebsp.h
+
+13 #iâdeà
+__CONSOLEBSP_H
+
+
+14
+ #__CONSOLEBSP_H
+
+
+ )
+
+16
+ ~<¹ems.h
+>
+
+17
+ ~<¹ems/rgbuf.h
+>
+
+18
+ ~<b¥.h
+>
+
+20 #ifdeà
+__ýlu¥lus
+
+
+35 #ià(
+HAS_PMC_PSC8
+)
+
+36
+ #NUM_Z85C30_CHIPS_ON_MEZZANINE
+ 4
+
+ )
+
+38
+ #NUM_Z85C30_CHIPS_ON_MEZZANINE
+ 0
+
+ )
+
+41
+ #NUM_Z85C30_CHIPS
+ (2 +
+NUM_Z85C30_CHIPS_ON_MEZZANINE
+)
+
+ )
+
+42
+ #NUM_Z85C30_PORTS
+ (
+NUM_Z85C30_CHIPS
+ * 2)
+
+ )
+
+45
+CONSOLE_x1_CLOCK
+,
+
+46
+CONSOLE_x16_CLOCK
+,
+
+47
+CONSOLE_x32_CLOCK
+,
+
+48
+CONSOLE_x64_CLOCK
+,
+
+49 }
+ tCONSOLE_Clock_¥d
+;
+
+52
+CONSOLE_STOP_BITS_1
+,
+
+53
+CONSOLE_STOP_BITS_1_AND_A_HALF
+,
+
+54
+CONSOLE_STOP_BITS_2
+,
+
+55 }
+ tCONSOLE_StÝ_bs
+;
+
+58
+CONSOLE_PARITY_NONE
+,
+
+59
+CONSOLE_PARITY_ODD
+,
+
+60
+CONSOLE_PARITY_EVEN
+,
+
+61 }
+ tCONSOLE_P¬y
+;
+
+64
+CONSOLE_CHARACTER_BITS_8
+,
+
+65
+CONSOLE_CHARACTER_BITS_7
+,
+
+66
+CONSOLE_CHARACTER_BITS_6
+,
+
+67
+CONSOLE_CHARACTER_BITS_5
+,
+
+68 }
+ tCONSOLE_Ch¬aù_bs
+;
+
+71
+ut32_t
+
+baud_¿
+;
+
+72
+CONSOLE_StÝ_bs
+
+¡Ý_bs
+;
+
+73
+CONSOLE_P¬y
+
+·ry
+;
+
+74
+CONSOLE_Ch¬aù_bs
+
+»ad_ch¬_bs
+;
+
+75
+CONSOLE_Ch¬aù_bs
+
+wre_ch¬_bs
+;
+
+77 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+78 vÞ©
+Rg_bufãr_t
+
+TX_Bufãr
+;
+
+79 vÞ©
+boÞ
+
+Is_TX_aùive
+;
+
+80 *
+cÚsÞe_rmios_d©a
+;
+
+83 }
+ tCÚsÞe_PrÙocÞ
+;
+
+89
+ut32_t
+
+veùÜ
+;
+
+90
+ut32_t
+
+þock_äequcy
+;
+
+91
+ut16_t
+
+þock_x
+;
+
+92
+CONSOLE_Clock_¥d
+
+þock_¥d
+;
+
+93 }
+ tCh_85C30_fo
+;
+
+100 vÞ©*
+ù¾
+;
+
+101 vÞ©*
+d©a
+;
+
+103
+pÜt
+;
+
+105
+CÚsÞe_PrÙocÞ
+ *
+PrÙocÞ
+;
+
+106
+Ch_85C30_fo
+ *
+Ch
+;
+
+108 }
+ tPÜt_85C30_fo
+;
+
+113
+Ch_85C30_fo
+
+Chs_85C30
+ [
+NUM_Z85C30_CHIPS
+ ];
+
+114
cÚ¡
+PÜt_85C30_fo
+
+PÜts_85C30
+ [
+NUM_Z85C30_PORTS
+ ];
+
+119
+lize_85c30_pÜt
+(
+
+120 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+
+
+123
+outby_pÞËd_85c30
+(
+
+124 vÞ©*
+c¤
+,
+
+125
+ch
+
+
+128
+by_nÚblockg_85c30
+(
+
+129 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+
+
+132
+Re£t_85c30_ch
+(
+
+133 vÞ©*
+ù¾_0
+,
+
+134 vÞ©*
+ù¾_1
+
+
+137 #ià
+CONSOLE_USE_INTERRUPTS
+
+
+138
+¹ems_i¤
+
+ISR_85c30_Async
+(
+
+139 cÚ¡
+PÜt_85C30_fo
+ *
+PÜt
+
+
+142 #ifdeà
+__ýlu¥lus
+
+
+ @console/tbl85c30.c
+
+13
+ ~"cÚsÞeb¥.h
+"
+
+14
+ ~<b¥.h
+>
+
+15
+ ~<b¥/q.h
+>
+
+17
+ #CONSOLE_DEFAULT_BAUD_RATE
+ 9600
+
+ )
+
+18
+ #CONSOLE_DEFAULT_BAUD_CONSTANT
+
+ `ScÜe603e_Z8530_Ch0_Baud
+(9600)
+
+ )
+
+20
+ #CONSOLE_DEFAULT_STOP_BITS
+
+CONSOLE_STOP_BITS_1
+
+
+ )
+
+21
+ #CONSOLE_DEFAULT_PARITY
+
+CONSOLE_PARITY_NONE
+
+
+ )
+
+22
+ #CONSOLE_DEFAULT_READ_CHARACTER_BITS
+
+CONSOLE_CHARACTER_BITS_8
+
+
+ )
+
+23
+ #CONSOLE_DEFAULT_WRITE_CHARACTER_BITS
+
+CONSOLE_CHARACTER_BITS_8
+
+
+ )
+
+24
+ #CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+CONSOLE_x16_CLOCK
+
+
+ )
+
+26
+ #DEFAULT_PROTOCOL
+ {
+CONSOLE_DEFAULT_BAUD_RATE
+, \
+
+27
+CONSOLE_DEFAULT_STOP_BITS
+, \
+
+28
+CONSOLE_DEFAULT_PARITY
+, \
+
+29
+CONSOLE_DEFAULT_READ_CHARACTER_BITS
+, \
+
+30
+CONSOLE_DEFAULT_WRITE_CHARACTER_BITS
+ }
+
+ )
+
+35
+CÚsÞe_PrÙocÞ
+
+ gPrÙocÞs_85c30
+ [
+NUM_Z85C30_PORTS
+ ] =
+
+37
+DEFAULT_PROTOCOL
+,
+
+38
+DEFAULT_PROTOCOL
+,
+
+39
+DEFAULT_PROTOCOL
+,
+
+40
+DEFAULT_PROTOCOL
+,
+
+42 #ià(
+HAS_PMC_PSC8
+)
+
+43
+DEFAULT_PROTOCOL
+,
+
+44
+DEFAULT_PROTOCOL
+,
+
+45
+DEFAULT_PROTOCOL
+,
+
+46
+DEFAULT_PROTOCOL
+,
+
+47
+DEFAULT_PROTOCOL
+,
+
+48
+DEFAULT_PROTOCOL
+,
+
+49
+DEFAULT_PROTOCOL
+,
+
+50
+DEFAULT_PROTOCOL
+,
+
+58
+Ch_85C30_fo
+
+ gChs_85C30
+ [
+NUM_Z85C30_CHIPS
+ ] =
+
+61
+SCORE603E_85C30_0_IRQ
+,
+
+62
+SCORE603E_85C30_0_CLOCK
+,
+
+63
+SCORE603E_85C30_0_CLOCK_X
+,
+
+64
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+67
+SCORE603E_85C30_1_IRQ
+,
+
+68
+SCORE603E_85C30_1_CLOCK
+,
+
+69
+SCORE603E_85C30_1_CLOCK_X
+,
+
+70
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+73 #ià(
+HAS_PMC_PSC8
+)
+
+75
+SCORE603E_85C30_2_IRQ
+,
+
+76
+SCORE603E_85C30_2_CLOCK
+,
+
+77
+SCORE603E_85C30_2_CLOCK_X
+,
+
+78
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+81
+SCORE603E_85C30_3_IRQ
+,
+
+82
+SCORE603E_85C30_3_CLOCK
+,
+
+83
+SCORE603E_85C30_3_CLOCK_X
+,
+
+84
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+87
+SCORE603E_85C30_4_IRQ
+,
+
+88
+SCORE603E_85C30_4_CLOCK
+,
+
+89
+SCORE603E_85C30_4_CLOCK_X
+,
+
+90
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+93
+SCORE603E_85C30_5_IRQ
+,
+
+94
+SCORE603E_85C30_5_CLOCK
+,
+
+95
+SCORE603E_85C30_5_CLOCK_X
+,
+
+96
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+106 cÚ¡
+PÜt_85C30_fo
+
+ gPÜts_85C30
+ [
+NUM_Z85C30_PORTS
+ ] = {
+
+108 (vÞ©*è
+SCORE603E_85C30_CTRL_0
+,
+
+109 (vÞ©*è
+SCORE603E_85C30_DATA_0
+,
+
+111 &
+PrÙocÞs_85c30
+[0],
+
+112 &
+Chs_85C30
+[0],
+
+115 (vÞ©*è
+SCORE603E_85C30_CTRL_1
+,
+
+116 (vÞ©*è
+SCORE603E_85C30_DATA_1
+,
+
+118 &
+PrÙocÞs_85c30
+[1],
+
+119 &
+Chs_85C30
+[0],
+
+122 (vÞ©*è
+SCORE603E_85C30_CTRL_2
+,
+
+123 (vÞ©*è
+SCORE603E_85C30_DATA_2
+,
+
+125 &
+PrÙocÞs_85c30
+[2],
+
+126 &
+Chs_85C30
+[1],
+
+129 (vÞ©*è
+SCORE603E_85C30_CTRL_3
+,
+
+130 (vÞ©*è
+SCORE603E_85C30_DATA_3
+,
+
+132 &
+PrÙocÞs_85c30
+[3],
+
+133 &
+Chs_85C30
+[1],
+
+136 #ià(
+HAS_PMC_PSC8
+)
+
+138 (vÞ©*è
+SCORE603E_85C30_CTRL_4
+,
+
+139 (vÞ©*è
+SCORE603E_85C30_DATA_4
+,
+
+141 &
+PrÙocÞs_85c30
+[4],
+
+142 &
+Chs_85C30
+[2],
+
+145 (vÞ©*è
+SCORE603E_85C30_CTRL_5
+,
+
+146 (vÞ©*è
+SCORE603E_85C30_DATA_5
+,
+
+148 &
+PrÙocÞs_85c30
+[5],
+
+149 &
+Chs_85C30
+[2],
+
+152 (vÞ©*è
+SCORE603E_85C30_CTRL_6
+,
+
+153 (vÞ©*è
+SCORE603E_85C30_DATA_6
+,
+
+155 &
+PrÙocÞs_85c30
+[6],
+
+156 &
+Chs_85C30
+[3],
+
+159 (vÞ©*è
+SCORE603E_85C30_CTRL_7
+,
+
+160 (vÞ©*è
+SCORE603E_85C30_DATA_7
+,
+
+162 &
+PrÙocÞs_85c30
+[7],
+
+163 &
+Chs_85C30
+[3],
+
+166 (vÞ©*è
+SCORE603E_85C30_CTRL_8
+,
+
+167 (vÞ©*è
+SCORE603E_85C30_DATA_8
+,
+
+169 &
+PrÙocÞs_85c30
+[8],
+
+170 &
+Chs_85C30
+[4],
+
+173 (vÞ©*è
+SCORE603E_85C30_CTRL_9
+,
+
+174 (vÞ©*è
+SCORE603E_85C30_DATA_9
+,
+
+176 &
+PrÙocÞs_85c30
+[9],
+
+177 &
+Chs_85C30
+[4],
+
+180 (vÞ©*è
+SCORE603E_85C30_CTRL_10
+,
+
+181 (vÞ©*è
+SCORE603E_85C30_DATA_10
+,
+
+183 &
+PrÙocÞs_85c30
+[10],
+
+184 &
+Chs_85C30
+[5],
+
+187 (vÞ©*è
+SCORE603E_85C30_CTRL_11
+,
+
+188 (vÞ©*è
+SCORE603E_85C30_DATA_11
+,
+
+190 &
+PrÙocÞs_85c30
+[11],
+
+191 &
+Chs_85C30
+[5],
+
+ @include/bsp.h
+
+14 #iâdeà
+_BSP_H
+
+
+15
+ #_BSP_H
+
+
+ )
+
+17 #ifdeà
+__ýlu¥lus
+
+
+21
+ #BSP_ZERO_WORKSPACE_AUTOMATICALLY
+
+TRUE
+
+
+ )
+
+23
+ ~<b¥Ýts.h
+>
+
+24
+ ~<b¥/deçuÉ-l-exnsiÚ.h
+>
+
+25
+ ~<¹ems.h
+>
+
+26
+ ~<¹ems/cÚsÞe.h
+>
+
+27
+ ~<libýu/io.h
+>
+
+28
+ ~<¹ems/þockdrv.h
+>
+
+29
+ ~<b¥/veùÜs.h
+>
+
+31 #ifdeà
+ASM
+
+
+33
+ #ALIGN_REGS
+ 0x0140
+
+ )
+
+36
+ ~<¹ems.h
+>
+
+37
+ ~<¹ems/cÚsÞe.h
+>
+
+38
+ ~<¹ems/þockdrv.h
+>
+
+39
+ ~<¹ems/iosuµ.h
+>
+
+45
+ ~<g2.h
+>
+
+46
+ ~<b¥/q.h
+>
+
+54
+ #_ScÜe603e_Z8530_Baud
+Ð
+_äequcy
+,
+_þock_by
+,
+_baud_¿
+ ) \
+
+55 Ð(
+_äequcy
+ /Ð
+_þock_by
+ * 2 *
+_baud_¿
+)è- 2)
+
+ )
+
+57
+ #ScÜe603e_Z8530_Ch1_Baud
+Ð
+_v®ue
+ ) \
+
+58
+ `_ScÜe603e_Z8530_Baud
+Ð
+SCORE603E_85C30_1_CLOCK
+, \
+
+59
+SCORE603E_85C30_1_CLOCK_X
+,
+_v®ue
+ )
+
+ )
+
+61
+ #ScÜe603e_Z8530_Ch0_Baud
+Ð
+_v®ue
+ ) \
+
+62
+ `_ScÜe603e_Z8530_Baud
+Ð
+SCORE603E_85C30_0_CLOCK
+, \
+
+63
+SCORE603E_85C30_0_CLOCK_X
+,
+_v®ue
+ )
+
+ )
+
+65
+ #Inlize_Bßrd_ù¾_»gi¡
+() \
+
+66 *
+SCORE603E_BOARD_CTRL_REG
+ = (*SCORE603E_BOARD_CTRL_REG | \
+
+67
+SCORE603E_BRD_FLASH_DISABLE_MASK
+)
+
+ )
+
+69
+ #ProûssÜ_SynchrÚize
+() \
+
+70
+__asm__
+ vÞ©e("iØ")
+
+ )
+
+91
+RAM_START
+;
+
+92
+RAM_END
+;
+
+93
+RAM_SIZE
+;
+
+95
+PROM_START
+;
+
+96
+PROM_END
+;
+
+97
+PROM_SIZE
+;
+
+99
+CLOCK_SPEED
+;
+
+100
+CPU_PPC_CLICKS_PER_MS
+;
+
+102
+d
+;
+
+107
+d
+;
+
+108
+RAM_END
+;
+
+109
+ut32_t
+
+BSP_mem_size
+;
+
+116
+ #BSP_LIBIO_MAX_FDS
+ 20
+
+ )
+
+123
+¹ems_i¤_y
+
+£t_EE_veùÜ
+(
+
+124
+¹ems_i¤_y
+
+hªdËr
+,
+
+125
+¹ems_veùÜ_numb
+
+veùÜ
+
+
+127
+lize_exº®_exû±iÚ_veùÜ
+();
+
+132
+_PCI
+();
+
+133
+_RTC
+();
+
+134
+¡ruùiÚ_ÿche_abË
+();
+
+135
+d©a_ÿche_abË
+();
+
+137
+lize_PCI_bridge
+();
+
+138
+ut16_t
+
+»ad_ªd_þr_q
+();
+
+139
+£t_q_mask
+(
+ut16_t
+
+v®ue
+);
+
+140
+ut16_t
+
+g_q_mask
+();
+
+145
+lize_univ£
+();
+
+146
+£t_q_mask
+(
+ut16_t
+
+v®ue
+);
+
+147
+ut16_t
+
+g_q_mask
+();
+
+148
+unmask_q
+(
+ut16_t
+
+q_idx
+);
+
+149
+mask_q
+(
+ut16_t
+
+q_idx
+);
+
+150
+_q_d©a_»gi¡
+();
+
+151
+ut16_t
+
+»ad_ªd_þr_PMC_q
+(ut16_
+q
+);
+
+152
+boÞ
+
+Is_PMC_IRQ
+Ð
+ut32_t
+
+pmc_q
+,
+ut16_t
+
+¡©us_wÜd
+);
+
+153
+ut16_t
+
+»ad_ªd_þr_q
+();
+
+154
+£t_vme_ba£_add»ss
+(
+ut32_t
+
+ba£_add»ss
+);
+
+155
+ut32_t
+
+g_vme_¦ave_size
+();
+
+156
+£t_vme_¦ave_size
+ (
+ut32_t
+
+size
+);
+
+161
+lize_PCI_bridge
+();
+
+162
+_q_d©a_»gi¡
+();
+
+163
+ut32_t
+
+Rd_pci_deviû_»gi¡
+(ut32_
+add»ss
+);
+
+164
+Wre_pci_deviû_»gi¡
+(
+ut32_t
+
+add»ss
+, ut32_
+d©a
+);
+
+167
+SCORE603e_FLASH_Di§bË
+(
+ut32_t
+
+unu£d
+);
+
+168
+SCORE603e_FLASH_vify_abË
+();
+
+169
+SCORE603e_FLASH_EÇbË_wres
+(
+ut32_t
+
+¬
+);
+
+174
+ut32_t
+
+PCI_bus_»ad
+(vÞ©ut32_*
+_addr
+);
+
+175
+PCI_bus_wre
+(vÞ©
+ut32_t
+ *
+_addr
+, ut32_
+_d©a
+);
+
+177
+ #BSP_FLASH_ENABLE_WRITES
+Ð
+_¬
+è
+ `SCORE603e_FLASH_EÇbË_wres
+Ð_¬ )
+
+ )
+
+178
+ #BSP_FLASH_DISABLE_WRITES
+(
+_¬
+è
+ `SCORE603e_FLASH_Di§bË
+Ð_¬ )
+
+ )
+
+180
+ #CÚvt_Endn_32
+Ð
+_d©a
+ ) \
+
+181 Ð((
+_d©a
+&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) | \
+
+182 ((
+_d©a
+&0x00ff0000)>>8è| ((_d©a&0xff000000)>>24è)
+
+ )
+
+184
+ #CÚvt_Endn_16
+Ð
+_d©a
+ ) \
+
+185 Ð((
+_d©a
+&0x00ff)<<8è| ((_d©a&0xff00)>>8è)
+
+ )
+
+190
+BSP_discÚÃù_þock_hªdËr
+();
+
+191
+BSP_cÚÃù_þock_hªdËr
+();
+
+195 #ifdeà
+__ýlu¥lus
+
+
+ @include/gen2.h
+
+13 #iâdeà
+__SCORE_GENERATION_2_h
+
+
+14
+ #__SCORE_GENERATION_2_h
+
+
+ )
+
+16 #ifdeà
+__ýlu¥lus
+
+
+20
+ ~<¹ems.h
+>
+
+25
+ #SCORE603E_VME_JUMPER_ADDR
+ 0x00e20000
+
+ )
+
+26
+ #BSP_FLASH_BASE
+ 0x04000000
+
+ )
+
+27
+ #SCORE603E_ISA_PCI_IO_BASE
+ 0x80000000
+
+ )
+
+28
+ #SCORE603E_TIMER_PORT_C
+ 0xfd000000
+
+ )
+
+29
+ #SCORE603E_TIMER_INT_ACK
+ 0xfd000000
+
+ )
+
+30
+ #SCORE603E_TIMER_PORT_B
+ 0xfd000008
+
+ )
+
+31
+ #SCORE603E_TIMER_PORT_A
+ 0xfd000004
+
+ )
+
+33
+ #SCORE603E_BOARD_CTRL_REG
+ ((vÞ©
+ut8_t
+*)0xfd00002c)
+
+ )
+
+34
+ #SCORE603E_BRD_FLASH_DISABLE_MASK
+ 0x40
+
+ )
+
+36
+ #SCORE603E_85C30_CTRL_0
+ ((vÞ©
+ut8_t
+*)0xã200020)
+
+ )
+
+37
+ #SCORE603E_85C30_DATA_0
+ ((vÞ©
+ut8_t
+*)0xã200024)
+
+ )
+
+38
+ #SCORE603E_85C30_CTRL_1
+ ((vÞ©
+ut8_t
+*)0xã200028)
+
+ )
+
+39
+ #SCORE603E_85C30_DATA_1
+ ((vÞ©
+ut8_t
+*)0xã20002c)
+
+ )
+
+40
+ #SCORE603E_85C30_CTRL_2
+ ((vÞ©
+ut8_t
+*)0xã200000)
+
+ )
+
+41
+ #SCORE603E_85C30_DATA_2
+ ((vÞ©
+ut8_t
+*)0xã200004)
+
+ )
+
+42
+ #SCORE603E_85C30_CTRL_3
+ ((vÞ©
+ut8_t
+*)0xã200008)
+
+ )
+
+43
+ #SCORE603E_85C30_DATA_3
+ ((vÞ©
+ut8_t
+*)0xã20000c)
+
+ )
+
+49
+ #PCI_DRAM_OFFSET
+
+PREP_PCI_DRAM_OFFSET
+
+
+ )
+
+50
+ #BSP_PCI_CONFIGURATION_BASE
+ 0x80800000
+
+ )
+
+51
+ #BSP_PMC_BASE
+
+BSP_PCI_CONFIGURATION_BASE
+
+
+ )
+
+52
+ #PCI_MEM_BASE_ADJUSTMENT
+ 0
+
+ )
+
+53
+ #BSP_PCI_PMC_DEVICE_BASE
+ 0x80808000
+
+ )
+
+54
+ #BSP_PCI_REGISTER_BASE
+ 0xfc000000
+
+ )
+
+56
+ #BSP_PCI_DEVICE_ADDRESS
+Ð
+_off£t
+) \
+
+57 ((vÞ©
+ut32_t
+ *)Ð
+BSP_PCI_PMC_DEVICE_BASE
+ +
+_off£t
+ ))
+
+ )
+
+60
+ #BSP_PMC_SERIAL_ADDRESS
+Ð
+_off£t
+ ) \
+
+61 ((vÞ©
+ut8_t
+*)(
+BSP_PCI_REGISTER_BASE
+ +
+_off£t
+))
+
+ )
+
+66
+ #SCORE603E_85C30_CTRL_4
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200020)
+
+ )
+
+67
+ #SCORE603E_85C30_DATA_4
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200024)
+
+ )
+
+68
+ #SCORE603E_85C30_CTRL_5
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200028)
+
+ )
+
+69
+ #SCORE603E_85C30_DATA_5
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x0020002c)
+
+ )
+
+70
+ #SCORE603E_85C30_CTRL_6
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200030)
+
+ )
+
+71
+ #SCORE603E_85C30_DATA_6
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200034)
+
+ )
+
+72
+ #SCORE603E_85C30_CTRL_7
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200038)
+
+ )
+
+73
+ #SCORE603E_85C30_DATA_7
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x0020003c)
+
+ )
+
+74
+ #SCORE603E_85C30_CTRL_8
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200000)
+
+ )
+
+75
+ #SCORE603E_85C30_DATA_8
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200004)
+
+ )
+
+76
+ #SCORE603E_85C30_CTRL_9
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200008)
+
+ )
+
+77
+ #SCORE603E_85C30_DATA_9
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x0020000c)
+
+ )
+
+78
+ #SCORE603E_85C30_CTRL_10
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200010)
+
+ )
+
+79
+ #SCORE603E_85C30_DATA_10
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200014)
+
+ )
+
+80
+ #SCORE603E_85C30_CTRL_11
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x00200018)
+
+ )
+
+81
+ #SCORE603E_85C30_DATA_11
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x0020001c)
+
+ )
+
+83
+ #_IO_BASE
+
+PREP_ISA_IO_BASE
+
+
+ )
+
+84
+ #SCORE603E_PCI_IO_CFG_ADDR
+ 0x80000cf8
+
+ )
+
+85
+ #SCORE603E_PCI_IO_CFG_DATA
+ 0x80000cfc
+
+ )
+
+87
+ #SCORE603E_UNIVERSE_BASE
+ 0x80030000
+
+ )
+
+88
+ #SCORE603E_IO_VME_UNIVERSE_BASE
+ 0x80007000
+
+ )
+
+89
+ #PCI_MEM_BASE
+ 0xc0000000
+
+ )
+
+90
+ #BSP_PCI_MEM_BASE
+
+PCI_MEM_BASE
+
+
+ )
+
+91
+ #BSP_NVRAM_BASE
+ 0xfd100000
+
+ )
+
+92
+ #BSP_RTC_ADDRESS
+ ((vÞ©*)0xfd180000)
+
+ )
+
+93
+ #SCORE603E_JP1_JP2_PROM_BASE
+ 0xfff00000
+
+ )
+
+94
+ #SCORE603E_NOT_JP1_2_FLASH_BASE
+ 0xff800000
+
+ )
+
+96 #ià(
+SCORE603E_USE_SDS
+è| (
+SCORE603E_USE_OPEN_FIRMWARE
+è| (
+SCORE603E_USE_NONE
+)
+
+97
+ #SCORE603E_VME_A16_OFFSET
+ 0x04000000
+
+ )
+
+98 #ià(
+SCORE603E_USE_DINK
+)
+
+99
+ #SCORE603E_VME_A16_OFFSET
+ 0x11000000
+
+ )
+
+100
+ #SCORE603E_VME_A24_OFFSET
+ 0x10000000
+
+ )
+
+101
+ #BSP_VME_A24_BASE
+ (
+BSP_PCI_MEM_BASE
++
+SCORE603E_VME_A24_OFFSET
+)
+
+ )
+
+106
+ #BSP_VME_A16_BASE
+ (
+BSP_PCI_MEM_BASE
++
+SCORE603E_VME_A16_OFFSET
+)
+
+ )
+
+114
+ #ICM1770_CRYSTAL_FREQ_32K
+ 0x00
+
+ )
+
+115
+ #ICM1770_CRYSTAL_FREQ_1M
+ 0x01
+
+ )
+
+116
+ #ICM1770_CRYSTAL_FREQ_2M
+ 0x02
+
+ )
+
+117
+ #ICM1770_CRYSTAL_FREQ_4M
+ 0x03
+
+ )
+
+119
+ #BSP_RTC_FREQUENCY
+
+ICM1770_CRYSTAL_FREQ_32K
+
+
+ )
+
+124
+ #SCORE603E_85C30_0_CLOCK
+ 14745600
+
+ )
+
+125
+ #SCORE603E_85C30_0_CLOCK_X
+ 16
+
+ )
+
+130
+ #SCORE603E_85C30_1_CLOCK
+ 16000000
+
+ )
+
+131
+ #SCORE603E_85C30_1_CLOCK_X
+ 16
+
+ )
+
+136
+ #SCORE603E_85C30_PMC_CLOCK
+ 16000000
+
+ )
+
+137
+ #SCORE603E_85C30_PMC_CLOCK_X
+ 16
+
+ )
+
+139
+ #SCORE603E_85C30_2_CLOCK
+
+SCORE603E_85C30_PMC_CLOCK
+
+
+ )
+
+140
+ #SCORE603E_85C30_3_CLOCK
+
+SCORE603E_85C30_PMC_CLOCK
+
+
+ )
+
+141
+ #SCORE603E_85C30_4_CLOCK
+
+SCORE603E_85C30_PMC_CLOCK
+
+
+ )
+
+142
+ #SCORE603E_85C30_5_CLOCK
+
+SCORE603E_85C30_PMC_CLOCK
+
+
+ )
+
+143
+ #SCORE603E_85C30_2_CLOCK_X
+
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+ )
+
+144
+ #SCORE603E_85C30_3_CLOCK_X
+
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+ )
+
+145
+ #SCORE603E_85C30_4_CLOCK_X
+
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+ )
+
+146
+ #SCORE603E_85C30_5_CLOCK_X
+
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+ )
+
+148
+ #SCORE603E_UNIVERSE_CHIP_ID
+ 0x000010E3
+
+ )
+
+153
+ #SCORE603E_FPGA_VECT_DATA
+ ((vÞ©
+ut16_t
+*)0xfd000040)
+
+ )
+
+154
+ #SCORE603E_FPGA_BIT1_15_0
+ ((vÞ©
+ut16_t
+*)0xfd000044)
+
+ )
+
+155
+ #SCORE603E_FPGA_MASK_DATA
+ ((vÞ©
+ut16_t
+*)0xfd000048)
+
+ )
+
+156
+ #SCORE603E_FPGA_IRQ_INPUT
+ ((vÞ©
+ut16_t
+*)0xfd00004c)
+
+ )
+
+161
+ #BSP_PMC_STATUS_ADDRESS
+ (
+ `BSP_PMC_SERIAL_ADDRESS
+ (0))
+
+ )
+
+162
+ #Is_PMC_85C30_4_IRQ
+Ð
+_¡©us
+ ) (_¡©u & 0x80è
+
+ )
+
+163
+ #Is_PMC_85C30_2_IRQ
+Ð
+_¡©us
+ ) (_¡©u & 0x40è
+
+ )
+
+164
+ #Is_PMC_85C30_5_IRQ
+Ð
+_¡©us
+ ) (_¡©u & 0x20è
+
+ )
+
+165
+ #Is_PMC_85C30_3_IRQ
+Ð
+_¡©us
+ ) (_¡©u & 0x08è
+
+ )
+
+167
+ #SCORE603E_PMC_CONTROL_ADDRESS
+
+ `BSP_PMC_SERIAL_ADDRESS
+(0x100000)
+
+ )
+
+168
+ #SCORE603E_PMC_SCC_232_LOOPBACK
+ (
+_wÜd
+è(_wÜd|0x20)
+
+ )
+
+170
+ #PMC_SET_232_LOOPBACK
+(
+_wÜd
+è(_wÜd | 0x02)
+
+ )
+
+171
+ #PMC_CLEAR_232_LOOPBACK
+(
+_wÜd
+è(_wÜd & 0xfd)
+
+ )
+
+172
+ #PMC_SET_422_LOOPBACK
+(
+_wÜd
+è(_wÜd | 0x01)
+
+ )
+
+173
+ #PMC_CLEAR_422_LOOPBACK
+(
+_wÜd
+è(_wÜd & 0xã)
+
+ )
+
+185
+ #BSP_TIMER_AVG_OVERHEAD
+ 4
+
+ )
+
+187
+ #BSP_TIMER_LEAST_VALID
+ 1
+
+ )
+
+201
+ #BSP_CÚvt_deüemr
+Ð
+_v®ue
+ ) \
+
+202 (è(((
+_v®ue
+è* 4000è/ 6667)
+
+ )
+
+204 #ifdeà
+__ýlu¥lus
+
+
+ @include/tm27.h
+
+16 #iâdeà
+_RTEMS_TMTEST27
+
+
+20 #iâdeà
+__tm27_h
+
+
+21
+ #__tm27_h
+
+
+ )
+
+23
+ ~<b¥/q.h
+>
+
+29
+ #MUST_WAIT_FOR_INTERRUPT
+ 1
+
+ )
+
+31
+ $nuÎFunc
+(è{
+ }
+}
+
+33
+¹ems_q_cÚÃù_d©a
+
+ gþockIrqD©a
+ = {
+BSP_DECREMENTER
+,
+
+35 (
+¹ems_q_abË
+)
+nuÎFunc
+,
+
+36 (
+¹ems_q_di§bË
+)
+nuÎFunc
+,
+
+37 (
+¹ems_q_is_abËd
+è
+nuÎFunc
+};
+
+38
+In¡®l_tm27_veùÜ
+((*
+_hªdËr
+)())
+
+40
+þockIrqD©a
+.
+hdl
+ =
+_hªdËr
+;
+
+41 ià(!
+ `BSP_¡®l_¹ems_q_hªdËr
+ (&
+þockIrqD©a
+)) {
+
+42
+ `´tk
+("Error installing clock interrupt handler!\n");
+
+43
+ `¹ems_çl_rÜ_occu¼ed
+(1);
+
+45
+ }
+}
+
+47
+ #Cau£_tm27_
+() \
+
+49
+ut32_t
+
+_þicks
+ = 8; \
+
+50
+__asm__
+ vÞ©eÐ"mtdeø%0" : "ô" ((
+_þicks
+)) : "r" ((_clicks)) ); \
+
+51 } 0)
+
+ )
+
+53
+ #Cˬ_tm27_
+() \
+
+55
+ut32_t
+
+_þicks
+ = 0xffffffff; \
+
+56
+__asm__
+ vÞ©eÐ"mtdeø%0" : "ô" ((
+_þicks
+)) : "r" ((_clicks)) ); \
+
+57 } 0)
+
+ )
+
+59
+ #Low_tm27_
+() \
+
+61
+ut32_t
+
+_m¤
+ = 0; \
+
+62
+ `_ISR_S_Ëv
+( 0 ); \
+
+63
+__asm__
+ vÞ©eÐ"mfm¤ %0 ;" : "ô" (
+_m¤
+) : "r" (_msr) ); \
+
+64
+_m¤
+ |= 0x8002; \
+
+65
+__asm__
+ vÞ©eÐ"mtm¤ %0 ;" : "ô" (
+_m¤
+) : "r" (_msr) ); \
+
+66 } 0)
+
+ )
+
+ @irq/FPGA.c
+
+14
+ ~<b¥.h
+>
+
+15
+ ~<b¥/q.h
+>
+
+16
+ ~<¡rg.h
+>
+
+17
+ ~<fú.h
+>
+
+18
+ ~<as£¹.h
+>
+
+20
+ ~<¹ems/libio.h
+>
+
+21
+ ~<¹ems/libcsuµÜt.h
+>
+
+22
+ ~<¹ems/b¥Io.h
+>
+
+27
+ $lize_PCI_bridge
+ ()
+
+32
+ }
+}
+
+34
+ $£t_q_mask
+(
+
+35
+ut16_t
+
+v®ue
+
+
+38 vÞ©
+ut16_t
+ *
+loc
+;
+
+40
+loc
+ = (
+ut16_t
+*)
+SCORE603E_FPGA_MASK_DATA
+;
+
+42 *
+loc
+ =
+v®ue
+;
+
+43
+ }
+}
+
+45
+ut16_t
+
+ $g_q_mask
+( )
+
+47 vÞ©
+ut16_t
+ *
+loc
+;
+
+48
+ut16_t
+
+v®ue
+;
+
+50
+loc
+ = (
+ut16_t
+*)
+SCORE603E_FPGA_MASK_DATA
+;
+
+52
+v®ue
+ = *
+loc
+;
+
+54
+v®ue
+;
+
+55
+ }
+}
+
+57
+ $mask_q
+(
+
+58
+ut16_t
+
+q_idx
+
+
+61
+ut16_t
+
+v®ue
+;
+
+62
+ut32_t
+
+mask_idx
+ =
+q_idx
+;
+
+64
+v®ue
+ =
+ `g_q_mask
+();
+
+66 #ià(
+HAS_PMC_PSC8
+)
+
+67
+q_idx
+ +
+ScÜe_IRQ_F¡
+ ) {
+
+68
+SCORE603E_85C30_4_IRQ
+:
+
+69
+SCORE603E_85C30_2_IRQ
+:
+
+70
+SCORE603E_85C30_5_IRQ
+:
+
+71
+SCORE603E_85C30_3_IRQ
+:
+
+72
+mask_idx
+ =
+SCORE603E_PCI_IRQ_0
+ -
+ScÜe_IRQ_F¡
+;
+
+79
+v®ue
+ |ð(0x1 <<
+mask_idx
+);
+
+80
+ `£t_q_mask
+Ð
+v®ue
+ );
+
+81
+ }
+}
+
+83
+ $unmask_q
+(
+
+84
+ut16_t
+
+q_idx
+
+
+87
+ut16_t
+
+v®ue
+;
+
+88
+ut32_t
+
+mask_idx
+ =
+q_idx
+;
+
+90
+v®ue
+ =
+ `g_q_mask
+();
+
+92 #ià(
+HAS_PMC_PSC8
+)
+
+93
+q_idx
+ +
+ScÜe_IRQ_F¡
+ ) {
+
+94
+SCORE603E_85C30_4_IRQ
+:
+
+95
+SCORE603E_85C30_2_IRQ
+:
+
+96
+SCORE603E_85C30_5_IRQ
+:
+
+97
+SCORE603E_85C30_3_IRQ
+:
+
+98
+mask_idx
+ =
+SCORE603E_PCI_IRQ_0
+ -
+ScÜe_IRQ_F¡
+;
+
+105
+v®ue
+ &ð(~(0x1 <<
+mask_idx
+));
+
+106
+ `£t_q_mask
+Ð
+v®ue
+ );
+
+107
+ }
+}
+
+109
+ $_q_d©a_»gi¡
+()
+
+111
+ut32_t
+
+dex
+;
+
+112
+ut32_t
+
+i
+;
+
+114
+ `£t_q_mask
+( 0xffff );
+
+119
+i
+=0; i<20; i++) {
+
+120
+dex
+ = (*
+SCORE603E_FPGA_VECT_DATA
+);
+
+121 iàÐ(
+dex
+&0x10) != 0x10 )
+
+124
+ }
+}
+
+126
+ut16_t
+
+ $»ad_ªd_þr_PMC_q
+(
+
+127
+ut16_t
+
+q
+
+
+130
+ut16_t
+
+¡©us_wÜd
+ =
+q
+;
+
+132
+¡©us_wÜd
+ = (*
+BSP_PMC_STATUS_ADDRESS
+);
+
+134
+¡©us_wÜd
+;
+
+135
+ }
+}
+
+137
+boÞ
+
+ $Is_PMC_IRQ
+(
+
+138
+ut32_t
+
+pmc_q
+,
+
+139
+ut16_t
+
+¡©us_wÜd
+
+
+142
+boÞ
+
+»suÉ
+ =
+çl£
+;
+
+144
+pmc_q
+) {
+
+145
+SCORE603E_85C30_4_IRQ
+:
+
+146
+»suÉ
+ =
+ `Is_PMC_85C30_4_IRQ
+Ð
+¡©us_wÜd
+ ) ?
+ue
+ :
+çl£
+;
+
+148
+SCORE603E_85C30_2_IRQ
+:
+
+149
+»suÉ
+ =
+ `Is_PMC_85C30_2_IRQ
+Ð
+¡©us_wÜd
+ ) ?
+ue
+ :
+çl£
+;
+
+151
+SCORE603E_85C30_5_IRQ
+:
+
+152
+»suÉ
+ =
+ `Is_PMC_85C30_5_IRQ
+Ð
+¡©us_wÜd
+ ) ?
+ue
+ :
+çl£
+;
+
+154
+SCORE603E_85C30_3_IRQ
+:
+
+155
+»suÉ
+ =
+ `Is_PMC_85C30_3_IRQ
+Ð
+¡©us_wÜd
+ ) ?
+ue
+ :
+çl£
+;
+
+158
+ `as£¹
+( 0 );
+
+162
+»suÉ
+;
+
+163
+ }
+}
+
+165
+ut16_t
+
+ $»ad_ªd_þr_q
+()
+
+167
+ut16_t
+
+q
+;
+
+170
+q
+ = (*
+SCORE603E_FPGA_VECT_DATA
+);
+
+171
+ `ProûssÜ_SynchrÚize
+();
+
+172 ià((
+q
+ & 0xffff0) != 0x10) {
+
+173
+ `´tk
+Ð"»ad_ªd_þr_q:: ERROR==>nØq d©¨0x%x\n",
+q
+);
+
+174 (
+q
+ | 0x80);
+
+177
+q
+ &=0xf;
+
+178
+q
+ +ð
+ScÜe_IRQ_F¡
+;
+
+179
+q
+;
+
+180
+ }
+}
+
+ @irq/irq.c
+
+11
+ ~<¡dlib.h
+>
+
+13
+ ~<b¥.h
+>
+
+14
+ ~<b¥/q.h
+>
+
+15
+ ~<b¥/VME.h
+>
+
+16
+ ~<¹ems/scÜe/xt.h
+>
+
+17
+ ~<libýu/io.h
+>
+
+18
+ ~<b¥/veùÜs.h
+>
+
+19
+ ~<¡dlib.h
+>
+
+20
+ ~<¹ems/b¥Io.h
+>
+
+25
+¹ems_q_cÚÃù_d©a
+
+ gdeçuÉ_¹ems_y
+;
+
+31
+¹ems_q_glob®_£gs
+*
+ gº®_cÚfig
+;
+
+32
+¹ems_q_cÚÃù_d©a
+*
+ g¹ems_hdl_tbl
+;
+
+37
+le
+
+ $is_i§_q
+(cÚ¡
+¹ems_q_numb
+
+qLe
+)
+
+39 (((è
+qLe
+ <ð
+BSP_ISA_IRQ_MAX_OFFSET
+) &
+
+40 ((è
+qLe
+ >ð
+BSP_ISA_IRQ_LOWEST_OFFSET
+)
+
+42
+ }
+}
+
+47
+le
+
+ $is_pci_q
+(cÚ¡
+¹ems_q_numb
+
+qLe
+)
+
+49 (((è
+qLe
+ <ð
+BSP_PCI_IRQ_MAX_OFFSET
+) &
+
+50 ((è
+qLe
+ >ð
+BSP_PCI_IRQ_LOWEST_OFFSET
+)
+
+52
+ }
+}
+
+57
+le
+
+ $is_´oûssÜ_q
+(cÚ¡
+¹ems_q_numb
+
+qLe
+)
+
+59 (((è
+qLe
+ <ð
+BSP_PROCESSOR_IRQ_MAX_OFFSET
+) &
+
+60 ((è
+qLe
+ >ð
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+)
+
+62
+ }
+}
+
+73
+ $isV®idIÁru±
+(
+q
+)
+
+75 iàÐ(
+q
+ <
+BSP_LOWEST_OFFSET
+è|| (q >
+BSP_MAX_OFFSET
+))
+
+78
+ }
+}
+
+83
+ $BSP_¡®l_¹ems_sh¬ed_q_hªdËr
+ (cÚ¡
+¹ems_q_cÚÃù_d©a
+*
+q
+)
+
+85
+¹ems_¼u±_Ëv
+
+Ëv
+;
+
+86
+¹ems_q_cÚÃù_d©a
+*
+vcha
+;
+
+88
+ `´tk
+(" BSP_¡®l_¹ems_sh¬ed_q_hªd˸%d\n",
+q
+->
+Çme
+ );
+
+90 ià(!
+ `isV®idIÁru±
+(
+q
+->
+Çme
+)) {
+
+91
+ `´tk
+("Inv®id iÁru± veùÜ %d\n",
+q
+->
+Çme
+);
+
+95
+ `¹ems_¼u±_di§bË
+(
+Ëv
+);
+
+97 iàÐ()
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+].
+Ãxt_hªdËr
+ == -1 ) {
+
+98
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+99
+ `´tk
+("IRQ veùÜ %dÌdy cÚÃùedت unsh¬ed hªdËr\n",
+q
+->
+Çme
+);
+
+103
+vcha
+ = (
+¹ems_q_cÚÃù_d©a
+*)
+ `m®loc
+((rtems_irq_connect_data));
+
+106
+vcha
+[0]ð
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+];
+
+111
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+] = *irq;
+
+114
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+].
+Ãxt_hªdËr
+ = (*)
+vcha
+;
+
+119 ià(
+ `is_pci_q
+(
+q
+->
+Çme
+)) {
+
+122 ià(
+ `is_´oûssÜ_q
+(
+q
+->
+Çme
+)) {
+
+130 ià(
+q
+->
+Ú
+)
+
+131
+q
+->
+ `Ú
+(irq);
+
+133
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+136
+ }
+}
+
+141
+¹ems_¡©us_code
+
+ $b¥_¼u±_veùÜ_di§bË
+Ð
+¹ems_veùÜ_numb
+
+qLe
+)
+
+145
+ `´tk
+("b¥_¼u±_veùÜ_di§bË: 0x%x\n",
+qLe
+ );
+
+146
+RTEMS_SUCCESSFUL
+;
+
+147
+ }
+}
+
+149
+¹ems_¡©us_code
+
+ $b¥_¼u±_veùÜ_abË
+Ð
+¹ems_veùÜ_numb
+
+qLe
+)
+
+152
+ `´tk
+("b¥_¼u±_veùÜ_abË: 0x%x\n",
+qLe
+ );
+
+154
+RTEMS_SUCCESSFUL
+;
+
+155
+ }
+}
+
+163
+ $BSP_¡®l_¹ems_q_hªdËr
+ (cÚ¡
+¹ems_q_cÚÃù_d©a
+*
+q
+)
+
+165
+¹ems_¼u±_Ëv
+
+Ëv
+;
+
+167
+ `´tk
+(" BSP_¡®l_¹ems_q_hªd˸%d\n",
+q
+->
+Çme
+ );
+
+169 ià(!
+ `isV®idIÁru±
+(
+q
+->
+Çme
+)) {
+
+170
+ `´tk
+("Inv®id iÁru± veùÜ %d\n",
+q
+->
+Çme
+);
+
+180
+ `¹ems_¼u±_di§bË
+(
+Ëv
+);
+
+181 ià(
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+].
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl) {
+
+182
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+183
+ `´tk
+("IRQ veùÜ %dÌdy cÚÃùed\n",
+q
+->
+Çme
+);
+
+190
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+] = *irq;
+
+191
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+].
+Ãxt_hªdËr
+ = (*)-1;
+
+194 ià(
+ `is_pci_q
+(
+q
+->
+Çme
+)) {
+
+198
+ `´tk
+("is_pci_irq = TRUE - FIX THIS!\n");
+
+201 ià(
+ `is_´oûssÜ_q
+(
+q
+->
+Çme
+)) {
+
+205
+ `´tk
+("is_processor_irq = TRUE : Fix This\n");
+
+211 ià(
+q
+->
+Ú
+) {
+
+212
+ `´tk
+("C®È0x%x\n",
+q
+->
+Ú
+ );
+
+213
+q
+->
+ `Ú
+(irq);
+
+216
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+219
+ }
+}
+
+221
+ $BSP_g_cu¼t_¹ems_q_hªdËr
+ (
+¹ems_q_cÚÃù_d©a
+*
+q
+)
+
+223
+¹ems_¼u±_Ëv
+
+Ëv
+;
+
+225
+ `´tk
+(" BSP_g_cu¼t_¹ems_q_hªd˸%d\n",
+q
+->
+Çme
+ );
+
+226 ià(!
+ `isV®idIÁru±
+(
+q
+->
+Çme
+)) {
+
+229
+ `¹ems_¼u±_di§bË
+(
+Ëv
+);
+
+230 *
+q
+ =
+¹ems_hdl_tbl
+[q->
+Çme
+];
+
+231
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+233
+ }
+}
+
+235
+ $BSP_»move_¹ems_q_hªdËr
+ (cÚ¡
+¹ems_q_cÚÃù_d©a
+*
+q
+)
+
+237
+¹ems_q_cÚÃù_d©a
+ *
+pcha
+ð
+NULL
+, *
+vcha
+ = NULL;
+
+238
+¹ems_¼u±_Ëv
+
+Ëv
+;
+
+240
+ `´tk
+(" BSP_»move_¹ems_q_hªd˸%d\n",
+q
+->
+Çme
+ );
+
+241 ià(!
+ `isV®idIÁru±
+(
+q
+->
+Çme
+)) {
+
+251
+ `¹ems_¼u±_di§bË
+(
+Ëv
+);
+
+252 ià(
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+].
+hdl
+ != irq->hdl) {
+
+253
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+257 ifÐ()
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+].
+Ãxt_hªdËr
+ != -1 )
+
+259
+found
+ = 0;
+
+261 (
+pcha
+ð
+NULL
+,
+vcha
+ = &
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+]);
+
+262 (
+vcha
+->
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl);
+
+263 (
+pcha
+ð
+vcha
+, vcha = (
+¹ems_q_cÚÃù_d©a
+*)vcha->
+Ãxt_hªdËr
+) )
+
+265 ifÐ
+vcha
+->
+hdl
+ =ð
+q
+->hdl )
+
+267
+found
+= -1; ;
+
+271 ifÐ!
+found
+ )
+
+273
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+279 ià(
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+].
+hdl
+ != irq->hdl)
+
+281
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+287 ià(
+ `is_pci_q
+(
+q
+->
+Çme
+)) {
+
+292 ià(
+ `is_´oûssÜ_q
+(
+q
+->
+Çme
+)) {
+
+301 ià(
+q
+->
+off
+)
+
+302
+q
+->
+ `off
+(irq);
+
+307 ifÐ!
+vcha
+ )
+
+310
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+] =
+deçuÉ_¹ems_y
+;
+
+314 ifÐ
+pcha
+ )
+
+317
+pcha
+->
+Ãxt_hªdËr
+ =
+vcha
+->next_handler;
+
+324
+¹ems_hdl_tbl
+[
+q
+->
+Çme
+]ð*
+vcha
+;
+
+326
+ `ä
+(
+vcha
+);
+
+329
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+332
+ }
+}
+
+338
+ $BSP_¹ems_q_mngt_£t
+(
+¹ems_q_glob®_£gs
+*
+cÚfig
+)
+
+340
+i
+;
+
+341
+¹ems_¼u±_Ëv
+
+Ëv
+;
+
+346
+º®_cÚfig
+ =
+cÚfig
+;
+
+347
+deçuÉ_¹ems_y
+ =
+cÚfig
+->
+deçuÉEÁry
+;
+
+348
+¹ems_hdl_tbl
+ =
+cÚfig
+->
+qHdlTbl
+;
+
+350
+ `´tk
+(" BSP_rtems_irq_mngt_set\n");
+
+352
+ `¹ems_¼u±_di§bË
+(
+Ëv
+);
+
+360
+i
+=
+BSP_PCI_IRQ_LOWEST_OFFSET
+; i < BSP_PCI_IRQ_LOWEST_OFFSET +
+BSP_PCI_IRQ_NUMBER
+ ; i++) {
+
+361 ià(
+¹ems_hdl_tbl
+[
+i
+].
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl) {
+
+363
+¹ems_q_cÚÃù_d©a
+*
+vcha
+;
+
+364
+vcha
+ = &
+¹ems_hdl_tbl
+[
+i
+];
+
+365 (()
+vcha
+ !ð-1 && vcha->
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl);
+
+366
+vcha
+ = (
+¹ems_q_cÚÃù_d©a
+*)vcha->
+Ãxt_hªdËr
+ )
+
+368 ià(
+vcha
+->
+Ú
+)
+
+369
+vcha
+->
+ `Ú
+(vchain);
+
+377
+¹ems_q_cÚÃù_d©a
+*
+vcha
+;
+
+378
+vcha
+ = &
+¹ems_hdl_tbl
+[
+i
+];
+
+379 (()
+vcha
+ !ð-1 && vcha->
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl);
+
+380
+vcha
+ = (
+¹ems_q_cÚÃù_d©a
+*)vcha->
+Ãxt_hªdËr
+ )
+
+382 ià(
+vcha
+->
+off
+)
+
+383
+vcha
+->
+ `off
+(vchain);
+
+391
+i
+=
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET+
+BSP_PROCESSOR_IRQ_NUMBER
+; i++){
+
+392 ià(
+¹ems_hdl_tbl
+[
+i
+].
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl) {
+
+394
+¹ems_q_cÚÃù_d©a
+*
+vcha
+;
+
+395
+vcha
+ = &
+¹ems_hdl_tbl
+[
+i
+];
+
+396 (()
+vcha
+ !ð-1 && vcha->
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl);
+
+397
+vcha
+ = (
+¹ems_q_cÚÃù_d©a
+*)vcha->
+Ãxt_hªdËr
+ )
+
+399 ià(
+vcha
+->
+Ú
+)
+
+400
+vcha
+->
+ `Ú
+(vchain);
+
+407
+¹ems_q_cÚÃù_d©a
+*
+vcha
+;
+
+408
+vcha
+ = &
+¹ems_hdl_tbl
+[
+i
+];
+
+409 (()
+vcha
+ !ð-1 && vcha->
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl);
+
+410
+vcha
+ = (
+¹ems_q_cÚÃù_d©a
+*)vcha->
+Ãxt_hªdËr
+ )
+
+412 ià(
+vcha
+->
+off
+)
+
+413
+vcha
+->
+ `off
+(vchain);
+
+419
+ `¹ems_¼u±_abË
+(
+Ëv
+);
+
+421
+ }
+}
+
+423
+ $BSP_¹ems_q_mngt_g
+(
+¹ems_q_glob®_£gs
+**
+cÚfig
+)
+
+425 *
+cÚfig
+ =
+º®_cÚfig
+;
+
+427
+ }
+}
+
+429
+ gBSP_¥uriousIÁr
+ = 0;
+
+434
+ $C_di¥©ch_q_hªdËr
+ (
+CPU_IÁru±_äame
+ *
+äame
+,
+excNum
+)
+
+436
+q
+;
+
+437
+m¤
+;
+
+438
+Ãw_m¤
+;
+
+440 ià(
+excNum
+ =ð
+ASM_DEC_VECTOR
+) {
+
+441
+ `_CPU_MSR_GET
+(
+m¤
+);
+
+442
+Ãw_m¤
+ =
+m¤
+ |
+MSR_EE
+;
+
+443
+ `_CPU_MSR_SET
+(
+Ãw_m¤
+);
+
+445
+¹ems_hdl_tbl
+[
+BSP_DECREMENTER
+].
+ `hdl
+Ôms_hdl_tbl[BSP_DECREMENTER].
+hªdË
+);
+
+447
+ `_CPU_MSR_SET
+(
+m¤
+);
+
+452
+q
+ =
+ `»ad_ªd_þr_q
+();
+
+453
+ `_CPU_MSR_GET
+(
+m¤
+);
+
+454
+Ãw_m¤
+ =
+m¤
+ |
+MSR_EE
+;
+
+455
+ `_CPU_MSR_SET
+(
+Ãw_m¤
+);
+
+459
+¹ems_q_cÚÃù_d©a
+*
+vcha
+;
+
+460
+vcha
+ = &
+¹ems_hdl_tbl
+[
+q
+];
+
+461 (()
+vcha
+ !ð-1 && vcha->
+hdl
+ !ð
+deçuÉ_¹ems_y
+.hdl);
+
+462
+vcha
+ = (
+¹ems_q_cÚÃù_d©a
+*)vcha->
+Ãxt_hªdËr
+ )
+
+464
+vcha
+->
+ `hdl
+(vcha->
+hªdË
+);
+
+468
+ `_CPU_MSR_SET
+(
+m¤
+);
+
+471
+ }
+}
+
+473
+¹ems_¡©us_code
+
+ $b¥_¼u±_çcy_lize
+()
+
+476 ià(
+ `µc_exc_£t_hªdËr
+Ð
+ASM_EXT_VECTOR
+,
+C_di¥©ch_q_hªdËr
+)) {
+
+477
+RTEMS_IO_ERROR
+;
+
+479 ià(
+ `µc_exc_£t_hªdËr
+Ð
+ASM_DEC_VECTOR
+,
+C_di¥©ch_q_hªdËr
+)) {
+
+480
+RTEMS_IO_ERROR
+;
+
+482 ià(
+ `µc_exc_£t_hªdËr
+Ð
+ASM_E300_SYSMGMT_VECTOR
+,
+C_di¥©ch_q_hªdËr
+)) {
+
+483
+RTEMS_IO_ERROR
+;
+
+486
+RTEMS_SUCCESSFUL
+;
+
+487
+ }
+}
+
+489
+ $b¥_¼u±_hªdËr_deçuÉ
+Ð
+¹ems_veùÜ_numb
+
+veùÜ
+ )
+
+491 ià(
+veùÜ
+ !ð
+BSP_DECREMENTER
+) {
+
+492
+ `´tk
+Ð"Spuriou ¼u±: 0x%08x\n",
+veùÜ
+);
+
+494
+ }
+}
+
+ @irq/irq.h
+
+20 #iâdeà
+BSP_POWERPC_IRQ_H
+
+
+21
+ #BSP_POWERPC_IRQ_H
+
+
+ )
+
+23
+ #BSP_SHARED_HANDLER_SUPPORT
+ 1
+
+ )
+
+24
+ ~<¹ems/q.h
+>
+
+26 #iâdeà
+ASM
+
+
+28 #ifdeà
+__ýlu¥lus
+
+
+40
+ #BSP_ISA_IRQ_NUMBER
+ (16)
+
+ )
+
+41
+ #BSP_ISA_IRQ_LOWEST_OFFSET
+ (0)
+
+ )
+
+42
+ #BSP_ISA_IRQ_MAX_OFFSET
+ (
+BSP_ISA_IRQ_LOWEST_OFFSET
+ +
+BSP_ISA_IRQ_NUMBER
+ - 1)
+
+ )
+
+47
+ #BSP_PCI_IRQ_NUMBER
+ (16)
+
+ )
+
+48
+ #BSP_PCI_IRQ_LOWEST_OFFSET
+ (
+BSP_ISA_IRQ_NUMBER
+)
+
+ )
+
+49
+ #BSP_PCI_IRQ_MAX_OFFSET
+ (
+BSP_PCI_IRQ_LOWEST_OFFSET
+ +
+BSP_PCI_IRQ_NUMBER
+ - 1)
+
+ )
+
+54
+ #BSP_PMC_IRQ_NUMBER
+ (4)
+
+ )
+
+55
+ #BSP_PMC_IRQ_LOWEST_OFFSET
+ (
+BSP_PCI_IRQ_MAX_OFFSET
+ + 1)
+
+ )
+
+56
+ #BSP_PMC_IRQ_MAX_OFFSET
+ (
+BSP_PMC_IRQ_LOWEST_OFFSET
+ +
+BSP_PMC_IRQ_NUMBER
+ - 1)
+
+ )
+
+63
+ #BSP_PROCESSOR_IRQ_NUMBER
+ (1)
+
+ )
+
+64
+ #BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+ (
+BSP_PMC_IRQ_MAX_OFFSET
+ + 1)
+
+ )
+
+65
+ #BSP_PROCESSOR_IRQ_MAX_OFFSET
+ (
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+ +
+BSP_PROCESSOR_IRQ_NUMBER
+ - 1)
+
+ )
+
+69
+ #BSP_MISC_IRQ_NUMBER
+ (8)
+
+ )
+
+70
+ #BSP_MISC_IRQ_LOWEST_OFFSET
+ (
+BSP_PROCESSOR_IRQ_MAX_OFFSET
+ + 1)
+
+ )
+
+71
+ #BSP_MISC_IRQ_MAX_OFFSET
+ (
+BSP_MISC_IRQ_LOWEST_OFFSET
+ +
+BSP_MISC_IRQ_NUMBER
+ - 1)
+
+ )
+
+75
+ #BSP_IRQ_NUMBER
+ (
+BSP_MISC_IRQ_MAX_OFFSET
+ + 1)
+
+ )
+
+76
+ #BSP_LOWEST_OFFSET
+ (
+BSP_ISA_IRQ_LOWEST_OFFSET
+)
+
+ )
+
+77
+ #BSP_MAX_OFFSET
+ (
+BSP_MISC_IRQ_MAX_OFFSET
+)
+
+ )
+
+82
+ #BSP_DECREMENTER
+ (
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+)
+
+ )
+
+87
+ #ScÜe_IRQ_F¡
+ (
+BSP_PCI_IRQ_LOWEST_OFFSET
+ )
+
+ )
+
+92
+ #SCORE603E_IRQ00
+ (
+ScÜe_IRQ_F¡
+ + 0 )
+
+ )
+
+93
+ #SCORE603E_IRQ01
+ (
+ScÜe_IRQ_F¡
+ + 1 )
+
+ )
+
+94
+ #SCORE603E_IRQ02
+ (
+ScÜe_IRQ_F¡
+ + 2 )
+
+ )
+
+95
+ #SCORE603E_IRQ03
+ (
+ScÜe_IRQ_F¡
+ + 3 )
+
+ )
+
+96
+ #SCORE603E_IRQ04
+ (
+ScÜe_IRQ_F¡
+ + 4 )
+
+ )
+
+97
+ #SCORE603E_IRQ05
+ (
+ScÜe_IRQ_F¡
+ + 5 )
+
+ )
+
+98
+ #SCORE603E_IRQ06
+ (
+ScÜe_IRQ_F¡
+ + 6 )
+
+ )
+
+99
+ #SCORE603E_IRQ07
+ (
+ScÜe_IRQ_F¡
+ + 7 )
+
+ )
+
+100
+ #SCORE603E_IRQ08
+ (
+ScÜe_IRQ_F¡
+ + 8 )
+
+ )
+
+101
+ #SCORE603E_IRQ09
+ (
+ScÜe_IRQ_F¡
+ + 9 )
+
+ )
+
+102
+ #SCORE603E_IRQ10
+ (
+ScÜe_IRQ_F¡
+ + 10 )
+
+ )
+
+103
+ #SCORE603E_IRQ11
+ (
+ScÜe_IRQ_F¡
+ + 11 )
+
+ )
+
+104
+ #SCORE603E_IRQ12
+ (
+ScÜe_IRQ_F¡
+ + 12 )
+
+ )
+
+105
+ #SCORE603E_IRQ13
+ (
+ScÜe_IRQ_F¡
+ + 13 )
+
+ )
+
+106
+ #SCORE603E_IRQ14
+ (
+ScÜe_IRQ_F¡
+ + 14 )
+
+ )
+
+107
+ #SCORE603E_IRQ15
+ (
+ScÜe_IRQ_F¡
+ + 15 )
+
+ )
+
+109
+ #SCORE603E_TIMER1_IRQ
+
+SCORE603E_IRQ00
+
+
+ )
+
+110
+ #SCORE603E_TIMER2_IRQ
+
+SCORE603E_IRQ01
+
+
+ )
+
+111
+ #SCORE603E_TIMER3_IRQ
+
+SCORE603E_IRQ02
+
+
+ )
+
+112
+ #SCORE603E_85C30_1_IRQ
+
+SCORE603E_IRQ03
+
+
+ )
+
+113
+ #SCORE603E_85C30_0_IRQ
+
+SCORE603E_IRQ04
+
+
+ )
+
+114
+ #SCORE603E_RTC_IRQ
+
+SCORE603E_IRQ05
+
+
+ )
+
+115
+ #SCORE603E_PCI_IRQ_0
+
+SCORE603E_IRQ06
+
+
+ )
+
+116
+ #SCORE603E_PCI_IRQ_1
+
+SCORE603E_IRQ07
+
+
+ )
+
+117
+ #SCORE603E_PCI_IRQ_2
+
+SCORE603E_IRQ08
+
+
+ )
+
+118
+ #SCORE603E_PCI_IRQ_3
+
+SCORE603E_IRQ09
+
+
+ )
+
+119
+ #SCORE603E_UNIVERSE_IRQ
+
+SCORE603E_IRQ10
+
+
+ )
+
+120
+ #SCORE603E_1553_IRQ
+
+SCORE603E_IRQ11
+
+
+ )
+
+121
+ #SCORE603E_MAIL_BOX_IRQ_0
+
+SCORE603E_IRQ12
+
+
+ )
+
+122
+ #SCORE603E_MAIL_BOX_IRQ_1
+
+SCORE603E_IRQ13
+
+
+ )
+
+123
+ #SCORE603E_MAIL_BOX_IRQ_2
+
+SCORE603E_IRQ14
+
+
+ )
+
+124
+ #SCORE603E_MAIL_BOX_IRQ_3
+
+SCORE603E_IRQ15
+
+
+ )
+
+131
+ #SCORE603E_IRQ16
+ (
+ScÜe_IRQ_F¡
+ + 16 )
+
+ )
+
+132
+ #SCORE603E_IRQ17
+ (
+ScÜe_IRQ_F¡
+ + 17 )
+
+ )
+
+133
+ #SCORE603E_IRQ18
+ (
+ScÜe_IRQ_F¡
+ + 18 )
+
+ )
+
+134
+ #SCORE603E_IRQ19
+ (
+ScÜe_IRQ_F¡
+ + 19 )
+
+ )
+
+139
+ #SCORE603E_85C30_4_IRQ
+
+SCORE603E_IRQ16
+
+
+ )
+
+140
+ #SCORE603E_85C30_2_IRQ
+
+SCORE603E_IRQ17
+
+
+ )
+
+141
+ #SCORE603E_85C30_5_IRQ
+
+SCORE603E_IRQ18
+
+
+ )
+
+142
+ #SCORE603E_85C30_3_IRQ
+
+SCORE603E_IRQ19
+
+
+ )
+
+144
+ #MAX_BOARD_IRQS
+
+SCORE603E_IRQ19
+
+
+ )
+
+146
+BSP_¹ems_q_mng_
+(
+ýuId
+);
+
+148 #ifdeà
+__ýlu¥lus
+
+
+ @irq/irq_init.c
+
+19
+ ~<libýu/io.h
+>
+
+20
+ ~<libýu/¥r.h
+>
+
+21
+ ~<b¥/pci.h
+>
+
+22
+ ~<b¥/»sidu®.h
+>
+
+23
+ ~<b¥/q.h
+>
+
+24
+ ~<b¥.h
+>
+
+25
+ ~<b¥/veùÜs.h
+>
+
+26
+ ~<¹ems/b¥Io.h
+>
+
+28
+ #SHOW_ISA_PCI_BRIDGE_SETTINGS
+ 1
+
+ )
+
+29
+ #SCAN_PCI_PRINT
+ 1
+
+ )
+
+30
+ #TRACE_IRQ_INIT
+ 0
+
+ )
+
+33
+ mbus
+;
+
+34
+ mdeviû
+;
+
+35
+ mfunùiÚ
+;
+
+36 }
+ tpci_i§_bridge_deviû
+;
+
+38
+pci_i§_bridge_deviû
+*
+ gv_82c586
+ = 0;
+
+40
+exº®_exû±iÚ_veùÜ_´Þog_code_size
+[];
+
+41
+exº®_exû±iÚ_veùÜ_´Þog_code
+();
+
+42
+deüemr_exû±iÚ_veùÜ_´Þog_code_size
+[];
+
+43
+deüemr_exû±iÚ_veùÜ_´Þog_code
+();
+
+45
+ $IRQ_DeçuÉ_¹ems_q_hdl
+(
+
+46
+¹ems_q_hdl_·¿m
+
+±r
+
+
+49
+ }
+}
+
+51
+ $IRQ_DeçuÉ_¹ems_q_abË
+(
+
+52 cÚ¡
+__¹ems_q_cÚÃù_d©a__
+ *
+±r
+
+
+55
+ }
+}
+
+57
+ $IRQ_DeçuÉ_¹ems_q_di§bË
+(
+
+58 cÚ¡
+__¹ems_q_cÚÃù_d©a__
+ *
+±r
+
+
+61
+ }
+}
+
+63
+ $IRQ_DeçuÉ_¹ems_q_is_abËd
+(
+
+64 cÚ¡
+__¹ems_q_cÚÃù_d©a__
+ *
+±r
+)
+
+67
+ }
+}
+
+69
+¹ems_q_cÚÃù_d©a
+
+ g¹emsIrq
+[
+BSP_IRQ_NUMBER
+];
+
+70
+¹ems_q_glob®_£gs
+
+ gl_cÚfig
+;
+
+72
+¹ems_q_cÚÃù_d©a
+
+ gdeçuÉIrq
+ = {
+
+73 .
+Çme
+ = 0,
+
+74 .
+ ghdl
+ =
+IRQ_DeçuÉ_¹ems_q_hdl
+,
+
+75 .
+ ghªdË
+ =
+NULL
+,
+
+76 .
+ gÚ
+ =
+IRQ_DeçuÉ_¹ems_q_abË
+,
+
+77 .
+ gÚ
+ =
+IRQ_DeçuÉ_¹ems_q_di§bË
+,
+
+78 .
+ gisOn
+ =
+IRQ_DeçuÉ_¹ems_q_is_abËd
+
+
+81
+¹ems_q_´io
+
+ gqPrioTabË
+[
+BSP_IRQ_NUMBER
+];
+
+89
+ $BSP_¹ems_q_mng_
+(
+ýuId
+)
+
+91
+i
+;
+
+103
+i
+ = 0; i <
+BSP_IRQ_NUMBER
+; i++) {
+
+104
+qPrioTabË
+[
+i
+] = 8;
+
+105
+¹emsIrq
+[
+i
+] =
+deçuÉIrq
+;
+
+106
+¹emsIrq
+[
+i
+].
+Çme
+ = i;
+
+107 #ifdeà
+BSP_SHARED_HANDLER_SUPPORT
+
+
+108
+¹emsIrq
+[
+i
+].
+Ãxt_hªdËr
+ =
+NULL
+;
+
+115
+l_cÚfig
+.
+qNb
+ =
+BSP_IRQ_NUMBER
+;
+
+116
+l_cÚfig
+.
+deçuÉEÁry
+ =
+deçuÉIrq
+;
+
+117
+l_cÚfig
+.
+qHdlTbl
+ =
+¹emsIrq
+;
+
+118
+l_cÚfig
+.
+qBa£
+ =
+BSP_LOWEST_OFFSET
+;
+
+119
+l_cÚfig
+.
+qPrioTbl
+ =
+qPrioTabË
+;
+
+121 ià(!
+ `BSP_¹ems_q_mngt_£t
+(&
+l_cÚfig
+)) {
+
+125
+ `BSP_·nic
+("Unableo initialize RTEMS interrupt Management!!! Systemocked\n");
+
+128 #ifdeà
+TRACE_IRQ_INIT
+
+
+129
+ `´tk
+("RTEMS IRQ management isow operational\n");
+
+131
+ }
+}
+
+ @irq/no_pic.c
+
+13
+ ~<¹ems.h
+>
+
+14
+ ~<b¥.h
+>
+
+15
+ ~<b¥/q.h
+>
+
+16
+ ~<b¥/q_suµ.h
+>
+
+17
+ ~<b¥/veùÜs.h
+>
+
+19
+¹ems_q_cÚÃù_d©a
+ *
+ g¹ems_hdl_tbl
+;
+
+20
+¹ems_q_cÚÃù_d©a
+
+ gdæt_y
+;
+
+25
+ $C_di¥©ch_q_hªdËr
+(
+
+26
+BSP_Exû±iÚ_äame
+ *
+äame
+,
+
+27
+excNum
+
+
+30
+q
+;
+
+31 #ià(
+HAS_PMC_PSC8
+)
+
+32
+ut16_t
+
+check_q
+;
+
+33
+ut16_t
+
+¡©us_wÜd
+;
+
+36 ià(
+excNum
+ =ð
+ASM_DEC_VECTOR
+) {
+
+37
+ `b¥_q_di¥©ch_li¡
+(
+¹ems_hdl_tbl
+,
+BSP_DECREMENTER
+,
+dæt_y
+.
+hdl
+);
+
+41
+q
+ =
+ `»ad_ªd_þr_q
+();
+
+43 #ià(
+HAS_PMC_PSC8
+)
+
+44 ià(
+q
+ =ð
+SCORE603E_PCI_IRQ_0
+) {
+
+45
+¡©us_wÜd
+ =
+ `»ad_ªd_þr_PMC_q
+Ð
+q
+ );
+
+46
+check_q
+=
+SCORE603E_IRQ16
+; check_q<=
+SCORE603E_IRQ19
+; check_irq++) {
+
+47 iàÐ
+ `Is_PMC_IRQ
+Ð
+check_q
+,
+¡©us_wÜd
+ )) {
+
+48
+ `b¥_q_di¥©ch_li¡_ba£
+(
+¹ems_hdl_tbl
+,
+check_q
+,
+dæt_y
+.
+hdl
+);
+
+54
+ `b¥_q_di¥©ch_li¡_ba£
+(
+¹ems_hdl_tbl
+,
+q
+,
+dæt_y
+.
+hdl
+);
+
+58
+ }
+}
+
+61
+ $BSP_abË_q_©_pic
+(cÚ¡
+¹ems_q_numb
+
+q
+)
+
+63
+ut16_t
+
+vec_idx
+ =
+q
+ -
+ScÜe_IRQ_F¡
+;
+
+64
+ `unmask_q
+Ð
+vec_idx
+ );
+
+65
+ }
+}
+
+68
+ $BSP_di§bË_q_©_pic
+(cÚ¡
+¹ems_q_numb
+
+q
+)
+
+70
+ut16_t
+
+vec_idx
+ =
+q
+ -
+ScÜe_IRQ_F¡
+;
+
+71
+ `unmask_q
+Ð
+vec_idx
+ );
+
+73
+ }
+}
+
+76
+ $BSP_£tup_the_pic
+(
+¹ems_q_glob®_£gs
+ *
+cÚfig
+)
+
+78
+dæt_y
+ =
+cÚfig
+->
+deçuÉEÁry
+;
+
+79
+¹ems_hdl_tbl
+ =
+cÚfig
+->
+qHdlTbl
+;
+
+80
+ `_q_d©a_»gi¡
+();
+
+82
+ }
+}
+
+ @startup/Hwr_init.c
+
+11
+ ~<b¥.h
+>
+
+13
+ #PPC603e_SPR_HID0
+ 1008
+
+ )
+
+14
+ #PPC603e_SPR_HID1
+ 1009
+
+ )
+
+15
+ #PPC603e_SPR_IBAT0U
+ 528
+
+ )
+
+16
+ #PPC603e_SPR_IBAT0L
+ 529
+
+ )
+
+17
+ #PPC603e_SPR_DBAT0U
+ 536
+
+ )
+
+18
+ #PPC603e_SPR_DBAT0L
+ 537
+
+ )
+
+19
+ #PPC603e_SPR_IBAT1U
+ 530
+
+ )
+
+20
+ #PPC603e_SPR_IBAT1L
+ 531
+
+ )
+
+21
+ #PPC603e_SPR_DBAT1U
+ 538
+
+ )
+
+22
+ #PPC603e_SPR_DBAT1L
+ 539
+
+ )
+
+23
+ #PPC603e_SPR_IBAT2U
+ 532
+
+ )
+
+24
+ #PPC603e_SPR_IBAT2L
+ 533
+
+ )
+
+25
+ #PPC603e_SPR_DBAT2U
+ 540
+
+ )
+
+26
+ #PPC603e_SPR_DBAT2L
+ 541
+
+ )
+
+27
+ #PPC603e_SPR_IBAT3U
+ 534
+
+ )
+
+28
+ #PPC603e_SPR_IBAT3L
+ 535
+
+ )
+
+29
+ #PPC603e_SPR_DBAT3U
+ 542
+
+ )
+
+30
+ #PPC603e_SPR_DBAT3L
+ 543
+
+ )
+
+31
+ #PPC603e_SPR_DMISS
+ 976
+
+ )
+
+32
+ #PPC603e_SPR_DCMP
+ 977
+
+ )
+
+33
+ #PPC603e_SPR_HASH1
+ 978
+
+ )
+
+34
+ #PPC603e_SPR_HASH2
+ 979
+
+ )
+
+35
+ #PPC603e_SPR_IMISS
+ 980
+
+ )
+
+36
+ #PPC603e_SPR_ICMP
+ 981
+
+ )
+
+37
+ #PPC603e_SPR_RPA
+ 982
+
+ )
+
+38
+ #PPC603e_SPR_SDR1
+ 25
+
+ )
+
+39
+ #PPC603e_SPR_PVR
+ 287
+
+ )
+
+40
+ #PPC603e_SPR_DAR
+ 19
+
+ )
+
+41
+ #PPC603e_SPR_SPRG0
+ 272
+
+ )
+
+42
+ #PPC603e_SPR_SPRG1
+ 273
+
+ )
+
+43
+ #PPC603e_SPR_SPRG2
+ 274
+
+ )
+
+44
+ #PPC603e_SPR_SPRG3
+ 275
+
+ )
+
+45
+ #PPC603e_SPR_DSISR
+ 18
+
+ )
+
+46
+ #PPC603e_SPR_SRR0
+ 26
+
+ )
+
+47
+ #PPC603e_SPR_SRR1
+ 27
+
+ )
+
+48
+ #PPC603e_SPR_TBL_WRITE
+ 284
+
+ )
+
+49
+ #PPC603e_SPR_TBU_WRITE
+ 285
+
+ )
+
+50
+ #PPC603e_SPR_DEC
+ 22
+
+ )
+
+51
+ #PPC603e_SPR_IABR
+ 1010
+
+ )
+
+52
+ #PPC603e_SPR_EAR
+ 282
+
+ )
+
+54
+ #PCI_MEM_CMD
+ (
+SCORE603E_PCI_MEM_BASE
+ >> 16)
+
+ )
+
+57
+ut32_t
+
+ mcouÁ_1_100
+;
+
+58
+ut32_t
+
+ mcouÁ_hours
+;
+
+59
+ut32_t
+
+ mcouÁ_m
+;
+
+60
+ut32_t
+
+ mcouÁ_£c
+;
+
+61
+ut32_t
+
+ mcouÁ_mÚth
+;
+
+62
+ut32_t
+
+ mcouÁ_d©e
+;
+
+63
+ut32_t
+
+ mcouÁ_yr
+;
+
+64
+ut32_t
+
+ mcouÁ_day_of_wk
+;
+
+66
+ut32_t
+
+ mRAM_1_100
+;
+
+67
+ut32_t
+
+ mRAM_hours
+;
+
+68
+ut32_t
+
+ mRAM_mÚth
+;
+
+69
+ut32_t
+
+ mRAM_d©e
+;
+
+70
+ut32_t
+
+ mRAM_yr
+;
+
+71
+ut32_t
+
+ mRAM_day_of_wk
+;
+
+73
+ut32_t
+
+ mru±_¡©us_mask
+;
+
+74
+ut32_t
+
+ mcommªd_»gi¡
+;
+
+75 }
+ tH¬ris_RTC
+;
+
+77
+ $_RTC
+()
+
+79 vÞ©
+H¬ris_RTC
+ *
+the_RTC
+;
+
+81
+the_RTC
+ = (vÞ©
+H¬ris_RTC
+ *)
+BSP_RTC_ADDRESS
+;
+
+83
+the_RTC
+->
+commªd_»gi¡
+ = 0x0;
+
+84
+ }
+}
+
+86
+ $_PCI
+()
+
+90
+ }
+}
+
+92
+ #PPC_G_HID0
+Ð
+_v®ue
+ ) \
+
+94
+_v®ue
+ = 0; \
+
+95
+__asm__
+ volatile( \
+
+98 : "ô" (
+_v®ue
+) \
+
+99 : "0" (
+_v®ue
+) \
+
+101 } 0)
+
+ )
+
+103
+ #PPC_S_HID0
+Ð
+_v®ue
+ ) \
+
+105
+__asm__
+ volatile( \
+
+109 : "ô" (
+_v®ue
+) \
+
+110 : "0" (
+_v®ue
+) \
+
+112 } 0)
+
+ )
+
+114
+ $¡ruùiÚ_ÿche_abË
+ ()
+
+116
+ut32_t
+
+v®ue
+;
+
+122
+ `PPC_G_HID0
+Ð
+v®ue
+ );
+
+124
+v®ue
+ |= 0x00008000;
+
+126
+ `PPC_S_HID0
+Ð
+v®ue
+ );
+
+127
+ }
+}
+
+129
+ $d©a_ÿche_abË
+ ()
+
+131
+ut32_t
+
+v®ue
+;
+
+137
+ `PPC_G_HID0
+Ð
+v®ue
+ );
+
+139
+v®ue
+ |= 0x00004000;
+
+141
+ `PPC_S_HID0
+Ð
+v®ue
+ );
+
+142
+ }
+}
+
+ @startup/bspstart.c
+
+14
+ ~<¡rg.h
+>
+
+16
+ ~<b¥.h
+>
+
+17
+ ~<b¥/boÙÿrd.h
+>
+
+18
+ ~<¹ems/libio.h
+>
+
+19
+ ~<¹ems/libcsuµÜt.h
+>
+
+20
+ ~<¹ems/b¥Io.h
+>
+
+21
+ ~<¹ems/couÁ.h
+>
+
+22
+ ~<libýu/ýuIdt.h
+>
+
+23
+ ~<b¥/q.h
+>
+
+25
+ #DEBUG
+ 0
+
+ )
+
+30
+ gBSP_hp_¡¬t
+;
+
+35
+ gBSP_bus_äequcy
+;
+
+40
+ gBSP_´oûssÜ_äequcy
+;
+
+47
+ gBSP_time_ba£_divisÜ
+ = 3960;
+
+52
+ut32_t
+
+ gb¥_þicks_³r_u£c
+;
+
+57
+RamSize
+[];
+
+58
+ut32_t
+
+ gBSP_mem_size
+;
+
+60
+__¹ems_d
+[];
+
+62
+ $BSP_·nic
+(*
+s
+)
+
+64
+ `´tk
+("% PANIC %s\n",
+_RTEMS_vsiÚ
+,
+s
+);
+
+65
+__asm__
+
+ `__vÞ©e
+ ("sc");
+
+66
+ }
+}
+
+68
+ $_BSP_F©®_rÜ
+(
+v
+)
+
+70
+ `´tk
+("% PANIC ERROR %x\n",
+_RTEMS_vsiÚ
+,
+v
+);
+
+71
+__asm__
+
+ `__vÞ©e
+ ("sc");
+
+72
+ }
+}
+
+79
+_RTC
+();
+
+80
+lize_PMC
+();
+
+82
+ $b¥_´edriv_hook
+()
+
+84
+ `_PCI
+();
+
+85
+ `lize_univ£
+();
+
+87 #ià
+DEBUG
+
+
+88
+ `´tk
+("bsp_predriver_hook: initialize_PCI_bridge\n");
+
+90
+ `lize_PCI_bridge
+ ();
+
+92 #ià(
+HAS_PMC_PSC8
+)
+
+93 #ià
+DEBUG
+
+
+94
+ `´tk
+("bsp_predriver_hook: initialize_PMC\n");
+
+96
+ `lize_PMC
+();
+
+99 #ià
+DEBUG
+
+
+100
+ `´tk
+("bsp_predriver_hook: End ofoutine\n");
+
+103
+ }
+}
+
+110
+ $lize_PMC
+() {
+
+111 vÞ©
+ut32_t
+ *
+PMC_addr
+;
+
+112
+ut32_t
+
+d©a
+;
+
+117
+PMC_addr
+ =
+ `BSP_PCI_DEVICE_ADDRESS
+( 0x4 );
+
+118 *
+PMC_addr
+ = 0x020080cc;
+
+119 #ià
+DEBUG
+
+
+120
+ `´tk
+("lize_PMC: 0x%x = 0x%x\n",
+PMC_addr
+, 0x020080cc);
+
+126
+PMC_addr
+ =
+ `BSP_PCI_DEVICE_ADDRESS
+( 0x14 );
+
+127 *
+PMC_addr
+ = (
+BSP_PCI_REGISTER_BASE
+ >> 24) & 0x3f;
+
+128 #ià
+DEBUG
+
+
+129
+ `´tk
+("lize_PMC: 0x%x = 0x%x\n",
+PMC_addr
+, ((
+BSP_PCI_REGISTER_BASE
+ >> 24) & 0x3f));
+
+132
+PMC_addr
+ = (vÞ©
+ut32_t
+*)
+
+133
+ `BSP_PMC_SERIAL_ADDRESS
+( 0x100000 );
+
+134
+d©a
+ = *
+PMC_addr
+;
+
+135 #ià
+DEBUG
+
+
+136
+ `´tk
+("lize_PMC: Rd 0x%x (0x%x)\n",
+PMC_addr
+,
+d©a
+ );
+
+137
+ `´tk
+("lize_PMC: Rd 0x%x (0x%x)\n",
+PMC_addr
+,
+d©a
+ & 0xfc );
+
+139 *
+PMC_addr
+ =
+d©a
+ & 0xfc;
+
+140
+ }
+}
+
+149
+ $b¥_¡¬t
+( )
+
+151
+m¤_v®ue
+ = 0x0000;
+
+152
+u_t
+
+SckS¹
+;
+
+153
+u_t
+
+SckSize
+;
+
+154
+µc_ýu_id_t
+
+myCpu
+;
+
+155
+µc_ýu_»visiÚ_t
+
+myCpuRevisiÚ
+;
+
+157
+ `¹ems_b¥_day
+( 1000 );
+
+162 #ià
+DEBUG
+
+
+163
+ `´tk
+("bsp_start: Zero outots of memory\n");
+
+166
+BSP_´oûssÜ_äequcy
+ = 266000000;
+
+167
+BSP_bus_äequcy
+ = 66000000;
+
+174
+myCpu
+ =
+ `g_µc_ýu_ty³
+();
+
+175
+myCpuRevisiÚ
+ =
+ `g_µc_ýu_»visiÚ
+();
+
+176
+ `´tk
+("Cpu: 0x%x RevisiÚ: %d\n",
+myCpu
+,
+myCpuRevisiÚ
+);
+
+177
+ `´tk
+("Cpu %s\n",
+ `g_µc_ýu_ty³_Çme
+(
+myCpu
+) );
+
+182
+SckS¹
+ = (
+u_t
+è
+__¹ems_d
+;
+
+183
+SckSize
+ =
+ `¹ems_cÚfigu¿tiÚ_g_¼u±_¡ack_size
+();
+
+184
+ `´tk
+("Interrupt Stack Start: 0x%x Size: 0x%x Heap Start: 0x%x\n",
+
+185
+SckS¹
+,
+SckSize
+,
+BSP_hp_¡¬t
+
+
+188
+BSP_mem_size
+ = (
+ut32_t
+è
+RamSize
+;
+
+189
+ `´tk
+("BSP_mem_size: %p\n",
+RamSize
+ );
+
+194
+ `µc_exc_lize
+(
+SckS¹
+,
+SckSize
+);
+
+196
+m¤_v®ue
+ = 0x2030;
+
+197
+ `_CPU_MSR_SET
+Ð
+m¤_v®ue
+ );
+
+198
+__asm__
+ volatile("sync; isync");
+
+203 #ià
+DEBUG
+
+
+204
+ `´tk
+("bsp_start: set clicks
oer usec\n");
+
+206
+b¥_þicks_³r_u£c
+ = 66 / 4;
+
+207
+ `¹ems_couÁ_lize_cÚvr
+(
+b¥_þicks_³r_u£c
+ * 1000000);
+
+209 #ià
+BSP_DATA_CACHE_ENABLED
+
+
+210 #ià
+DEBUG
+
+
+211
+ `´tk
+("bsp_start: cache_enable\n");
+
+213
+ `¡ruùiÚ_ÿche_abË
+ ();
+
+214
+ `d©a_ÿche_abË
+ ();
+
+215 #ià
+DEBUG
+
+
+216
+ `´tk
+("bsp_start: END BSP_DATA_CACHE_ENABLED\n");
+
+223 #ià
+DEBUG
+
+
+224
+ `´tk
+("bspstart: Call BSP_rtems_irq_mng_init\n");
+
+226
+ `BSP_¹ems_q_mng_
+(0);
+
+228 #ià
+DEBUG
+
+
+229
+ `´tk
+("bsp_start:nd BSPSTART\n");
+
+230
+ `ShowBATS
+();
+
+232
+ }
+}
+
+ @startup/genpvec.c
+
+13
+ ~<b¥.h
+>
+
+14
+ ~<¹ems/cha.h
+>
+
+15
+ ~<¹ems/b¥Io.h
+>
+
+16
+ ~<as£¹.h
+>
+
+18
+ ~<¡dio.h
+>
+
+24
+¹ems_i¤
+
+exº®_exû±iÚ_ISR
+ (
+
+25
+¹ems_veùÜ_numb
+
+veùÜ
+
+
+28
+ #NUM_LIRQ_HANDLERS
+ 20
+
+ )
+
+29
+ #NUM_LIRQ
+ (
+MAX_BOARD_IRQS
+ -
+PPC_IRQ_LAST
+ )
+
+ )
+
+37
+¹ems_cha_node
+
+ mNode
+;
+
+38
+¹ems_i¤_y
+
+ mhªdËr
+;
+
+39
+¹ems_veùÜ_numb
+
+ mveùÜ
+;
+
+40 }
+ tEE_ISR_Ty³
+;
+
+45
+EE_ISR_Ty³
+
+ gISR_Nodes
+ [
+NUM_LIRQ_HANDLERS
+];
+
+46
+ut16_t
+
+ gNodes_U£d
+;
+
+47
+¹ems_cha_cÚÞ
+
+ gISR_A¼ay
+ [
+NUM_LIRQ
+];
+
+50
+_q_d©a_»gi¡
+();
+
+52
+ $In_EE_mask_
+()
+
+54
+ }
+}
+
+60
+¹ems_i¤_y
+
+ $£t_EE_veùÜ
+(
+
+61
+¹ems_i¤_y
+
+hªdËr
+,
+
+62
+¹ems_veùÜ_numb
+
+veùÜ
+
+
+65
+ut16_t
+
+vec_idx
+ =
+veùÜ
+ -
+ScÜe_IRQ_F¡
+;
+
+66
+ut32_t
+
+dex
+;
+
+68
+ `as£¹
+ (
+Nodes_U£d
+ <
+NUM_LIRQ_HANDLERS
+);
+
+75
+dex
+=0 ; index <ð
+Nodes_U£d
+ ; index++ ) {
+
+76 iàÐ
+ISR_Nodes
+[
+dex
+].
+veùÜ
+ == vector &&
+
+77
+ISR_Nodes
+[
+dex
+].
+hªdËr
+ == handler )
+
+78
+NULL
+;
+
+85
+Nodes_U£d
+++;
+
+87
+dex
+ =
+Nodes_U£d
+ - 1;
+
+89
+ISR_Nodes
+[
+dex
+].
+hªdËr
+ = handler;
+
+90
+ISR_Nodes
+[
+dex
+].
+veùÜ
+ = vector;
+
+95
+ `¹ems_cha_³nd
+Ð&
+ISR_A¼ay
+[
+vec_idx
+], &
+ISR_Nodes
+[
+dex
+].
+Node
+ );
+
+100
+ `unmask_q
+Ð
+vec_idx
+ );
+
+102
+NULL
+;
+
+103
+ }
+}
+
+108
+¹ems_i¤
+
+ $exº®_exû±iÚ_ISR
+ (
+
+109
+¹ems_veùÜ_numb
+
+veùÜ
+
+
+112
+ut16_t
+
+dex
+;
+
+113
+EE_ISR_Ty³
+ *
+node
+;
+
+114
+ut16_t
+
+v®ue
+;
+
+115 #ià(
+HAS_PMC_PSC8
+)
+
+116
+ut16_t
+
+PMC_q
+;
+
+117
+ut16_t
+
+check_q
+;
+
+118
+ut16_t
+
+¡©us_wÜd
+;
+
+121
+dex
+ =
+ `»ad_ªd_þr_q
+();
+
+122 iàÐ
+dex
+ >ð
+NUM_LIRQ
+ ) {
+
+123
+ `´tk
+Ð"ERROR:: Inv®id iÁru±umb (%02x)\n",
+dex
+ );
+
+127 #ià(
+HAS_PMC_PSC8
+)
+
+128
+PMC_q
+ =
+SCORE603E_PCI_IRQ_0
+ -
+SCORE603E_IRQ00
+;
+
+130 ià(
+dex
+ =ð
+PMC_q
+) {
+
+131
+¡©us_wÜd
+ =
+ `»ad_ªd_þr_PMC_q
+Ð
+dex
+ );
+
+133
+check_q
+=
+SCORE603E_IRQ16
+; check_q<=
+SCORE603E_IRQ19
+; check_irq++) {
+
+134 iàÐ
+ `Is_PMC_IRQ
+Ð
+check_q
+,
+¡©us_wÜd
+ )) {
+
+135
+dex
+ =
+check_q
+ -
+SCORE603E_IRQ00
+;
+
+136
+node
+ = (
+EE_ISR_Ty³
+ *)(
+ISR_A¼ay
+[
+dex
+ ].
+f¡
+);
+
+138 iàÐ
+ `¹ems_cha_is_
+Ð&
+ISR_A¼ay
+[
+dex
+ ], (*)
+node
+ ) ) {
+
+139
+ `´tk
+ ("ERROR:: check %d iÁru± %02d ha nØi¤\n",
+check_q
+,
+dex
+);
+
+140
+v®ue
+ =
+ `g_q_mask
+();
+
+141
+ `´tk
+(" Mask = %02x\n",
+v®ue
+);
+
+143 !
+ `¹ems_cha_is_
+Ð&
+ISR_A¼ay
+[
+dex
+ ], (*)
+node
+ ) ) {
+
+144 (*
+node
+->
+hªdËr
+)Ðnode->
+veùÜ
+ );
+
+145
+node
+ = (
+EE_ISR_Ty³
+ *ènode->
+Node
+.
+Ãxt
+;
+
+153
+node
+ = (
+EE_ISR_Ty³
+ *)(
+ISR_A¼ay
+[
+dex
+ ].
+f¡
+);
+
+154 iàÐ
+ `¹ems_cha_is_
+Ð&
+ISR_A¼ay
+[
+dex
+ ], (*)
+node
+ ) ) {
+
+155
+ `´tk
+Ð"ERROR:: iÁru± %02x ha nØi¤\n",
+dex
+);
+
+156
+v®ue
+ =
+ `g_q_mask
+();
+
+157
+ `´tk
+(" Mask = %02x\n",
+v®ue
+);
+
+160 !
+ `¹ems_cha_is_
+Ð&
+ISR_A¼ay
+[
+dex
+ ], (*)
+node
+ ) ) {
+
+161 (*
+node
+->
+hªdËr
+)Ðnode->
+veùÜ
+ );
+
+162
+node
+ = (
+EE_ISR_Ty³
+ *ènode->
+Node
+.
+Ãxt
+;
+
+166
+ }
+}
+
+ @startup/vmeintr.c
+
+14
+ ~<¹ems.h
+>
+
+15
+ ~<b¥.h
+>
+
+16
+ ~<¹ems/vme.h
+>
+
+21
+ $VME_¼u±_Di§bË
+(
+
+22
+VME_¼u±_Mask
+
+mask
+
+
+25 vÞ©
+ut8_t
+ *
+VME_¼u±_abË
+;
+
+26
+ut8_t
+
+v®ue
+;
+
+28
+VME_¼u±_abË
+ = 0;
+
+29
+v®ue
+ = *
+VME_¼u±_abË
+;
+
+30
+v®ue
+ &ð~
+mask
+;
+
+31 *
+VME_¼u±_abË
+ =
+v®ue
+;
+
+32
+ }
+}
+
+37
+ $VME_¼u±_EÇbË
+(
+
+38
+VME_¼u±_Mask
+
+mask
+
+
+41 vÞ©
+ut8_t
+ *
+VME_¼u±_abË
+;
+
+42
+ut8_t
+
+v®ue
+;
+
+44
+VME_¼u±_abË
+ = 0;
+
+45
+v®ue
+ = *
+VME_¼u±_abË
+;
+
+46
+v®ue
+ |ð
+mask
+;
+
+47 *
+VME_¼u±_abË
+ =
+v®ue
+;
+
+48
+ }
+}
+
+ @timer/timer.c
+
+18
+ ~<as£¹.h
+>
+
+20
+ ~<b¥.h
+>
+
+21
+ ~<¹ems/btim.h
+>
+
+23
+ut64_t
+
+ gTim_driv_S¹_time
+;
+
+25
+boÞ
+
+ gbchm¬k_tim_fd_avage_ovhd
+;
+
+31
+ $bchm¬k_tim_lize
+()
+
+38
+Tim_driv_S¹_time
+ =
+ `PPC_G_timeba£_»gi¡
+();
+
+39
+ }
+}
+
+45
+bchm¬k_tim_t
+
+ $bchm¬k_tim_»ad
+()
+
+47
+ut64_t
+
+þicks
+;
+
+48
+ut64_t
+
+tÙ®64
+;
+
+49
+ut32_t
+
+tÙ®
+;
+
+53
+þicks
+ =
+ `PPC_G_timeba£_»gi¡
+();
+
+55
+ `as£¹
+Ð
+þicks
+ >
+Tim_driv_S¹_time
+ );
+
+57
+tÙ®64
+ =
+þicks
+ -
+Tim_driv_S¹_time
+;
+
+59
+ `as£¹
+Ð
+tÙ®64
+ <= 0xffffffff );
+
+61
+tÙ®
+ = (
+ut32_t
+è
+tÙ®64
+;
+
+63 iàÐ
+bchm¬k_tim_fd_avage_ovhd
+ =ð
+ue
+ )
+
+64
+tÙ®
+;
+
+66 iàÐ
+tÙ®
+ <
+BSP_TIMER_LEAST_VALID
+ )
+
+69
+ `BSP_CÚvt_deüemr
+(
+tÙ®
+ -
+BSP_TIMER_AVG_OVERHEAD
+);
+
+70
+ }
+}
+
+72
+ $bchm¬k_tim_di§bË_subaùg_avage_ovhd
+(
+
+73
+boÞ
+
+fd_æag
+
+
+76
+bchm¬k_tim_fd_avage_ovhd
+ =
+fd_æag
+;
+
+77
+ }
+}
+
+ @tod/tod.c
+
+14
+ ~<¹ems.h
+>
+
+15
+ ~<tod.h
+>
+
+16
+ ~<b¥.h
+>
+
+22
+ #ICM1770_CRYSTAL_FREQ_32K
+ 0x00
+
+ )
+
+23
+ #ICM1770_CRYSTAL_FREQ_1M
+ 0x01
+
+ )
+
+24
+ #ICM1770_CRYSTAL_FREQ_2M
+ 0x02
+
+ )
+
+25
+ #ICM1770_CRYSTAL_FREQ_4M
+ 0x03
+
+ )
+
+27
+ICM7170_GTOD
+(
+
+28 vÞ©*
+imc1770_»gs
+,
+
+29
+ut8_t
+
+icm1770_äeq
+,
+
+30
+¹ems_time_of_day
+ *
+¹c_tod
+
+
+32
+ICM7170_STOD
+(
+
+33 vÞ©*
+imc1770_»gs
+,
+
+34
+ut8_t
+
+icm1770_äeq
+,
+
+35
+¹ems_time_of_day
+ *
+¹c_tod
+
+
+43
+ $£tRlTimeToRTEMS
+()
+
+45
+¹ems_time_of_day
+
+¹c_tod
+;
+
+47
+ `ICM7170_GTOD
+Ð
+BSP_RTC_ADDRESS
+,
+BSP_RTC_FREQUENCY
+, &
+¹c_tod
+ );
+
+48
+ `¹ems_þock_£t
+Ð&
+¹c_tod
+ );
+
+49
+ }
+}
+
+51
+ $£tRlTimeFromRTEMS
+()
+
+53
+¹ems_time_of_day
+
+¹ems_tod
+;
+
+55
+ `¹ems_þock_g
+Ð
+RTEMS_CLOCK_GET_TOD
+, &
+¹ems_tod
+ );
+
+56
+ `ICM7170_STOD
+Ð
+BSP_RTC_ADDRESS
+,
+BSP_RTC_FREQUENCY
+, &
+¹ems_tod
+ );
+
+57
+ }
+}
+
+59
+ $checkRlTime
+()
+
+61
+¹ems_time_of_day
+
+¹ems_tod
+;
+
+62
+¹ems_time_of_day
+
+¹c_tod
+;
+
+64
+ `ICM7170_GTOD
+Ð
+BSP_RTC_ADDRESS
+,
+BSP_RTC_FREQUENCY
+, &
+¹c_tod
+ );
+
+65
+ `¹ems_þock_g
+Ð
+RTEMS_CLOCK_GET_TOD
+, &
+¹ems_tod
+ );
+
+67 ifÐ
+¹ems_tod
+.
+yr
+ =ð
+¹c_tod
+.year &&
+
+68
+¹ems_tod
+.
+mÚth
+ =ð
+¹c_tod
+.month &&
+
+69
+¹ems_tod
+.
+day
+ =ð
+¹c_tod
+.day ) {
+
+70 ((
+¹ems_tod
+.
+hour
+ -
+¹c_tod
+.hour) * 3600) +
+
+71 ((
+¹ems_tod
+.
+mu
+ -
+¹c_tod
+.minute) * 60) +
+
+72 (
+¹ems_tod
+.
+£cÚd
+ -
+¹c_tod
+.second);
+
+75
+ }
+}
+
+82
+ $ICM7170_GFld
+(
+
+83 vÞ©*
+imc1770_»gs
+,
+
+84
+»g
+
+
+87
+x
+;
+
+89
+x
+ =
+imc1770_»gs
+[
+»g
+*4];
+
+91
+x
+;
+
+92
+ }
+}
+
+94
+ $ICM7170_SFld
+(
+
+95 vÞ©*
+imc1770_»gs
+,
+
+96
+»g
+,
+
+97
+d
+
+
+100
+imc1770_»gs
+[
+»g
+*4] =
+d
+;
+
+101
+ }
+}
+
+103
+ $ICM7170_GTOD
+(
+
+104 vÞ©*
+imc1770_»gs
+,
+
+105
+ut8_t
+
+icm1770_äeq
+,
+
+106
+¹ems_time_of_day
+ *
+¹c_tod
+
+
+109
+yr
+;
+
+110
+u£c
+;
+
+111
+boÞ
+
+
+ =
+ue
+;
+
+114 ià(
+
+ ) {
+
+115
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x11, (0x0ø|
+icm1770_äeq
+) );
+
+116
+
+ =
+çl£
+;
+
+122
+u£c
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x00 );
+
+124
+yr
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x06 );
+
+125 iàÐ
+yr
+ >= 88 )
+
+126
+yr
+ += 1900;
+
+128
+yr
+ += 2000;
+
+130
+¹c_tod
+->
+yr
+ = year;
+
+131
+¹c_tod
+->
+mÚth
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x04 );
+
+132
+¹c_tod
+->
+day
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x05 );
+
+133
+¹c_tod
+->
+hour
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x01 );
+
+134
+¹c_tod
+->
+mu
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x02 );
+
+135
+¹c_tod
+->
+£cÚd
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x03 );
+
+136
+¹c_tod
+->
+ticks
+ =
+ `ICM7170_GFld
+Ð
+imc1770_»gs
+, 0x00 );
+
+137
+ }
+}
+
+139
+ $ICM7170_STOD
+(
+
+140 vÞ©*
+imc1770_»gs
+,
+
+141
+ut8_t
+
+icm1770_äeq
+,
+
+142
+¹ems_time_of_day
+ *
+¹c_tod
+
+
+145
+yr
+;
+
+147
+yr
+ =
+¹c_tod
+->year;
+
+148 iàÐ
+yr
+ >= 2088 )
+
+149
+ `¹ems_çl_rÜ_occu¼ed
+( 0xBAD0BAD0 );
+
+151 iàÐ
+yr
+ >= 2000 )
+
+152
+yr
+ -= 2000;
+
+154
+yr
+ -= 1900;
+
+156
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x11, (0x04 |
+icm1770_äeq
+ ) );
+
+158
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x06,
+yr
+ );
+
+159
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x04,
+¹c_tod
+->
+mÚth
+ );
+
+160
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x05,
+¹c_tod
+->
+day
+ );
+
+161
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x01,
+¹c_tod
+->
+hour
+ );
+
+162
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x02,
+¹c_tod
+->
+mu
+ );
+
+163
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x03,
+¹c_tod
+->
+£cÚd
+ );
+
+169
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x07, 1 );
+
+171
+ `ICM7170_SFld
+Ð
+imc1770_»gs
+, 0x11, (0x0ø|
+icm1770_äeq
+) );
+
+172
+ }
+}
+
+ @vme/VMEConfig.h
+
+1 #iâdeà
+RTEMS_BSP_VME_CONFIG_H
+
+
+2
+ #RTEMS_BSP_VME_CONFIG_H
+
+
+ )
+
+63 #undeà
+BSP_VME_BAT_IDX
+
+
+65
+ #_VME_A32_WIN0_ON_PCI
+ 0x10000000
+
+ )
+
+66
+ #_VME_A24_ON_PCI
+ 0x1f000000
+
+ )
+
+67
+ #_VME_A16_ON_PCI
+ 0x1fff0000
+
+ )
+
+72
+ #_VME_A32_WIN0_ON_VME
+ 0x20000000
+
+ )
+
+78 #undeà
+_VME_DRAM_OFFSET
+
+
+85 #undeà
+_VME_CSR_ON_PCI
+
+
+87 #undeà
+BSP_PCI_VME_DRIVER_DOES_EOI
+
+
+89
+BSP_VMEIn
+();
+
+90
+BSP_VMEIrqMgrIn¡®l
+();
+
+92
+ #BSP_VME_UNIVERSE_INSTALL_IRQ_MGR
+(
+r
+) \
+
+94
+r
+ =
+ `vmeUniv£In¡®lIrqMgr
+(0,5,1,6); \
+
+95 } 0)
+
+ )
+
+ @
+1
+.
+0
+24
+370
+PCI_bus/PCI.c
+PCI_bus/PCI.h
+PCI_bus/flash.c
+PCI_bus/universe.c
+console/85c30.c
+console/85c30.h
+console/console.c
+console/consolebsp.h
+console/tbl85c30.c
+include/bsp.h
+include/gen2.h
+include/tm27.h
+irq/FPGA.c
+irq/irq.c
+irq/irq.h
+irq/irq_init.c
+irq/no_pic.c
+startup/Hwr_init.c
+startup/bspstart.c
+startup/genpvec.c
+startup/vmeintr.c
+timer/timer.c
+tod/tod.c
+vme/VMEConfig.h
diff --git a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
index f6e3c5a..dc78498 100644
--- a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
@@ -1,8 +1,9 @@
-/* bsp.h
- *
+/*
* This include file contains all board IO definitions.
- *
- * COPYRIGHT (c) 1989-2009.
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -123,68 +124,55 @@ rtems_isr_entry set_EE_vector(
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector /* vector number */
);
-void initialize_external_exception_vector ();
+void initialize_external_exception_vector(void);
/*
* Hwr_init.c
*/
-void init_PCI();
-void instruction_cache_enable ();
-void data_cache_enable ();
+void init_PCI(void);
+void init_RTC(void);
+void instruction_cache_enable(void);
+void data_cache_enable(void);
-void initialize_PCI_bridge ();
-uint16_t read_and_clear_irq ();
-void set_irq_mask(
- uint16_t value
-);
-uint16_t get_irq_mask();
+void initialize_PCI_bridge(void);
+uint16_t read_and_clear_irq(void);
+void set_irq_mask(uint16_t value);
+uint16_t get_irq_mask(void);
/*
* universe.c
*/
-void initialize_universe();
-
-void set_irq_mask(
- uint16_t value
-);
-
-uint16_t get_irq_mask();
-
-void unmask_irq(
- uint16_t irq_idx
-);
-
-void mask_irq(
- uint16_t irq_idx
-);
-
-void init_irq_data_register();
-
-uint16_t read_and_clear_PMC_irq(
- uint16_t irq
-);
-
-bool Is_PMC_IRQ(
- uint32_t pmc_irq,
- uint16_t status_word
-);
-
-uint16_t read_and_clear_irq();
+void initialize_universe(void);
+void set_irq_mask(uint16_t value);
+uint16_t get_irq_mask(void);
+void unmask_irq(uint16_t irq_idx);
+void mask_irq(uint16_t irq_idx);
+void init_irq_data_register(void);
+uint16_t read_and_clear_PMC_irq(uint16_t irq);
+bool Is_PMC_IRQ( uint32_t pmc_irq, uint16_t status_word);
+uint16_t read_and_clear_irq(void);
+void set_vme_base_address(uint32_t base_address);
+uint32_t get_vme_slave_size(void);
+void set_vme_slave_size (uint32_t size);
/*
* FPGA.c
*/
-void initialize_PCI_bridge ();
+void initialize_PCI_bridge(void);
+void init_irq_data_register(void);
+uint32_t Read_pci_device_register(uint32_t address);
+void Write_pci_device_register(uint32_t address, uint32_t data);
/* flash.c */
+unsigned int SCORE603e_FLASH_Disable(uint32_t unused);
+unsigned int SCORE603e_FLASH_verify_enable(void);
+unsigned int SCORE603e_FLASH_Enable_writes(uint32_t area);
-unsigned int SCORE603e_FLASH_Disable(
- uint32_t unused
-);
-unsigned int SCORE603e_FLASH_verify_enable();
-unsigned int SCORE603e_FLASH_Enable_writes(
- uint32_t area /* Unused */
-);
+/*
+ * PCI.c
+ */
+uint32_t PCI_bus_read(volatile uint32_t *_addr);
+void PCI_bus_write(volatile uint32_t *_addr, uint32_t _data);
#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
diff --git a/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c b/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
index 33e22de..9c08d1d 100644
--- a/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
+++ b/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
@@ -1,6 +1,9 @@
-/* FPGA.c -- Bridge for second and subsequent generations
- *
- * COPYRIGHT (c) 1989-2009.
+/*
+ * FPGA.c -- Bridge for second and subsequent generations
+ */
+
+/*
+ * COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
@@ -120,7 +123,7 @@ void init_irq_data_register(void)
}
}
-uint16_t read_and_clear_PMC_irq(
+uint16_t read_and_clear_PMC_irq(
uint16_t irq
)
{
--
1.9.3
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