STM32F4 register definitions and PLL settings patch

[Chris Nott]

OK, thats good to hear. I have some extra code here I can incorporate 
when I have time, like DMA driven I2S audio, SPI and UART.


On 19/10/2014 2:27 PM, Tomasz Gregorek wrote:
> Hi Chris
>
>
> Yes, there are more registers specific to specific CPU versions, 
> different number of UARTs and other peripherals. As above, lets keep 
> it simple for the start.
>
> Myself I have working UART driver with interrupt driven data receiver 
> (currently it is polled UART). I should be able to push it in few 
> days. I2C is half working but will take more time due to work overload.
>
> Cheers
> Tomasz
>
>
>>
>>
>>     Thanks and regards
>>     Tomasz
>>
>>
>>     2014-10-18 11:06 GMT+02:00 Chris Nott <chrisn at vl.com.au
>>     <mailto:chrisn at vl.com.au>>:
>>
>>         Hi,
>>
>>         I sent these header file changes previously, they didn't get
>>         picked up.
>>
>>         I re-merged with the head, cleaned up formatting and fixed a
>>         bug with PLL_Q setting not generating the right auxiliary
>>         clock frequency for USB peripheral - Tomasz this was your
>>         change, could you please review my fix.
>>
>>         Regards,
>>         Chris.
>>
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>>
>
>
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