PowerPC Cache Warning Help Request
Gedare Bloom
gedare at rtems.org
Fri Oct 24 14:03:22 UTC 2014
On Fri, Oct 24, 2014 at 1:36 AM, Sebastian Huber
<sebastian.huber at embedded-brains.de> wrote:
> On 23/10/14 19:41, Gedare Bloom wrote:
>>
>> We might consider removing the cache manager in favor of making dcache
>> flush/invalidate and icache invalidate lines part of the score/cpu
>> port (are they the same across cpu's in the same arch family?)
>
>
> No, the caches are highly chip specific.
>
OK. I just grepped and I don't see any CPU_cache being used from
anywhere except bsp code. I suspect we should give this framework the
axe, or reduce it drastically and move it into the BSP layer.
>
> --
> Sebastian Huber, embedded brains GmbH
>
> Address : Dornierstr. 4, D-82178 Puchheim, Germany
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>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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