[PATCH] Rename or1ksim BSP to generic_or1k
Hesham ALMatary
heshamelmatary at gmail.com
Sun Apr 19 10:24:14 UTC 2015
On Sun, Apr 19, 2015 at 1:49 AM, Joel Sherrill
<joel.sherrill at oarcorp.com> wrote:
> On 04/18/2015 04:57 PM, Gedare Bloom wrote:
>>
>> Looks straightforward to me. Any doc need updating?
>>
> Maybe the wiki. But the other pieces are sim-scripts
> and rtems-tools for the simulator scripts.
>
> I don't know of much else unless Hesham wants to
> update his blog about this.
Yeah once this patch got merged I'll send patches for sim-scripts,
tester, and update my blog.
>>
>> On Sat, Apr 18, 2015 at 12:25 PM, Hesham ALMatary
>> <heshamelmatary at gmail.com> wrote:
>>>
>>> or1ksim BSP was initially named after or1ksim simulator, and it was
>>> intented to only run there. But now it can also run on QEMU, jor1k and
>>> real FPGA boards without modifications. It makes more sense to give
>>> it a new generic name like generic_or1k.
>>> ---
>>> c/src/lib/libbsp/or1k/acinclude.m4 | 4 +-
>>> c/src/lib/libbsp/or1k/configure.ac | 2 +-
>>> c/src/lib/libbsp/or1k/generic_or1k/Makefile.am | 110 +++++++++++++
>>> c/src/lib/libbsp/or1k/generic_or1k/README | 34 ++++
>>> c/src/lib/libbsp/or1k/generic_or1k/bsp_specs | 11 ++
>>> .../lib/libbsp/or1k/generic_or1k/clock/clockdrv.c | 152
>>> +++++++++++++++++
>>> c/src/lib/libbsp/or1k/generic_or1k/configure.ac | 30 ++++
>>> .../or1k/generic_or1k/console/console-config.c | 58 +++++++
>>> c/src/lib/libbsp/or1k/generic_or1k/console/uart.c | 152
>>> +++++++++++++++++
>>> c/src/lib/libbsp/or1k/generic_or1k/include/bsp.h | 47 ++++++
>>> .../or1k/generic_or1k/include/generic_or1k.h | 118 +++++++++++++
>>> c/src/lib/libbsp/or1k/generic_or1k/include/irq.h | 45 +++++
>>> c/src/lib/libbsp/or1k/generic_or1k/include/uart.h | 42 +++++
>>> c/src/lib/libbsp/or1k/generic_or1k/irq/irq.c | 42 +++++
>>> .../make/custom/generic_or1k-testsuite.tcfg | 5 +
>>> .../or1k/generic_or1k/make/custom/generic_or1k.cfg | 7 +
>>> c/src/lib/libbsp/or1k/generic_or1k/preinstall.am | 120 ++++++++++++++
>>> c/src/lib/libbsp/or1k/generic_or1k/sim.cfg | 105 ++++++++++++
>>> c/src/lib/libbsp/or1k/generic_or1k/start/start.S | 182
>>> +++++++++++++++++++++
>>> .../libbsp/or1k/generic_or1k/startup/bspstart.c | 25 +++
>>> .../lib/libbsp/or1k/generic_or1k/startup/linkcmds | 41 +++++
>>> c/src/lib/libbsp/or1k/generic_or1k/timer/timer.c | 64 ++++++++
>>> c/src/lib/libbsp/or1k/or1ksim/Makefile.am | 110 -------------
>>> c/src/lib/libbsp/or1k/or1ksim/README | 37 -----
>>> c/src/lib/libbsp/or1k/or1ksim/bsp_specs | 11 --
>>> c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c | 149
>>> -----------------
>>> c/src/lib/libbsp/or1k/or1ksim/configure.ac | 30 ----
>>> .../libbsp/or1k/or1ksim/console/console-config.c | 58 -------
>>> c/src/lib/libbsp/or1k/or1ksim/console/uart.c | 152
>>> -----------------
>>> c/src/lib/libbsp/or1k/or1ksim/include/bsp.h | 47 ------
>>> c/src/lib/libbsp/or1k/or1ksim/include/irq.h | 45 -----
>>> c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h | 118 -------------
>>> c/src/lib/libbsp/or1k/or1ksim/include/uart.h | 42 -----
>>> c/src/lib/libbsp/or1k/or1ksim/irq/irq.c | 42 -----
>>> .../or1ksim/make/custom/or1ksim-testsuite.tcfg | 5 -
>>> .../libbsp/or1k/or1ksim/make/custom/or1ksim.cfg | 7 -
>>> c/src/lib/libbsp/or1k/or1ksim/preinstall.am | 120 --------------
>>> c/src/lib/libbsp/or1k/or1ksim/sim.cfg | 105 ------------
>>> c/src/lib/libbsp/or1k/or1ksim/start/start.S | 182
>>> ---------------------
>>> c/src/lib/libbsp/or1k/or1ksim/startup/bspstart.c | 25 ---
>>> c/src/lib/libbsp/or1k/or1ksim/startup/linkcmds | 41 -----
>>> c/src/lib/libbsp/or1k/or1ksim/timer/timer.c | 64 --------
>>> 42 files changed, 1393 insertions(+), 1393 deletions(-)
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/Makefile.am
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/README
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/bsp_specs
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/clock/clockdrv.c
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/configure.ac
>>> create mode 100644
>>> c/src/lib/libbsp/or1k/generic_or1k/console/console-config.c
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/console/uart.c
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/include/bsp.h
>>> create mode 100644
>>> c/src/lib/libbsp/or1k/generic_or1k/include/generic_or1k.h
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/include/irq.h
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/include/uart.h
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/irq/irq.c
>>> create mode 100644
>>> c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k-testsuite.tcfg
>>> create mode 100644
>>> c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k.cfg
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/preinstall.am
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/sim.cfg
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/start/start.S
>>> create mode 100644
>>> c/src/lib/libbsp/or1k/generic_or1k/startup/bspstart.c
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/startup/linkcmds
>>> create mode 100644 c/src/lib/libbsp/or1k/generic_or1k/timer/timer.c
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/Makefile.am
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/README
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/bsp_specs
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/configure.ac
>>> delete mode 100644
>>> c/src/lib/libbsp/or1k/or1ksim/console/console-config.c
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/console/uart.c
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/include/bsp.h
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/include/irq.h
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/include/uart.h
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/irq/irq.c
>>> delete mode 100644
>>> c/src/lib/libbsp/or1k/or1ksim/make/custom/or1ksim-testsuite.tcfg
>>> delete mode 100644
>>> c/src/lib/libbsp/or1k/or1ksim/make/custom/or1ksim.cfg
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/preinstall.am
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/sim.cfg
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/start/start.S
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/startup/bspstart.c
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/startup/linkcmds
>>> delete mode 100644 c/src/lib/libbsp/or1k/or1ksim/timer/timer.c
>>>
>>> diff --git a/c/src/lib/libbsp/or1k/acinclude.m4
>>> b/c/src/lib/libbsp/or1k/acinclude.m4
>>> index c593670..c6bc720 100644
>>> --- a/c/src/lib/libbsp/or1k/acinclude.m4
>>> +++ b/c/src/lib/libbsp/or1k/acinclude.m4
>>> @@ -2,8 +2,8 @@
>>> AC_DEFUN([RTEMS_CHECK_BSPDIR],
>>> [
>>> case "$1" in
>>> - or1ksim )
>>> - AC_CONFIG_SUBDIRS([or1ksim]);;
>>> + generic_or1k )
>>> + AC_CONFIG_SUBDIRS([generic_or1k]);;
>>> *)
>>> AC_MSG_ERROR([Invalid BSP]);;
>>> esac
>>> diff --git a/c/src/lib/libbsp/or1k/configure.ac
>>> b/c/src/lib/libbsp/or1k/configure.ac
>>> index c07615b..e809e40 100644
>>> --- a/c/src/lib/libbsp/or1k/configure.ac
>>> +++ b/c/src/lib/libbsp/or1k/configure.ac
>>> @@ -2,7 +2,7 @@
>>>
>>> AC_PREREQ([2.69])
>>>
>>> AC_INIT([rtems-c-src-lib-libbsp-or1k],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
>>> -AC_CONFIG_SRCDIR([or1ksim])
>>> +AC_CONFIG_SRCDIR([generic_or1k])
>>> RTEMS_TOP(../../../../..)
>>>
>>> RTEMS_CANONICAL_TARGET_CPU
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/Makefile.am
>>> b/c/src/lib/libbsp/or1k/generic_or1k/Makefile.am
>>> new file mode 100644
>>> index 0000000..66df24e
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/Makefile.am
>>> @@ -0,0 +1,110 @@
>>> +#
>>> +# @file
>>> +#
>>> +# @brief Makefile of LibBSP for the generic_or1k BSP.
>>> +#
>>> +
>>> +ACLOCAL_AMFLAGS = -I ../../../../aclocal
>>> +
>>> +include $(top_srcdir)/../../../../automake/compile.am
>>> +
>>> +include_bspdir = $(includedir)/bsp
>>> +include_libcpudir = $(includedir)/libcpu
>>> +
>>> +dist_project_lib_DATA = bsp_specs
>>> +
>>>
>>> +###############################################################################
>>> +# Header
>>> #
>>>
>>> +###############################################################################
>>> +
>>> +include_bsp_HEADERS =
>>> +include_HEADERS = include/bsp.h
>>> +include_HEADERS += ../../shared/include/tm27.h
>>> +
>>> +nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
>>> +include_bsp_HEADERS += ../shared/include/linker-symbols.h
>>> +include_bsp_HEADERS += ../../../libbsp/shared/include/mm.h
>>> +include_bsp_HEADERS += ../../shared/include/utility.h
>>> +include_bsp_HEADERS += ../../shared/include/irq-generic.h
>>> +include_bsp_HEADERS += ../../shared/include/irq-info.h
>>> +include_bsp_HEADERS += ../../shared/include/stackalloc.h
>>> +include_bsp_HEADERS += ../../shared/include/uart-output-char.h
>>> +include_bsp_HEADERS += ../shared/include/cache_.h
>>> +include_bsp_HEADERS += include/irq.h
>>> +include_bsp_HEADERS += include/uart.h
>>> +include_bsp_HEADERS += include/generic_or1k.h
>>> +
>>> +nodist_include_HEADERS = ../../shared/include/coverhd.h \
>>> + include/bspopts.h
>>> +
>>>
>>> +###############################################################################
>>> +# Data
>>> #
>>>
>>> +###############################################################################
>>> +
>>> +noinst_LIBRARIES = libbspstart.a
>>> +
>>> +libbspstart_a_SOURCES = start/start.S
>>> +
>>> +project_lib_DATA = start.$(OBJEXT)
>>> +
>>> +project_lib_DATA += startup/linkcmds
>>> +project_lib_DATA += ../shared/startup/linkcmds.base
>>> +
>>>
>>> +###############################################################################
>>> +# LibBSP
>>> #
>>>
>>> +###############################################################################
>>> +
>>> +noinst_LIBRARIES += libbsp.a
>>> +
>>> +libbsp_a_SOURCES =
>>> +libbsp_a_CPPFLAGS =
>>> +libbsp_a_LIBADD =
>>> +
>>> +# Startup
>>> +libbsp_a_SOURCES += ../../shared/bspreset.c
>>> +libbsp_a_SOURCES += startup/bspstart.c
>>> +
>>> +# Shared
>>> +libbsp_a_SOURCES += ../../shared/bootcard.c
>>> +libbsp_a_SOURCES += ../../shared/bspclean.c
>>> +libbsp_a_SOURCES += ../../shared/bspgetworkarea.c
>>> +libbsp_a_SOURCES += ../../shared/bsplibc.c
>>> +libbsp_a_SOURCES += ../../shared/bsppost.c
>>> +libbsp_a_SOURCES += ../../shared/bsppredriverhook.c
>>> +libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
>>> +libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c
>>> +libbsp_a_SOURCES += ../../shared/sbrk.c
>>> +libbsp_a_SOURCES += ../../shared/src/stackalloc.c
>>> +
>>> +# Console
>>> +libbsp_a_SOURCES += ../../shared/console.c
>>> +libbsp_a_SOURCES += ../../shared/console_control.c
>>> +libbsp_a_SOURCES += ../../shared/console_read.c
>>> +libbsp_a_SOURCES += ../../shared/console_select.c
>>> +libbsp_a_SOURCES += ../../shared/console_write.c
>>> +libbsp_a_SOURCES += console/console-config.c
>>> +libbsp_a_SOURCES += console/uart.c
>>> +
>>> +# Timer
>>> +libbsp_a_SOURCES += timer/timer.c
>>> +
>>> +# clock
>>> +libbsp_a_SOURCES += clock/clockdrv.c ../../../shared/clockdrv_shell.h
>>> +
>>> +# IRQ
>>> +libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
>>> +libbsp_a_SOURCES += ../../shared/src/irq-generic.c
>>> +libbsp_a_SOURCES += ../../shared/src/irq-info.c
>>> +libbsp_a_SOURCES += irq/irq.c
>>> +
>>> +# Cache
>>> +libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
>>> +
>>>
>>> +###############################################################################
>>> +# Special Rules
>>> #
>>>
>>> +###############################################################################
>>> +
>>> +DISTCLEANFILES = include/bspopts.h
>>> +
>>> +include $(srcdir)/preinstall.am
>>> +include $(top_srcdir)/../../../../automake/local.am
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/README
>>> b/c/src/lib/libbsp/or1k/generic_or1k/README
>>> new file mode 100644
>>> index 0000000..015286c
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/README
>>> @@ -0,0 +1,34 @@
>>> +This BSP can run on or1ksim, QEMU, jor1k [1] and OpenRISC supported FPGA
>>> boards.
>>> +
>>> +$ git clone git at github.com:openrisc/or1ksim.git
>>> +$ cd or1ksim
>>> +$ mkdir builddir_or1ksim
>>> +$ cd builddir_or1ksim
>>> +$ ../configure --target=or1k-elf --prefix=/opt/or1ksim
>>> +$ make all
>>> +$ make install
>>> +$ export PATH=/opt/or1ksim/bin:$PATH
>>> +
>>> +Configuration file "sim.cfg" should be provided for complex board
>>> +configurations at the current directory (which you run or1ksim from) or
>>> at
>>> +~/.or1k/
>>> +
>>> +The current sim.cfg file that configures or1ksim emulator to
>>> RTEMS/or1ksim BSP
>>> +is at the same directory as this README. You can also use or1ksim script
>>> from
>>> +rtems-tools/sim-scripts.
>>> +
>>> +From command line type:
>>> +
>>> +$ or1k-elf-sim -f sim.cfg $PATH_TO_RTEMS_EXE
>>> +
>>> +From QEMU:
>>> +
>>> +$ qemu-system-or32 -serial mon:stdio -serial /dev/null -net none
>>> -nographic \
>>> + -m 128M -kernel $PATH_TO_RTEMS_EXE
>>> +
>>> +from sim-scripts:
>>> +
>>> +$ or1ksim $PATH_TO_RTEMS_EXE
>>> +$ qemu-or1k $PATH_TO_RTEMS_EXE
>>> +
>>> +[1] http://s-macke.github.io/jor1k/demos/rtems.html
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/bsp_specs
>>> b/c/src/lib/libbsp/or1k/generic_or1k/bsp_specs
>>> new file mode 100644
>>> index 0000000..0fcd2dc
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/bsp_specs
>>> @@ -0,0 +1,11 @@
>>> +%rename endfile old_endfile
>>> +%rename startfile old_startfile
>>> +%rename link old_link
>>> +
>>> +*startfile:
>>> +%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \
>>> +%{!qrtems_debug: start.o%s} \
>>> +%{qrtems_debug: start_g.o%s}}}
>>> +
>>> +*link:
>>> +%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e _start}
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/clock/clockdrv.c
>>> b/c/src/lib/libbsp/or1k/generic_or1k/clock/clockdrv.c
>>> new file mode 100644
>>> index 0000000..57e46c1
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/clock/clockdrv.c
>>> @@ -0,0 +1,152 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup bsp_clock
>>> + *
>>> + * @brief or1k clock support.
>>> + */
>>> +
>>> +/*
>>> + * generic_or1k Clock driver
>>> + *
>>> + * COPYRIGHT (c) 2014-2015 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#include<rtems.h>
>>> +#include<bsp.h>
>>> +#include<bsp/irq.h>
>>> +#include<bsp/generic_or1k.h>
>>> +#include<rtems/score/cpu.h>
>>> +#include<rtems/score/or1k-utility.h>
>>> +
>>> +/* The number of clock cycles before generating a tick timer interrupt.
>>> */
>>> +#define TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT 0x09ED9
>>> +#define OR1K_CLOCK_CYCLE_TIME_NANOSECONDS 10
>>> +
>>> +/* CPU counter */
>>> +static CPU_Counter_ticks cpu_counter_ticks;
>>> +
>>> +/* This prototype is added here to Avoid warnings */
>>> +void Clock_isr(void *arg);
>>> +
>>> +static void generic_or1k_clock_at_tick(void)
>>> +{
>>> + uint32_t TTMR;
>>> +
>>> + /* For TTMR register,
>>> + * The least significant 28 bits are the number of clock cycles
>>> + * before generating a tick timer interrupt. While the most
>>> + * significant 4 bits are used for mode configuration, tick timer
>>> + * interrupt enable and pending interrupts status.
>>> + */
>>> + TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
>>> + (TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT&
>>> CPU_OR1K_SPR_TTMR_TP_MASK)
>>> + )& ~(CPU_OR1K_SPR_TTMR_IP);
>>> +
>>> + _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
>>> + _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
>>> +
>>> + cpu_counter_ticks += TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
>>> +}
>>> +
>>> +static void generic_or1k_clock_handler_install(
>>> + proc_ptr new_isr,
>>> + proc_ptr old_isr
>>> +)
>>> +{
>>> + rtems_status_code sc = RTEMS_SUCCESSFUL;
>>> + old_isr = NULL;
>>> + _CPU_ISR_install_vector(OR1K_EXCEPTION_TICK_TIMER,
>>> + new_isr,
>>> + old_isr);
>>> +
>>> + if (sc != RTEMS_SUCCESSFUL) {
>>> + rtems_fatal_error_occurred(0xdeadbeef);
>>> + }
>>> +}
>>> +
>>> +static void generic_or1k_clock_initialize(void)
>>> +{
>>> + uint32_t TTMR;
>>> +
>>> + /* For TTMR register,
>>> + * The least significant 28 bits are the number of clock cycles
>>> + * before generating a tick timer interrupt. While the most
>>> + * significant 4 bits are used for mode configuration, tick timer
>>> + * interrupt enable and pending interrupts status.
>>> + */
>>> +
>>> + /* FIXME: Long interval should pass since initializing the tick timer
>>> + * registers fires exceptions dispite interrupts has not been enabled
>>> yet.
>>> + */
>>> + TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
>>> + (0xFFED9& CPU_OR1K_SPR_TTMR_TP_MASK)
>>> + )& ~(CPU_OR1K_SPR_TTMR_IP);
>>> +
>>> + _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
>>> + _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
>>> +
>>> + /* Initialize CPU Counter */
>>> + cpu_counter_ticks = 0;
>>> +}
>>> +
>>> + static void generic_or1k_clock_cleanup(void)
>>> +{
>>> + uint32_t sr;
>>> +
>>> + sr = _OR1K_mfspr(CPU_OR1K_SPR_SR);
>>> +
>>> + /* Disable tick timer exceptions */
>>> + _OR1K_mtspr(CPU_OR1K_SPR_SR, (sr& ~CPU_OR1K_SPR_SR_IEE)
>>> +& ~CPU_OR1K_SPR_SR_TEE);
>>> +
>>> + /* Invalidate tick timer config registers */
>>> + _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
>>> + _OR1K_mtspr(CPU_OR1K_SPR_TTMR, 0);
>>> +}
>>> +
>>> +/*
>>> + * Return the nanoseconds since last tick
>>> + */
>>> +static uint32_t generic_or1k_clock_nanoseconds_since_last_tick(void)
>>> +{
>>> + return
>>> + TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT * OR1K_CLOCK_CYCLE_TIME_NANOSECONDS;
>>> +}
>>> +
>>> +CPU_Counter_ticks _CPU_Counter_read(void)
>>> +{
>>> + uint32_t ticks_since_last_timer_interrupt;
>>> +
>>> + ticks_since_last_timer_interrupt = _OR1K_mfspr(CPU_OR1K_SPR_TTCR);
>>> +
>>> + return cpu_counter_ticks + ticks_since_last_timer_interrupt;
>>> +}
>>> +
>>> +CPU_Counter_ticks _CPU_Counter_difference(
>>> + CPU_Counter_ticks second,
>>> + CPU_Counter_ticks first
>>> +)
>>> +{
>>> + return second - first;
>>> +}
>>> +#define Clock_driver_support_at_tick() generic_or1k_clock_at_tick()
>>> +
>>> +#define Clock_driver_support_initialize_hardware()
>>> generic_or1k_clock_initialize()
>>> +
>>> +#define Clock_driver_support_install_isr(isr, old_isr) \
>>> + do { \
>>> + old_isr = NULL; \
>>> + generic_or1k_clock_handler_install(isr, old_isr); \
>>> + } while (0)
>>> +
>>> +#define Clock_driver_support_shutdown_hardware()
>>> generic_or1k_clock_cleanup()
>>> +
>>> +#define Clock_driver_nanoseconds_since_last_tick \
>>> + generic_or1k_clock_nanoseconds_since_last_tick
>>> +
>>> +#include "../../../shared/clockdrv_shell.h"
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/configure.ac
>>> b/c/src/lib/libbsp/or1k/generic_or1k/configure.ac
>>> new file mode 100644
>>> index 0000000..9d78c44
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/configure.ac
>>> @@ -0,0 +1,30 @@
>>> +#
>>> +# @file
>>> +#
>>> +# @brief Configure script of LibBSP for generic_or1k BSP.
>>> +#
>>> +
>>> +AC_PREREQ(2.69)
>>>
>>> +AC_INIT([rtems-c-src-lib-libbsp-or1k-generic],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
>>> +AC_CONFIG_SRCDIR([bsp_specs])
>>> +RTEMS_TOP(../../../../../..)
>>> +
>>> +RTEMS_CANONICAL_TARGET_CPU
>>> +AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
>>> +RTEMS_BSP_CONFIGURE
>>> +
>>> +RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
>>> +RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for
>>> BSP start])
>>> +
>>> +RTEMS_BSPOPTS_SET([BSP_GENERIC_OR1K_PERIPHCLK],[*],[50000000U])
>>> +RTEMS_BSPOPTS_HELP([BSP_GENERIC_OR1K_PERIPHCLK],[or1k PERIPHCLK clock
>>> frequency in Hz])
>>> +
>>> +RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
>>> +RTEMS_CANONICALIZE_TOOLS
>>> +RTEMS_PROG_CCAS
>>> +
>>> +RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
>>> +RTEMS_BSP_LINKCMDS
>>> +
>>> +AC_CONFIG_FILES([Makefile])
>>> +AC_OUTPUT
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/console/console-config.c
>>> b/c/src/lib/libbsp/or1k/generic_or1k/console/console-config.c
>>> new file mode 100644
>>> index 0000000..a5b29a9
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/console/console-config.c
>>> @@ -0,0 +1,58 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup generic_or1k_uart
>>> + *
>>> + * @brief Console Configuration.
>>> + */
>>> +
>>> +/*
>>> + * Copyright (c) 2014-2015 Hesham ALMatary
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#include<rtems/bspIo.h>
>>> +
>>> +#include<libchip/serial.h>
>>> +
>>> +#include<bspopts.h>
>>> +#include<bsp/uart.h>
>>> +#include<bsp/generic_or1k.h>
>>> +
>>> +console_tbl Console_Configuration_Ports [] = {
>>> + {
>>> + .sDeviceName = "/dev/ttyS0",
>>> + .deviceType = SERIAL_CUSTOM,
>>> + .pDeviceFns =&generic_or1k_uart_fns,
>>> + .deviceProbe = NULL,
>>> + .pDeviceFlow = NULL,
>>> + .ulCtrlPort1 = OR1K_BSP_UART_BASE,
>>> + .ulCtrlPort2 = 0,
>>> + .ulClock = OR1K_UART_DEFAULT_BAUD,
>>> + .ulIntVector = OR1K_BSP_UART_IRQ
>>> + }
>>> +};
>>> +
>>> +#define PORT_COUNT \
>>> + (sizeof(Console_Configuration_Ports) \
>>> + / sizeof(Console_Configuration_Ports [0]))
>>> +
>>> +unsigned long Console_Configuration_Count = PORT_COUNT;
>>> +
>>> +static void output_char(char c)
>>> +{
>>> + const console_fns *con =
>>> + Console_Configuration_Ports [Console_Port_Minor].pDeviceFns;
>>> +
>>> + if (c == '\n') {
>>> + con->deviceWritePolled((int) Console_Port_Minor, '\r');
>>> + }
>>> + con->deviceWritePolled((int) Console_Port_Minor, c);
>>> +}
>>> +
>>> +BSP_output_char_function_type BSP_output_char = output_char;
>>> +
>>> +BSP_polling_getchar_function_type BSP_poll_char = NULL;
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/console/uart.c
>>> b/c/src/lib/libbsp/or1k/generic_or1k/console/uart.c
>>> new file mode 100644
>>> index 0000000..6f8a494
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/console/uart.c
>>> @@ -0,0 +1,152 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup generic_or1k_uart
>>> + *
>>> + * @brief UART support.
>>> + */
>>> +
>>> +/*
>>> + * COPYRIGHT (c) 2014-2015 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#include<libchip/sersupp.h>
>>> +#include<bsp/generic_or1k.h>
>>> +#include<bsp.h>
>>> +#include<bsp/irq.h>
>>> +#include<bsp/uart.h>
>>> +#include<rtems/score/isr.h>
>>> +
>>> +static void uart_initialize(int minor);
>>> +static int uart_first_open(int major, int minor, void *arg);
>>> +static int uart_last_close(int major, int minor, void *arg);
>>> +static int uart_read_polled(int minor);
>>> +static ssize_t uart_write(int minor, const char *buf, size_t len);
>>> +static void uart_write_polled(int minor, char c);
>>> +static int uart_set_attributes(int minor, const struct termios *t);
>>> +
>>> +#if 0
>>> +/*
>>> + * These will be useful when the driver supports interrupt driven IO.
>>> + */
>>> +static rtems_vector_number uart_get_irq_number(const console_tbl *ct)
>>> +{
>>> + return ct->ulIntVector;
>>> +}
>>> +
>>> +static uint32_t uart_get_baud(const console_tbl *ct)
>>> +{
>>> + return ct->ulClock;
>>> +}
>>> +#endif
>>> +
>>> +static void uart_set_baud(int baud)
>>> +{
>>> + uint16_t divisor = (OR1K_BSP_CLOCK_FREQ) / (16 * baud);
>>> + OR1K_REG(OR1K_BSP_UART_REG_LINE_CTRL) =
>>> + OR1K_BSP_UART_REG_LINE_CTRL_DLAB;
>>> +
>>> + OR1K_REG(OR1K_BSP_UART_REG_DEV_LATCH_LOW) = divisor& 0xff;
>>> +
>>> + OR1K_REG(OR1K_BSP_UART_REG_DEV_LATCH_HIGH) =
>>> + (divisor>> 8);
>>> +}
>>> +
>>> +static void uart_initialize(int minor)
>>> +{
>>> + /* Set baud rate */
>>> + uart_set_baud(OR1K_UART_DEFAULT_BAUD);
>>> +
>>> + /* Set data pattern configuration */
>>> + OR1K_REG(OR1K_BSP_UART_REG_LINE_CTRL) =
>>> + OR1K_BSP_UART_REG_LINE_CTRL_WLEN8;
>>> +
>>> + /* Reset receiver and transmitter */
>>> + OR1K_REG(OR1K_BSP_UART_REG_FIFO_CTRL) =
>>> + OR1K_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO |
>>> + OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR |
>>> + OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_14;
>>> +
>>> + /* Disable all interrupts */
>>> + OR1K_REG(OR1K_BSP_UART_REG_INT_ENABLE) = 0x00;
>>> +
>>> +}
>>> +
>>> +static int uart_first_open(int major, int minor, void *arg)
>>> +{
>>> + rtems_libio_open_close_args_t *oc = (rtems_libio_open_close_args_t *)
>>> arg;
>>> + struct rtems_termios_tty *tty = (struct rtems_termios_tty *)
>>> oc->iop->data1;
>>> + const console_tbl *ct = Console_Port_Tbl [minor];
>>> + console_data *cd =&Console_Port_Data [minor];
>>> +
>>> + cd->termios_data = tty;
>>> + rtems_termios_set_initial_baud(tty, ct->ulClock);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static int uart_last_close(int major, int minor, void *arg)
>>> +{
>>> + return 0;
>>> +}
>>> +
>>> +static int uart_read_polled(int minor)
>>> +{
>>> + unsigned char lsr;
>>> +
>>> + /* Get a character when avaiable */
>>> + do {
>>> + lsr = OR1K_REG(OR1K_BSP_UART_REG_LINE_STATUS);
>>> + } while ((lsr& OR1K_BSP_UART_REG_LINE_STATUS_DR)
>>> + != OR1K_BSP_UART_REG_LINE_STATUS_DR);
>>> +
>>> + return OR1K_REG(OR1K_BSP_UART_REG_RX);
>>> +}
>>> +
>>> +static void uart_write_polled(int minor, char c)
>>> +{
>>> + unsigned char lsr;
>>> +
>>> + /* Wait until there is no pending data in the transmitter FIFO (empty)
>>> */
>>> + do {
>>> + lsr = OR1K_REG(OR1K_BSP_UART_REG_LINE_STATUS);
>>> + } while (!(lsr& OR1K_BSP_UART_REG_LINE_STATUS_THRE));
>>> +
>>> + OR1K_REG(OR1K_BSP_UART_REG_TX) = c;
>>> +}
>>> +
>>> +static ssize_t uart_write(
>>> + int minor,
>>> + const char *s,
>>> + size_t n
>>> +)
>>> +{
>>> + ssize_t i = 0;
>>> +
>>> + for (i = 0; i< n; ++i){
>>> + uart_write_polled(minor, s [i]);
>>> + }
>>> +
>>> + return n;
>>> +}
>>> +
>>> +static int uart_set_attributes(int minor, const struct termios *term)
>>> +{
>>> + return -1;
>>> +}
>>> +
>>> +const console_fns generic_or1k_uart_fns = {
>>> + .deviceProbe = libchip_serial_default_probe,
>>> + .deviceFirstOpen = uart_first_open,
>>> + .deviceLastClose = uart_last_close,
>>> + .deviceRead = uart_read_polled,
>>> + .deviceWrite = uart_write,
>>> + .deviceInitialize = uart_initialize,
>>> + .deviceWritePolled = uart_write_polled,
>>> + .deviceSetAttributes = uart_set_attributes,
>>> + .deviceOutputUsesInterrupts = false
>>> +};
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/include/bsp.h
>>> b/c/src/lib/libbsp/or1k/generic_or1k/include/bsp.h
>>> new file mode 100644
>>> index 0000000..72bb107
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/include/bsp.h
>>> @@ -0,0 +1,47 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup generic_or1k
>>> + *
>>> + * @brief Global BSP definitions.
>>> + */
>>> +
>>> +/*
>>> + * COPYRIGHT (c) 2014-2015 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#ifndef LIBBSP_GENERIC_OR1K_H
>>> +#define LIBBSP_GENERIC_OR1K_H
>>> +
>>> +#include<bspopts.h>
>>> +#include<rtems.h>
>>> +#include<rtems/console.h>
>>> +#include<rtems/clockdrv.h>
>>> +#include<bsp/generic_or1k.h>
>>> +
>>> +#include<bsp/default-initial-extension.h>
>>> +
>>> +#ifdef __cplusplus
>>> +extern "C" {
>>> +#endif /* __cplusplus */
>>> +
>>> +#define BSP_FEATURE_IRQ_EXTENSION
>>> +
>>> +#ifdef __cplusplus
>>> +}
>>> +#endif /* __cplusplus */
>>> +
>>> +#endif /* LIBBSP_GENERIC_OR1K_H */
>>> +
>>> +/**
>>> + * @defgroup generic_or1k support
>>> + *
>>> + * @ingroup bsp_or1k
>>> + *
>>> + * @brief generic_or1k support package
>>> + *
>>> + */
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/include/generic_or1k.h
>>> b/c/src/lib/libbsp/or1k/generic_or1k/include/generic_or1k.h
>>> new file mode 100644
>>> index 0000000..e4d9760
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/include/generic_or1k.h
>>> @@ -0,0 +1,118 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup generic_or1k_reg
>>> + *
>>> + * @brief Register definitions.
>>> + */
>>> +
>>> +/*
>>> + * COPYRIGHT (c) 2014-2015 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#ifndef LIBBSP_GENERIC_OR1K_H
>>> +#define LIBBSP_GENERIC_OR1K_H
>>> +
>>> +#include<stdint.h>
>>> +
>>> +/**
>>> + * @defgroup generic_or1k_reg Register Definitions
>>> + *
>>> + * @ingroup generic_or1k
>>> + *
>>> + * @brief Shared register definitions for or1k systems.
>>> + *
>>> + * @{
>>> + */
>>> +
>>> +/**
>>> + * @name Register Macros
>>> + *
>>> + * @{
>>> + */
>>> +
>>> + #define OR1K_REG(x) (*((volatile unsigned char *) (x)))
>>> + #define OR1K_BIT(n) (1<< (n))
>>> +
>>> +/** @} */
>>> +
>>> +/**
>>> + * @name Internal OR1K UART Registers
>>> + *
>>> + * @{
>>> + */
>>> +#define OR1K_BSP_CLOCK_FREQ 50000000UL
>>> +#define OR1K_BSP_UART_BASE 0x90000000
>>> +
>>> +#define OR1K_BSP_UART_REG_TX (OR1K_BSP_UART_BASE+0)
>>> +#define OR1K_BSP_UART_REG_RX (OR1K_BSP_UART_BASE+0)
>>> +#define OR1K_BSP_UART_REG_DEV_LATCH_LOW (OR1K_BSP_UART_BASE+0)
>>> +#define OR1K_BSP_UART_REG_DEV_LATCH_HIGH (OR1K_BSP_UART_BASE+1)
>>> +#define OR1K_BSP_UART_REG_INT_ENABLE (OR1K_BSP_UART_BASE+1)
>>> +#define OR1K_BSP_UART_REG_INT_ID (OR1K_BSP_UART_BASE+2)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL (OR1K_BSP_UART_BASE+2)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL (OR1K_BSP_UART_BASE+3)
>>> +#define OR1K_BSP_UART_REG_MODEM_CTRL (OR1K_BSP_UART_BASE+4)
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS (OR1K_BSP_UART_BASE+5)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS (OR1K_BSP_UART_BASE+6)
>>> +#define OR1K_BSP_UART_REG_SCRATCH (OR1K_BSP_UART_BASE+7)
>>> +
>>> +/* FIFO Control Register */
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_1 (0x00)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO (0x01)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR (0x02)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT (0x03)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_DMA_SELECT (0x08)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_4 (0x40)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_8 (0x80)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_14 (0xC0)
>>> +#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_MASK (0xC0)
>>> +
>>> +/* Line Control Register */
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN5 (0x00)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN6 (0x01)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN7 (0x02)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN8 (0x03)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_STOP (0x04)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_PARITY (0x08)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_EPAR (0x10)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_SPAR (0x20)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_SBC (0x40)
>>> +#define OR1K_BSP_UART_REG_LINE_CTRL_DLAB (0x80)
>>> +
>>> +/* Line Status Register */
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS_DR (0x01)
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS_OE (0x02)
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS_PE (0x04)
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS_FE (0x08)
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS_BI (0x10)
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS_THRE (0x20)
>>> +#define OR1K_BSP_UART_REG_LINE_STATUS_TEMT (0x40)
>>> +
>>> +/* Modem Control Register */
>>> +#define OR1K_BSP_UART_REG_MODEM_CTRL_DTR (0x01)
>>> +#define OR1K_BSP_UART_REG_MODEM_CTRL_RTS (0x02)
>>> +#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT1 (0x04)
>>> +#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT2 (0x08)
>>> +#define OR1K_BSP_UART_REG_MODEM_CTRL_LOOP (0x10)
>>> +
>>> +/* Modem Status Register */
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_DCTS (0x01)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_DDSR (0x02)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_TERI (0x04)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_DDCD (0x08)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_CTS (0x10)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_DSR (0x20)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_RI (0x40)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_DCD (0x80)
>>> +#define OR1K_BSP_UART_REG_MODEM_STATUS_ANY_DELTA (0x0F)
>>> +
>>> +/** @} */
>>> +
>>> +/** @} */
>>> +
>>> +#endif /* LIBBSP_GENERIC_OR1K_H */
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/include/irq.h
>>> b/c/src/lib/libbsp/or1k/generic_or1k/include/irq.h
>>> new file mode 100644
>>> index 0000000..431b250
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/include/irq.h
>>> @@ -0,0 +1,45 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup OR1K_IRQ
>>> + *
>>> + * @brief Interrupt definitions.
>>> + */
>>> +
>>> +/**
>>> + * COPYRIGHT (c) 2014-2015 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#ifndef LIBBSP_GENERIC_OR1K_IRQ_H
>>> +#define LIBBSP_GENERIC_OR1K_IRQ_H
>>> +
>>> +#ifndef ASM
>>> +
>>> +#include<rtems.h>
>>> +#include<rtems/irq.h>
>>> +#include<rtems/irq-extension.h>
>>> +
>>> +#define BSP_INTERRUPT_VECTOR_MIN 0x100
>>> +#define BSP_INTERRUPT_VECTOR_MAX 0x1F00
>>> +
>>> +/* Interrupt Identification Register */
>>> +#define OR1K_BSP_UART_REG_INT_ID_MSI (0x00)
>>> +#define OR1K_BSP_UART_REG_INT_ID_NO_INT (0x01)
>>> +#define OR1K_BSP_UART_REG_INT_ID_THRI (0x02)
>>> +#define OR1K_BSP_UART_REG_INT_ID_RDI (0x04)
>>> +#define OR1K_BSP_UART_REG_INT_ID_ID (0x06)
>>> +#define OR1K_BSP_UART_REG_INT_ID_RLSI (0x06)
>>> +#define OR1K_BSP_UART_REG_INT_ID_TOI (0x0c)
>>> +
>>> +/* Interrupt Enable Register */
>>> +#define OR1K_BSP_UART_REG_INT_ENABLE_RDI (0x01)
>>> +#define OR1K_BSP_UART_REG_INT_ENABLE_THRI (0x02)
>>> +#define OR1K_BSP_UART_REG_INT_ENABLE_RLSI (0x04)
>>> +#define OR1K_BSP_UART_REG_INT_ENABLE_MSI (0x08)
>>> +
>>> +#endif /* ASM */
>>> +#endif /* LIBBSP_GENEIRC_OR1K_IRQ_H */
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/include/uart.h
>>> b/c/src/lib/libbsp/or1k/generic_or1k/include/uart.h
>>> new file mode 100644
>>> index 0000000..dbf3bbf
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/include/uart.h
>>> @@ -0,0 +1,42 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup generic_or1k_uart
>>> + *
>>> + * @brief UART support.
>>> + */
>>> +
>>> +/*
>>> + * COPYRIGHT (c) 2014-2015 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +/**
>>> + * @defgroup generic_or1k_uart UART Support
>>> + *
>>> + * @ingroup generic_or1k
>>> + *
>>> + * @brief Universal Asynchronous Receiver/Transmitter (UART) Support
>>> + */
>>> +
>>> +#ifndef LIBBSP_GENERIC_OR1K_UART_H
>>> +#define LIBBSP_GENERIC_OR1K_UART_H
>>> +
>>> +#include<libchip/serial.h>
>>> +
>>> +#ifdef __cplusplus
>>> +extern "C" {
>>> +#endif /* __cplusplus */
>>> +
>>> +#define OR1K_UART_DEFAULT_BAUD 115200
>>> +#define OR1K_BSP_UART_IRQ 2
>>> +extern const console_fns generic_or1k_uart_fns;
>>> +
>>> +#ifdef __cplusplus
>>> +}
>>> +#endif /* __cplusplus */
>>> +
>>> +#endif /* LIBBSP_GENERIC_OR1K_UART_H */
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/irq/irq.c
>>> b/c/src/lib/libbsp/or1k/generic_or1k/irq/irq.c
>>> new file mode 100644
>>> index 0000000..c3c4d6d
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/irq/irq.c
>>> @@ -0,0 +1,42 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup or1k_interrupt
>>> + *
>>> + * @brief Interrupt support.
>>> + */
>>> +
>>> +/*
>>> + * Copyright (c) 2014 Hesham ALMatary
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE.
>>> + */
>>> +
>>> +#include<bsp/irq.h>
>>> +#include<bsp/irq-generic.h>
>>> +
>>> +/* Almost all of the jobs that the following functions should
>>> + * do are implemented in cpukit
>>> + */
>>> +
>>> +void bsp_interrupt_handler_default(rtems_vector_number vector)
>>> +{
>>> + printk("spurious interrupt: %u\n", vector);
>>> +}
>>> +
>>> +rtems_status_code bsp_interrupt_facility_initialize()
>>> +{
>>> + return 0;
>>> +}
>>> +
>>> +rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number
>>> vector)
>>> +{
>>> + return 0;
>>> +}
>>> +
>>> +rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number
>>> vector)
>>> +{
>>> + return 0;
>>> +}
>>> diff --git
>>> a/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k-testsuite.tcfg
>>> b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k-testsuite.tcfg
>>> new file mode 100644
>>> index 0000000..b8e4a7a
>>> --- /dev/null
>>> +++
>>> b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k-testsuite.tcfg
>>> @@ -0,0 +1,5 @@
>>> +#
>>> +# generic_or1k RTEMS Test Database.
>>> +#
>>> +
>>> +include: testdata/disable-intrcritical-tests.tcfg
>>> diff --git
>>> a/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k.cfg
>>> b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k.cfg
>>> new file mode 100644
>>> index 0000000..fff00ae
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k.cfg
>>> @@ -0,0 +1,7 @@
>>> +include $(RTEMS_ROOT)/make/custom/default.cfg
>>> +
>>> +RTEMS_CPU = or1k
>>> +
>>> +CPU_CFLAGS = -O2
>>> +
>>> +CFLAGS_OPTIMIZE_V ?= -O0 -g
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/preinstall.am
>>> b/c/src/lib/libbsp/or1k/generic_or1k/preinstall.am
>>> new file mode 100644
>>> index 0000000..f5522be
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/preinstall.am
>>> @@ -0,0 +1,120 @@
>>> +## Automatically generated by ampolish3 - Do not edit
>>> +
>>> +if AMPOLISH3
>>> +$(srcdir)/preinstall.am: Makefile.am
>>> + $(AMPOLISH3) $(srcdir)/Makefile.am> $(srcdir)/preinstall.am
>>> +endif
>>> +
>>> +PREINSTALL_DIRS =
>>> +DISTCLEANFILES += $(PREINSTALL_DIRS)
>>> +
>>> +all-am: $(PREINSTALL_FILES)
>>> +
>>> +PREINSTALL_FILES =
>>> +CLEANFILES = $(PREINSTALL_FILES)
>>> +
>>> +all-local: $(TMPINSTALL_FILES)
>>> +
>>> +TMPINSTALL_FILES =
>>> +CLEANFILES += $(TMPINSTALL_FILES)
>>> +
>>> +$(PROJECT_LIB)/$(dirstamp):
>>> + @$(MKDIR_P) $(PROJECT_LIB)
>>> + @:> $(PROJECT_LIB)/$(dirstamp)
>>> +PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
>>> +
>>> +$(PROJECT_INCLUDE)/$(dirstamp):
>>> + @$(MKDIR_P) $(PROJECT_INCLUDE)
>>> + @:> $(PROJECT_INCLUDE)/$(dirstamp)
>>> +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/$(dirstamp):
>>> + @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
>>> + @:> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +
>>> +$(PROJECT_INCLUDE)/libcpu/$(dirstamp):
>>> + @$(MKDIR_P) $(PROJECT_INCLUDE)/libcpu
>>> + @:> $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
>>> +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
>>> +
>>> +$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
>>> +PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
>>> +
>>> +$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
>>> +
>>> +$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/linker-symbols.h:
>>> ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/mm.h: ../../../libbsp/shared/include/mm.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mm.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mm.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/uart-output-char.h:
>>> ../../shared/include/uart-output-char.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart-output-char.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart-output-char.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/cache_.h: ../shared/include/cache_.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/cache_.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/cache_.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/uart.h: include/uart.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/generic_or1k.h: include/generic_or1k.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/generic_or1k.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/generic_or1k.h
>>> +
>>> +$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
>>> +
>>> +$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
>>> +
>>> +$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT)
>>> $(PROJECT_LIB)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
>>> +TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
>>> +
>>> +$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
>>> +TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
>>> +
>>> +$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base
>>> $(PROJECT_LIB)/$(dirstamp)
>>> + $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base
>>> +TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base
>>> +
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/sim.cfg
>>> b/c/src/lib/libbsp/or1k/generic_or1k/sim.cfg
>>> new file mode 100644
>>> index 0000000..1032f0d
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/sim.cfg
>>> @@ -0,0 +1,105 @@
>>> +section memory
>>> + name = "RAM"
>>> + random_seed = 12345
>>> + type = random
>>> + ce = 0
>>> + mc = 0
>>> + baseaddr = 0x00000000
>>> + size = 0x08000000
>>> + delayr = 1
>>> + delayw = 2
>>> +end
>>> +
>>> +section immu
>>> + enabled = 0
>>> + nsets = 64
>>> + nways = 1
>>> + pagesize = 8192
>>> + hitdelay = 0
>>> + missdelay = 0
>>> +end
>>> +
>>> +section dmmu
>>> + enabled = 0
>>> + nsets = 64
>>> + nways = 1
>>> + pagesize = 8192
>>> + hitdelay = 0
>>> + missdelay = 0
>>> +end
>>> +section mc
>>> + enabled = 0
>>> + baseaddr = 0x90000000
>>> + POC = 0x0000000a /* 32 bit SSRAM */
>>> + index = 0
>>> +end
>>> +
>>> +section ic
>>> + enabled = 1
>>> + nsets = 256
>>> + nways = 1
>>> + blocksize = 32
>>> + hitdelay = 20
>>> + missdelay = 60
>>> +end
>>> +
>>> +section dc
>>> + enabled = 1
>>> + nsets = 256
>>> + nways = 1
>>> + blocksize = 32
>>> + load_hitdelay = 40
>>> + load_missdelay = 120
>>> + store_hitdelay = 40
>>> + store_missdelay = 120
>>> +end
>>> +
>>> +section pic
>>> + enabled = 1
>>> + edge_trigger = 1
>>> +end
>>> +
>>> +section sim
>>> + verbose = 1
>>> + debug = 0
>>> + profile = 0
>>> + history = 0
>>> + clkcycle = 10ns /* 100MHz clock */
>>> +end
>>> +
>>> +section VAPI
>>> + enabled = 1
>>> + server_port = 50000
>>> + log_enabled = 1
>>> + vapi_log_file = "vapi.log"
>>> +end
>>> +
>>> +section cpu
>>> + ver = 0x12
>>> + cfg = 0x00
>>> + rev = 0x0001
>>> + upr = 0x0000075f
>>> + superscalar = 0
>>> + hazards = 0
>>> + dependstats = 0
>>> + sbuf_len = 100
>>> +end
>>> +
>>> +section debug
>>> + enabled = 1
>>> + rsp_enabled = 1
>>> + rsp_port = 50001
>>> +end
>>> +
>>> +section uart
>>> + enabled = 1
>>> + baseaddr = 0x90000000
>>> + #channel = "xterm"
>>> + channel = "file:uart0.rx,uart0.tx"
>>> + irq = 2
>>> + 16550 = 1
>>> +end
>>> +
>>> +section pm
>>> + enabled = 1
>>> +end
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/start/start.S
>>> b/c/src/lib/libbsp/or1k/generic_or1k/start/start.S
>>> new file mode 100644
>>> index 0000000..d951a55
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/start/start.S
>>> @@ -0,0 +1,182 @@
>>> +/*
>>> + * Copyright (c) 2014-2015 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +#include<bsp/linker-symbols.h>
>>> +
>>> +/* The following macro defines the first instructions every exception
>>> + * should execute before jumping to its handler function from the
>>> + * exception vector table. r3 is saved into the stack and loaded with
>>> + * vector number before jumping to _ISR_Handler. r3 value is restored
>>> + * back from _ISR_Handler after handling the exception and before
>>> + * returning from interrupt.
>>> + */
>>> +#define EXCEPTION_SETUP(vector) \
>>> + l.nop ;\
>>> + l.addi r1, r1, -200 ;\
>>> + l.sw 0(r1), r3; \
>>> + l.addi r3, r0, vector; \
>>> + l.j _ISR_Handler; \
>>> + l.nop
>>> +
>>> + .extern bsp_start
>>> + .extern boot_card
>>> + .extern bsp_section_bss_begin
>>> + .extern bsp_section_bss_end
>>> +
>>> + .extern bsp_start_vector_table_end
>>> + .extern bsp_start_vector_table_size
>>> + .extern bsp_vector_table_size
>>> + .extern bsp_section_stack_begin
>>> +
>>> + .extern exception_frame_save
>>> + .extern _OR1K_Exception_Process
>>> + .extern _OR1K_Exception_default
>>> + .extern rtems_clock_tick
>>> + .extern _exit
>>> + .extern printk
>>> + .extern bsp_interrupt_handler_default
>>> +
>>> + /* Global symbols */
>>> + .global _start
>>> + .global bsp_start_vector_table_begin
>>> +
>>> +/* Popualte HW vector table */
>>> +
>>> +.section .vector, "ax"
>>> +
>>> +.org 0x100
>>> +_reset:
>>> + l.j _start
>>> + l.nop
>>> +
>>> +.org 0x200
>>> +_buserr:
>>> + EXCEPTION_SETUP(2)
>>> +
>>> +.org 0x300
>>> +_dPageFault:
>>> + EXCEPTION_SETUP(3)
>>> +
>>> +.org 0x400
>>> +_iPageFaule:
>>> + EXCEPTION_SETUP(4)
>>> +
>>> +.org 0x500
>>> +_timer:
>>> + EXCEPTION_SETUP(5)
>>> +
>>> +.org 0x600
>>> +_unalign:
>>> + EXCEPTION_SETUP(6)
>>> +
>>> +.org 0x700
>>> +_undefIns:
>>> + EXCEPTION_SETUP(7)
>>> +
>>> +.org 0x800
>>> +_exInt:
>>> + EXCEPTION_SETUP(8)
>>> +
>>> +.org 0x900
>>> +_dTLB:
>>> + EXCEPTION_SETUP(9)
>>> +
>>> +.org 0xA00
>>> +_iTLB:
>>> + EXCEPTION_SETUP(10)
>>> +
>>> +.org 0xB00
>>> +_range:
>>> + EXCEPTION_SETUP(11)
>>> +
>>> +.org 0xC00
>>> +_syscall:
>>> + EXCEPTION_SETUP(12)
>>> +
>>> +.org 0xD00
>>> +_fp:
>>> + EXCEPTION_SETUP(13)
>>> +
>>> +.org 0xE00
>>> +_trap:
>>> + EXCEPTION_SETUP(14)
>>> +
>>> +.org 0xF00
>>> +_undef1:
>>> + EXCEPTION_SETUP(15)
>>> +
>>> +.org 0x1500
>>> +_undef2:
>>> + EXCEPTION_SETUP(16)
>>> +
>>> +.org 0x1900
>>> +_undef3:
>>> + EXCEPTION_SETUP(17)
>>> +
>>> +.org 0x1F00
>>> +
>>> +bsp_start_vector_table_begin:
>>> +
>>> + .word 0
>>> + .word _start /* Reset */
>>> + .word _OR1K_Exception_default /* Bus Error */
>>> + .word _OR1K_Exception_default /* Data Page Fault */
>>> + .word _OR1K_Exception_default /* Instruction Page Fault */
>>> + .word _OR1K_Exception_default /* Tick timer */
>>> + .word _OR1K_Exception_default /* Alignment */
>>> + .word _OR1K_Exception_default /* Undefiend Instruction */
>>> + .word _OR1K_Exception_default /* External Interrupt */
>>> + .word _OR1K_Exception_default /* Data TLB Miss */
>>> + .word _OR1K_Exception_default /* Instruction TLB Miss */
>>> + .word _OR1K_Exception_default /* Range Exception */
>>> + .word _OR1K_Exception_default /* System Call */
>>> + .word _OR1K_Exception_default /* Floating Point Exception */
>>> + .word _OR1K_Exception_default /* Trap */
>>> + .word _OR1K_Exception_default /* Reserver for future use */
>>> + .word _OR1K_Exception_default /* Reserved for implementation-specific
>>> */
>>> + .word _OR1K_Exception_default /* Reserved for custom exceptions. */
>>> +
>>> +bsp_start_vector_table_end:
>>> +
>>> + .section ".bsp_start_text", "ax"
>>> + .type _start, at function
>>> +
>>> +_start:
>>> + /* Set SR register to Supervision mode */
>>> + l.ori r1, r0, 0x1
>>> + l.mtspr r0, r1, 17
>>> +
>>> + /* load stack and frame pointers */
>>> + l.movhi r1, hi(bsp_section_stack_begin)
>>> + l.ori r1, r1, lo(bsp_section_stack_begin)
>>> + l.add r2, r0, r1
>>> +
>>> +/* Clearing .bss */
>>> + l.movhi r13, hi(bsp_section_bss_begin)
>>> + l.ori r13, r13, lo(bsp_section_bss_begin)
>>> + l.movhi r15, hi(bsp_section_bss_end)
>>> + l.ori r15, r15, lo(bsp_section_bss_end)
>>> +
>>> +_loop_clear_bss:
>>> + l.sfgeu r13, r15
>>> + l.bf _end_clear_bss
>>> + l.addi r13, r13, 4
>>> + l.sw 0(r13), r0
>>> + l.j _loop_clear_bss
>>> + l.nop
>>> +_end_clear_bss:
>>> +
>>> + l.j boot_card
>>> + l.nop
>>> +
>>> +/* Temporary code for unhandled exceptions */
>>> +.section .text
>>> +.align
>>> +.global _unhandled_exception
>>> +
>>> +unhandled_exception:
>>> + l.nop
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/startup/bspstart.c
>>> b/c/src/lib/libbsp/or1k/generic_or1k/startup/bspstart.c
>>> new file mode 100644
>>> index 0000000..2bf417a
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/startup/bspstart.c
>>> @@ -0,0 +1,25 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup generic_or1k
>>> + *
>>> + * @brief Benchmark timer support.
>>> + */
>>> +
>>> +/*
>>> + * Copyright (c) 2014-2015 by Hesham ALMatary
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#include<bsp.h>
>>> +#include<bsp/bootcard.h>
>>> +#include<libcpu/cache.h>
>>> +
>>> +void bsp_start( void )
>>> +{
>>> + _CPU_cache_enable_instruction();
>>> + _CPU_cache_enable_data();
>>> +}
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/startup/linkcmds
>>> b/c/src/lib/libbsp/or1k/generic_or1k/startup/linkcmds
>>> new file mode 100644
>>> index 0000000..cef99d3
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/startup/linkcmds
>>> @@ -0,0 +1,41 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup bsp_linker
>>> + *
>>> + * @brief Memory map
>>> + */
>>> +
>>> +/*
>>> + * COPYRIGHT (c) 2014 Hesham ALMatary<heshamelmatary at gmail.com>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +MEMORY
>>> + {
>>> + VECTOR_RAM (AIW) : ORIGIN = 0x0 , LENGTH = 8260
>>> + RAM : org = 0x00002048, l = 0x1FFDFB8
>>> + UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
>>> + }
>>> +
>>> +REGION_ALIAS ("REGION_START", RAM);
>>> +REGION_ALIAS ("REGION_VECTOR", VECTOR_RAM);
>>> +REGION_ALIAS ("REGION_TEXT", RAM);
>>> +REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
>>> +REGION_ALIAS ("REGION_RODATA", RAM);
>>> +REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
>>> +REGION_ALIAS ("REGION_DATA", RAM);
>>> +REGION_ALIAS ("REGION_DATA_LOAD", RAM);
>>> +REGION_ALIAS ("REGION_FAST_DATA", RAM);
>>> +REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
>>> +REGION_ALIAS ("REGION_BSS", RAM);
>>> +REGION_ALIAS ("REGION_WORK", RAM);
>>> +REGION_ALIAS ("REGION_STACK", RAM);
>>> +
>>> +bsp_section_vector_begin = 0;
>>> +bsp_section_stack_begin = 0x1FFDFB8;
>>> +
>>> +INCLUDE linkcmds.base
>>> diff --git a/c/src/lib/libbsp/or1k/generic_or1k/timer/timer.c
>>> b/c/src/lib/libbsp/or1k/generic_or1k/timer/timer.c
>>> new file mode 100644
>>> index 0000000..872f1af
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/or1k/generic_or1k/timer/timer.c
>>> @@ -0,0 +1,64 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup generic_or1k
>>> + *
>>> + * @brief Benchmark timer support.
>>> + */
>>> +
>>> +/*
>>> + * Copyright (c) 2014-2015 by Hesham ALMatary
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.org/license/LICENSE
>>> + */
>>> +
>>> +#include<rtems.h>
>>> +#include<rtems/btimer.h>
>>> +#include<bsp/generic_or1k.h>
>>> +#include<rtems/score/or1k-utility.h>
>>> +
>>> +#define OR1K_NANOSECONDS_PER_CLK_CYCLE 10
>>> +
>>> +static bool benchmark_timer_find_average_overhead = false;
>>> +static uint64_t benchmark_timer_base;
>>> +
>>> +void benchmark_timer_initialize(void)
>>> +{
>>> + benchmark_timer_base = _OR1K_mfspr(CPU_OR1K_SPR_TTCR);
>>> +}
>>> +
>>> +#define AVG_OVERHEAD 0
>>> +#define LEAST_VALID 1
>>> +
>>> +benchmark_timer_t benchmark_timer_read( void )
>>> +{
>>> + uint64_t clicks;
>>> + uint64_t total;
>>> + uint64_t delta;
>>> + /*
>>> + * Read the timer and see how many clicks (clock cycles)
>>> + * has passed since timer initialization.
>>> + */
>>> + clicks = _OR1K_mfspr(CPU_OR1K_SPR_TTCR);
>>> +
>>> + delta = clicks - benchmark_timer_base;
>>> +
>>> + /* total in nanoseconds */
>>> + total = OR1K_NANOSECONDS_PER_CLK_CYCLE * (delta);
>>> +
>>> + if ( benchmark_timer_find_average_overhead == true )
>>> + return total; /* in nanoseconds microsecond units */
>>> + else {
>>> + if ( total< LEAST_VALID )
>>> + return 0; /* below timer resolution */
>>> +
>>> + return (total - AVG_OVERHEAD);
>>> + }
>>> +}
>>> +
>>> +void benchmark_timer_disable_subtracting_average_overhead(bool
>>> find_flag)
>>> +{
>>> + benchmark_timer_find_average_overhead = find_flag;
>>> +}
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/Makefile.am
>>> b/c/src/lib/libbsp/or1k/or1ksim/Makefile.am
>>> deleted file mode 100644
>>> index 7a871b5..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/Makefile.am
>>> +++ /dev/null
>>> @@ -1,110 +0,0 @@
>>> -#
>>> -# @file
>>> -#
>>> -# @brief Makefile of LibBSP for the or1ksim BSP.
>>> -#
>>> -
>>> -ACLOCAL_AMFLAGS = -I ../../../../aclocal
>>> -
>>> -include $(top_srcdir)/../../../../automake/compile.am
>>> -
>>> -include_bspdir = $(includedir)/bsp
>>> -include_libcpudir = $(includedir)/libcpu
>>> -
>>> -dist_project_lib_DATA = bsp_specs
>>> -
>>>
>>> -###############################################################################
>>> -# Header
>>> #
>>>
>>> -###############################################################################
>>> -
>>> -include_bsp_HEADERS =
>>> -include_HEADERS = include/bsp.h
>>> -include_HEADERS += ../../shared/include/tm27.h
>>> -
>>> -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
>>> -include_bsp_HEADERS += ../shared/include/linker-symbols.h
>>> -include_bsp_HEADERS += ../../../libbsp/shared/include/mm.h
>>> -include_bsp_HEADERS += ../../shared/include/utility.h
>>> -include_bsp_HEADERS += ../../shared/include/irq-generic.h
>>> -include_bsp_HEADERS += ../../shared/include/irq-info.h
>>> -include_bsp_HEADERS += ../../shared/include/stackalloc.h
>>> -include_bsp_HEADERS += ../../shared/include/uart-output-char.h
>>> -include_bsp_HEADERS += ../shared/include/cache_.h
>>> -include_bsp_HEADERS += include/irq.h
>>> -include_bsp_HEADERS += include/uart.h
>>> -include_bsp_HEADERS += include/or1ksim.h
>>> -
>>> -nodist_include_HEADERS = ../../shared/include/coverhd.h \
>>> - include/bspopts.h
>>> -
>>>
>>> -###############################################################################
>>> -# Data
>>> #
>>>
>>> -###############################################################################
>>> -
>>> -noinst_LIBRARIES = libbspstart.a
>>> -
>>> -libbspstart_a_SOURCES = start/start.S
>>> -
>>> -project_lib_DATA = start.$(OBJEXT)
>>> -
>>> -project_lib_DATA += startup/linkcmds
>>> -project_lib_DATA += ../shared/startup/linkcmds.base
>>> -
>>>
>>> -###############################################################################
>>> -# LibBSP
>>> #
>>>
>>> -###############################################################################
>>> -
>>> -noinst_LIBRARIES += libbsp.a
>>> -
>>> -libbsp_a_SOURCES =
>>> -libbsp_a_CPPFLAGS =
>>> -libbsp_a_LIBADD =
>>> -
>>> -# Startup
>>> -libbsp_a_SOURCES += ../../shared/bspreset.c
>>> -libbsp_a_SOURCES += startup/bspstart.c
>>> -
>>> -# Shared
>>> -libbsp_a_SOURCES += ../../shared/bootcard.c
>>> -libbsp_a_SOURCES += ../../shared/bspclean.c
>>> -libbsp_a_SOURCES += ../../shared/bspgetworkarea.c
>>> -libbsp_a_SOURCES += ../../shared/bsplibc.c
>>> -libbsp_a_SOURCES += ../../shared/bsppost.c
>>> -libbsp_a_SOURCES += ../../shared/bsppredriverhook.c
>>> -libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
>>> -libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c
>>> -libbsp_a_SOURCES += ../../shared/sbrk.c
>>> -libbsp_a_SOURCES += ../../shared/src/stackalloc.c
>>> -
>>> -# Console
>>> -libbsp_a_SOURCES += ../../shared/console.c
>>> -libbsp_a_SOURCES += ../../shared/console_control.c
>>> -libbsp_a_SOURCES += ../../shared/console_read.c
>>> -libbsp_a_SOURCES += ../../shared/console_select.c
>>> -libbsp_a_SOURCES += ../../shared/console_write.c
>>> -libbsp_a_SOURCES += console/console-config.c
>>> -libbsp_a_SOURCES += console/uart.c
>>> -
>>> -# Timer
>>> -libbsp_a_SOURCES += timer/timer.c
>>> -
>>> -# clock
>>> -libbsp_a_SOURCES += clock/clockdrv.c ../../../shared/clockdrv_shell.h
>>> -
>>> -# IRQ
>>> -libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
>>> -libbsp_a_SOURCES += ../../shared/src/irq-generic.c
>>> -libbsp_a_SOURCES += ../../shared/src/irq-info.c
>>> -libbsp_a_SOURCES += irq/irq.c
>>> -
>>> -# Cache
>>> -libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
>>> -
>>>
>>> -###############################################################################
>>> -# Special Rules
>>> #
>>>
>>> -###############################################################################
>>> -
>>> -DISTCLEANFILES = include/bspopts.h
>>> -
>>> -include $(srcdir)/preinstall.am
>>> -include $(top_srcdir)/../../../../automake/local.am
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/README
>>> b/c/src/lib/libbsp/or1k/or1ksim/README
>>> deleted file mode 100644
>>> index 22ecbfa..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/README
>>> +++ /dev/null
>>> @@ -1,37 +0,0 @@
>>> -This BSP should run on or1ksim: the main simulator for or1k
>>> architecture.
>>> -or1ksim should be used for testing purposes. It also runs on QEMU.
>>> -
>>> -$ git clone git at github.com:openrisc/or1ksim.git
>>> -$ cd or1ksim
>>> -$ mkdir builddir_or1ksim
>>> -$ cd builddir_or1ksim
>>> -$ ../configure --target=or1k-elf --prefix=/opt/or1ksim
>>> -$ make all
>>> -$ make install
>>> -$ export PATH=/opt/or1ksim/bin:$PATH
>>> -
>>> -Configuration file "sim.cfg" should be provided for complex board
>>> -configurations at the current directory (which you run or1ksim from) or
>>> at
>>> -~/.or1k/
>>> -
>>> -The current sim.cfg file that configures or1ksim emulator to
>>> RTEMS/or1ksim BSP
>>> -is at the same directory as this README. You can also use or1ksim script
>>> from
>>> -rtems-tools/sim-scripts.
>>> -
>>> -From command line type:
>>> -
>>> -$ sim -f sim.cfg $PATH_TO_RTEMS_EXE (old or1ksim releases)
>>> -
>>> -or (if you use a stable/gitgub or1ksim release)
>>> -
>>> -$ or1k-elf-sim -f sim.cfg $PATH_TO_RTEMS_EXE
>>> -
>>> -From QEMU:
>>> -
>>> -$ qemu-system-or32 -serial mon:stdio -serial /dev/null -net none
>>> -nographic \
>>> - -m 128M -kernel $PATH_TO_RTEMS_EXE
>>> -
>>> -from sim-scripts:
>>> -
>>> -$ or1ksim $PATH_TO_RTEMS_EXE
>>> -$ qemu-or1k $PATH_TO_RTEMS_EXE
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/bsp_specs
>>> b/c/src/lib/libbsp/or1k/or1ksim/bsp_specs
>>> deleted file mode 100644
>>> index 0fcd2dc..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/bsp_specs
>>> +++ /dev/null
>>> @@ -1,11 +0,0 @@
>>> -%rename endfile old_endfile
>>> -%rename startfile old_startfile
>>> -%rename link old_link
>>> -
>>> -*startfile:
>>> -%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \
>>> -%{!qrtems_debug: start.o%s} \
>>> -%{qrtems_debug: start_g.o%s}}}
>>> -
>>> -*link:
>>> -%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e _start}
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c
>>> b/c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c
>>> deleted file mode 100644
>>> index 4169a11..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c
>>> +++ /dev/null
>>> @@ -1,149 +0,0 @@
>>> -/**
>>> - * @file
>>> - *
>>> - * @ingroup bsp_clock
>>> - *
>>> - * @brief or1ksim clock support.
>>> - */
>>> -
>>> -/*
>>> - * or1ksim Clock driver
>>> - *
>>> - * COPYRIGHT (c) 2014 Hesham ALMatary<heshamelmatary at gmail.com>
>>> - *
>>> - * The license and distribution terms for this file may be
>>> - * found in the file LICENSE in this distribution or at
>>> - * http://www.rtems.org/license/LICENSE
>>> - */
>>> -
>>> -#include<rtems.h>
>>> -#include<bsp.h>
>>> -#include<bsp/irq.h>
>>> -#include<bsp/or1ksim.h>
>>> -#include<rtems/score/cpu.h>
>>> -#include<rtems/score/or1k-utility.h>
>>> -
>>> -/* The number of clock cycles before generating a tick timer interrupt.
>>> */
>>> -#define TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT 0x09ED9
>>> -#define OR1KSIM_CLOCK_CYCLE_TIME_NANOSECONDS 10
>>> -
>>> -/* CPU counter */
>>> -static CPU_Counter_ticks cpu_counter_ticks;
>>> -
>>> -/* This prototype is added here to Avoid warnings */
>>> -void Clock_isr(void *arg);
>>> -
>>> -static void or1ksim_clock_at_tick(void)
>>> -{
>>> - uint32_t TTMR;
>>> -
>>> - /* For TTMR register,
>>> - * The least significant 28 bits are the number of clock cycles
>>> - * before generating a tick timer interrupt. While the most
>>> - * significant 4 bits are used for mode configuration, tick timer
>>> - * interrupt enable and pending interrupts status.
>>> - */
>>> - TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
>>> - (TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT&
>>> CPU_OR1K_SPR_TTMR_TP_MASK)
>>> - )& ~(CPU_OR1K_SPR_TTMR_IP);
>>> -
>>> - _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
>>> - _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
>>> -
>>> - cpu_counter_ticks += TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
>>> -}
>>> -
>>> -static void or1ksim_clock_handler_install(proc_ptr new_isr, proc_ptr
>>> old_isr)
>>> -{
>>> - rtems_status_code sc = RTEMS_SUCCESSFUL;
>>> - old_isr = NULL;
>>> - _CPU_ISR_install_vector(OR1K_EXCEPTION_TICK_TIMER,
>>> - new_isr,
>>> - old_isr);
>>> -
>>> - if (sc != RTEMS_SUCCESSFUL) {
>>> - rtems_fatal_error_occurred(0xdeadbeef);
>>> - }
>>> -}
>>> -
>>> -static void or1ksim_clock_initialize(void)
>>> -{
>>> - uint32_t TTMR;
>>> -
>>> - /* For TTMR register,
>>> - * The least significant 28 bits are the number of clock cycles
>>> - * before generating a tick timer interrupt. While the most
>>> - * significant 4 bits are used for mode configuration, tick timer
>>> - * interrupt enable and pending interrupts status.
>>> - */
>>> -
>>> - /* FIXME: Long interval should pass since initializing the tick timer
>>> - * registers fires exceptions dispite interrupts has not been enabled
>>> yet.
>>> - */
>>> - TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
>>> - (0xFFED9& CPU_OR1K_SPR_TTMR_TP_MASK)
>>> - )& ~(CPU_OR1K_SPR_TTMR_IP);
>>> -
>>> - _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
>>> - _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
>>> -
>>> - /* Initialize CPU Counter */
>>> - cpu_counter_ticks = 0;
>>> -}
>>> -
>>> - static void or1ksim_clock_cleanup(void)
>>> -{
>>> - uint32_t sr;
>>> -
>>> - sr = _OR1K_mfspr(CPU_OR1K_SPR_SR);
>>> -
>>> - /* Disable tick timer exceptions */
>>> - _OR1K_mtspr(CPU_OR1K_SPR_SR, (sr& ~CPU_OR1K_SPR_SR_IEE)
>>> -& ~CPU_OR1K_SPR_SR_TEE);
>>> -
>>> - /* Invalidate tick timer config registers */
>>> - _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
>>> - _OR1K_mtspr(CPU_OR1K_SPR_TTMR, 0);
>>> -}
>>> -
>>> -/*
>>> - * Return the nanoseconds since last tick
>>> - */
>>> -static uint32_t or1ksim_clock_nanoseconds_since_last_tick(void)
>>> -{
>>> - return
>>> - TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT *
>>> OR1KSIM_CLOCK_CYCLE_TIME_NANOSECONDS;
>>> -}
>>> -
>>> -CPU_Counter_ticks _CPU_Counter_read(void)
>>> -{
>>> - uint32_t ticks_since_last_timer_interrupt;
>>> -
>>> - ticks_since_last_timer_interrupt = _OR1K_mfspr(CPU_OR1K_SPR_TTCR);
>>> -
>>> - return cpu_counter_ticks + ticks_since_last_timer_interrupt;
>>> -}
>>> -
>>> -CPU_Counter_ticks _CPU_Counter_difference(
>>> - CPU_Counter_ticks second,
>>> - CPU_Counter_ticks first
>>> -)
>>> -{
>>> - return second - first;
>>> -}
>>> -#define Clock_driver_support_at_tick() or1ksim_clock_at_tick()
>>> -
>>> -#define Clock_driver_support_initialize_hardware()
>>> or1ksim_clock_initialize()
>>> -
>>> -#define Clock_driver_support_install_isr(isr, old_isr) \
>>> - do { \
>>> - old_isr = NULL; \
>>> - or1ksim_clock_handler_install(isr, old_isr); \
>>> - } while (0)
>>> -
>>> -#define Clock_driver_support_shutdown_hardware() or1ksim_clock_cleanup()
>>> -
>>> -#define Clock_driver_nanoseconds_since_last_tick \
>>> - or1ksim_clock_nanoseconds_since_last_tick
>>> -
>>> -#include "../../../shared/clockdrv_shell.h"
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/configure.ac
>>> b/c/src/lib/libbsp/or1k/or1ksim/configure.ac
>>> deleted file mode 100644
>>> index 70f76f1..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/configure.ac
>>> +++ /dev/null
>>> @@ -1,30 +0,0 @@
>>> -#
>>> -# @file
>>> -#
>>> -# @brief Configure script of LibBSP for or1ksim BSP.
>>> -#
>>> -
>>> -AC_PREREQ(2.69)
>>>
>>> -AC_INIT([rtems-c-src-lib-libbsp-or1k-or1ksim],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
>>> -AC_CONFIG_SRCDIR([bsp_specs])
>>> -RTEMS_TOP(../../../../../..)
>>> -
>>> -RTEMS_CANONICAL_TARGET_CPU
>>> -AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
>>> -RTEMS_BSP_CONFIGURE
>>> -
>>> -RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
>>> -RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for
>>> BSP start])
>>> -
>>> -RTEMS_BSPOPTS_SET([BSP_OR1K_OR1KSIM_PERIPHCLK],[*],[50000000U])
>>> -RTEMS_BSPOPTS_HELP([BSP_OR1K_OR1KSIM_PERIPHCLK],[or1ksim PERIPHCLK clock
>>> frequency in Hz])
>>> -
>>> -RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
>>> -RTEMS_CANONICALIZE_TOOLS
>>> -RTEMS_PROG_CCAS
>>> -
>>> -RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
>>> -RTEMS_BSP_LINKCMDS
>>> -
>>> -AC_CONFIG_FILES([Makefile])
>>> -AC_OUTPUT
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/console/console-config.c
>>> b/c/src/lib/libbsp/or1k/or1ksim/console/console-config.c
>>> deleted file mode 100644
>>> index 9853f20..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/console/console-config.c
>>> +++ /dev/null
>>> @@ -1,58 +0,0 @@
>>> -/**
>>> - * @file
>>> - *
>>> - * @ingroup or1ksim_uart
>>> - *
>>> - * @brief Console Configuration.
>>> - */
>>> -
>>> -/*
>>> - * Copyright (c) 2014 Hesham ALMatary
>>> - *
>>> - * The license and distribution terms for this file may be
>>> - * found in the file LICENSE in this distribution or at
>>> - * http://www.rtems.org/license/LICENSE
>>> - */
>>> -
>>> -#include<rtems/bspIo.h>
>>> -
>>> -#include<libchip/serial.h>
>>> -
>>> -#include<bspopts.h>
>>> -#include<bsp/uart.h>
>>> -#include<bsp/or1ksim.h>
>>> -
>>> -console_tbl Console_Configuration_Ports [] = {
>>> - {
>>> - .sDeviceName = "/dev/ttyS0",
>>> - .deviceType = SERIAL_CUSTOM,
>>> - .pDeviceFns =&or1ksim_uart_fns,
>>> - .deviceProbe = NULL,
>>> - .pDeviceFlow = NULL,
>>> - .ulCtrlPort1 = OR1KSIM_BSP_UART_BASE,
>>> - .ulCtrlPort2 = 0,
>>> - .ulClock = OR1KSIM_UART_DEFAULT_BAUD,
>>> - .ulIntVector = OR1KSIM_BSP_UART_IRQ
>>> - }
>>> -};
>>> -
>>> -#define PORT_COUNT \
>>> - (sizeof(Console_Configuration_Ports) \
>>> - / sizeof(Console_Configuration_Ports [0]))
>>> -
>>> -unsigned long Console_Configuration_Count = PORT_COUNT;
>>> -
>>> -static void output_char(char c)
>>> -{
>>> - const console_fns *con =
>>> - Console_Configuration_Ports [Console_Port_Minor].pDeviceFns;
>>> -
>>> - if (c == '\n') {
>>> - con->deviceWritePolled((int) Console_Port_Minor, '\r');
>>> - }
>>> - con->deviceWritePolled((int) Console_Port_Minor, c);
>>> -}
>>> -
>>> -BSP_output_char_function_type BSP_output_char = output_char;
>>> -
>>> -BSP_polling_getchar_function_type BSP_poll_char = NULL;
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
>>> b/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
>>> deleted file mode 100644
>>> index 87b1aea..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
>>> +++ /dev/null
>>> @@ -1,152 +0,0 @@
>>> -/**
>>> - * @file
>>> - *
>>> - * @ingroup or1ksim_uart
>>> - *
>>> - * @brief UART support.
>>> - */
>>> -
>>> -/*
>>> - * COPYRIGHT (c) 2014 Hesham ALMatary<heshamelmatary at gmail.com>
>>> - *
>>> - * The license and distribution terms for this file may be
>>> - * found in the file LICENSE in this distribution or at
>>> - * http://www.rtems.org/license/LICENSE
>>> - */
>>> -
>>> -#include<libchip/sersupp.h>
>>> -#include<bsp/or1ksim.h>
>>> -#include<bsp.h>
>>> -#include<bsp/irq.h>
>>> -#include<bsp/uart.h>
>>> -#include<rtems/score/isr.h>
>>> -
>>> -static void uart_initialize(int minor);
>>> -static int uart_first_open(int major, int minor, void *arg);
>>> -static int uart_last_close(int major, int minor, void *arg);
>>> -static int uart_read_polled(int minor);
>>> -static ssize_t uart_write(int minor, const char *buf, size_t len);
>>> -static void uart_write_polled(int minor, char c);
>>> -static int uart_set_attributes(int minor, const struct termios *t);
>>> -
>>> -#if 0
>>> -/*
>>> - * These will be useful when the driver supports interrupt driven IO.
>>> - */
>>> -static rtems_vector_number uart_get_irq_number(const console_tbl *ct)
>>> -{
>>> - return ct->ulIntVector;
>>> -}
>>> -
>>> -static uint32_t uart_get_baud(const console_tbl *ct)
>>> -{
>>> - return ct->ulClock;
>>> -}
>>> -#endif
>>> -
>>> -static void uart_set_baud(int baud)
>>> -{
>>> - uint16_t divisor = (OR1KSIM_BSP_CLOCK_FREQ) / (16 * baud);
>>> - OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_CTRL) =
>>> - OR1KSIM_BSP_UART_REG_LINE_CTRL_DLAB;
>>> -
>>> - OR1KSIM_REG(OR1KSIM_BSP_UART_REG_DEV_LATCH_LOW) = divisor& 0xff;
>>> -
>>> - OR1KSIM_REG(OR1KSIM_BSP_UART_REG_DEV_LATCH_HIGH) =
>>> - (divisor>> 8);
>>> -}
>>> -
>>> -static void uart_initialize(int minor)
>>> -{
>>> - /* Set baud rate */
>>> - uart_set_baud(OR1KSIM_UART_DEFAULT_BAUD);
>>> -
>>> - /* Set data pattern configuration */
>>> - OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_CTRL) =
>>> - OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN8;
>>> -
>>> - /* Reset receiver and transmitter */
>>> - OR1KSIM_REG(OR1KSIM_BSP_UART_REG_FIFO_CTRL) =
>>> - OR1KSIM_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO |
>>> - OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR |
>>> - OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_14;
>>> -
>>> - /* Disable all interrupts */
>>> - OR1KSIM_REG(OR1KSIM_BSP_UART_REG_INT_ENABLE) = 0x00;
>>> -
>>> -}
>>> -
>>> -static int uart_first_open(int major, int minor, void *arg)
>>> -{
>>> - rtems_libio_open_close_args_t *oc = (rtems_libio_open_close_args_t *)
>>> arg;
>>> - struct rtems_termios_tty *tty = (struct rtems_termios_tty *)
>>> oc->iop->data1;
>>> - const console_tbl *ct = Console_Port_Tbl [minor];
>>> - console_data *cd =&Console_Port_Data [minor];
>>> -
>>> - cd->termios_data = tty;
>>> - rtems_termios_set_initial_baud(tty, ct->ulClock);
>>> -
>>> - return 0;
>>> -}
>>> -
>>> -static int uart_last_close(int major, int minor, void *arg)
>>> -{
>>> - return 0;
>>> -}
>>> -
>>> -static int uart_read_polled(int minor)
>>> -{
>>> - unsigned char lsr;
>>> -
>>> - /* Get a character when avaiable */
>>> - do {
>>> - lsr = OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_STATUS);
>>> - } while ((lsr& OR1KSIM_BSP_UART_REG_LINE_STATUS_DR)
>>> - != OR1KSIM_BSP_UART_REG_LINE_STATUS_DR);
>>> -
>>> - return OR1KSIM_REG(OR1KSIM_BSP_UART_REG_RX);
>>> -}
>>> -
>>> -static void uart_write_polled(int minor, char c)
>>> -{
>>> - unsigned char lsr;
>>> -
>>> - /* Wait until there is no pending data in the transmitter FIFO (empty)
>>> */
>>> - do {
>>> - lsr = OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_STATUS);
>>> - } while (!(lsr& OR1KSIM_BSP_UART_REG_LINE_STATUS_THRE));
>>> -
>>> - OR1KSIM_REG(OR1KSIM_BSP_UART_REG_TX) = c;
>>> -}
>>> -
>>> -static ssize_t uart_write(
>>> - int minor,
>>> - const char *s,
>>> - size_t n
>>> -)
>>> -{
>>> - ssize_t i = 0;
>>> -
>>> - for (i = 0; i< n; ++i){
>>> - uart_write_polled(minor, s [i]);
>>> - }
>>> -
>>> - return n;
>>> -}
>>> -
>>> -static int uart_set_attributes(int minor, const struct termios *term)
>>> -{
>>> - return -1;
>>> -}
>>> -
>>> -const console_fns or1ksim_uart_fns = {
>>> - .deviceProbe = libchip_serial_default_probe,
>>> - .deviceFirstOpen = uart_first_open,
>>> - .deviceLastClose = uart_last_close,
>>> - .deviceRead = uart_read_polled,
>>> - .deviceWrite = uart_write,
>>> - .deviceInitialize = uart_initialize,
>>> - .deviceWritePolled = uart_write_polled,
>>> - .deviceSetAttributes = uart_set_attributes,
>>> - .deviceOutputUsesInterrupts = false
>>> -};
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/include/bsp.h
>>> b/c/src/lib/libbsp/or1k/or1ksim/include/bsp.h
>>> deleted file mode 100644
>>> index 502e4d9..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/include/bsp.h
>>> +++ /dev/null
>>> @@ -1,47 +0,0 @@
>>> -/**
>>> - * @file
>>> - *
>>> - * @ingroup or1k_or1ksim
>>> - *
>>> - * @brief Global BSP definitions.
>>> - */
>>> -
>>> -/*
>>> - * COPYRIGHT (c) 2014 Hesham ALMatary<heshamelmatary at gmail.com>
>>> - *
>>> - * The license and distribution terms for this file may be
>>> - * found in the file LICENSE in this distribution or at
>>> - * http://www.rtems.org/license/LICENSE
>>> - */
>>> -
>>> -#ifndef LIBBSP_OR1K_OR1KSIM_H
>>> -#define LIBBSP_OR1K_OR1KSIM_H
>>> -
>>> -#include<bspopts.h>
>>> -#include<rtems.h>
>>> -#include<rtems/console.h>
>>> -#include<rtems/clockdrv.h>
>>> -#include<bsp/or1ksim.h>
>>> -
>>> -#include<bsp/default-initial-extension.h>
>>> -
>>> -#ifdef __cplusplus
>>> -extern "C" {
>>> -#endif /* __cplusplus */
>>> -
>>> -#define BSP_FEATURE_IRQ_EXTENSION
>>> -
>>> -#ifdef __cplusplus
>>> -}
>>> -#endif /* __cplusplus */
>>> -
>>> -#endif /* LIBBSP_OR1K_OR1KSIM_H */
>>> -
>>> -/**
>>> - * @defgroup or1k_or1ksim support
>>> - *
>>> - * @ingroup bsp_or1k
>>> - *
>>> - * @brief or1ksim support package
>>> - *
>>> - */
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/include/irq.h
>>> b/c/src/lib/libbsp/or1k/or1ksim/include/irq.h
>>> deleted file mode 100644
>>> index be669d8..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/include/irq.h
>>> +++ /dev/null
>>> @@ -1,45 +0,0 @@
>>> -/**
>>> - * @file
>>> - *
>>> - * @ingroup or1ksim_interrupt
>>> - *
>>> - * @brief Interrupt definitions.
>>> - */
>>> -
>>> -/**
>>> - * COPYRIGHT (c) 2014 Hesham ALMatary<heshamelmatary at gmail.com>
>>> - *
>>> - * The license and distribution terms for this file may be
>>> - * found in the file LICENSE in this distribution or at
>>> - * http://www.rtems.org/license/LICENSE
>>> - */
>>> -
>>> -#ifndef LIBBSP_OR1K_OR1KSIM_IRQ_H
>>> -#define LIBBSP_OR1K_OR1KSIM_IRQ_H
>>> -
>>> -#ifndef ASM
>>> -
>>> -#include<rtems.h>
>>> -#include<rtems/irq.h>
>>> -#include<rtems/irq-extension.h>
>>> -
>>> -#define BSP_INTERRUPT_VECTOR_MIN 0x100
>>> -#define BSP_INTERRUPT_VECTOR_MAX 0x1F00
>>> -
>>> -/* Interrupt Identification Register */
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID_MSI (0x00)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID_NO_INT (0x01)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID_THRI (0x02)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID_RDI (0x04)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID_ID (0x06)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID_RLSI (0x06)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID_TOI (0x0c)
>>> -
>>> -/* Interrupt Enable Register */
>>> -#define OR1KSIM_BSP_UART_REG_INT_ENABLE_RDI (0x01)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ENABLE_THRI (0x02)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ENABLE_RLSI (0x04)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ENABLE_MSI (0x08)
>>> -
>>> -#endif /* ASM */
>>> -#endif /* LIBBSP_OR1K_OR1KSIM_IRQ_H */
>>> diff --git a/c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h
>>> b/c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h
>>> deleted file mode 100644
>>> index e5354dd..0000000
>>> --- a/c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h
>>> +++ /dev/null
>>> @@ -1,118 +0,0 @@
>>> -/**
>>> - * @file
>>> - *
>>> - * @ingroup or1ksim_reg
>>> - *
>>> - * @brief Register definitions.
>>> - */
>>> -
>>> -/*
>>> - * COPYRIGHT (c) 2014 Hesham ALMatary<heshamelmatary at gmail.com>
>>> - *
>>> - * The license and distribution terms for this file may be
>>> - * found in the file LICENSE in this distribution or at
>>> - * http://www.rtems.org/license/LICENSE
>>> - */
>>> -
>>> -#ifndef LIBBSP_OR1K_OR1KSIM_H
>>> -#define LIBBSP_OR1K_OR1KSIM_H
>>> -
>>> -#include<stdint.h>
>>> -
>>> -/**
>>> - * @defgroup or1ksim_reg Register Definitions
>>> - *
>>> - * @ingroup or1k_or1ksim
>>> - *
>>> - * @brief Register Definitions
>>> - *
>>> - * @{
>>> - */
>>> -
>>> -/**
>>> - * @name Register Macros
>>> - *
>>> - * @{
>>> - */
>>> -
>>> - #define OR1KSIM_REG(x) (*((volatile unsigned char *) (x)))
>>> - #define OR1KSIM_BIT(n) (1<< (n))
>>> -
>>> -/** @} */
>>> -
>>> -/**
>>> - * @name Internal OR1K UART Registers
>>> - *
>>> - * @{
>>> - */
>>> -#define OR1KSIM_BSP_CLOCK_FREQ 50000000UL
>>> -#define OR1KSIM_BSP_UART_BASE 0x90000000
>>> -
>>> -#define OR1KSIM_BSP_UART_REG_TX (OR1KSIM_BSP_UART_BASE+0)
>>> -#define OR1KSIM_BSP_UART_REG_RX (OR1KSIM_BSP_UART_BASE+0)
>>> -#define OR1KSIM_BSP_UART_REG_DEV_LATCH_LOW (OR1KSIM_BSP_UART_BASE+0)
>>> -#define OR1KSIM_BSP_UART_REG_DEV_LATCH_HIGH (OR1KSIM_BSP_UART_BASE+1)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ENABLE (OR1KSIM_BSP_UART_BASE+1)
>>> -#define OR1KSIM_BSP_UART_REG_INT_ID (OR1KSIM_BSP_UART_BASE+2)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL (OR1KSIM_BSP_UART_BASE+2)
>>> -#define OR1KSIM_BSP_UART_REG_LINE_CTRL (OR1KSIM_BSP_UART_BASE+3)
>>> -#define OR1KSIM_BSP_UART_REG_MODEM_CTRL (OR1KSIM_BSP_UART_BASE+4)
>>> -#define OR1KSIM_BSP_UART_REG_LINE_STATUS (OR1KSIM_BSP_UART_BASE+5)
>>> -#define OR1KSIM_BSP_UART_REG_MODEM_STATUS (OR1KSIM_BSP_UART_BASE+6)
>>> -#define OR1KSIM_BSP_UART_REG_SCRATCH (OR1KSIM_BSP_UART_BASE+7)
>>> -
>>> -/* FIFO Control Register */
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_1 (0x00)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO (0x01)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR (0x02)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT (0x03)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_DMA_SELECT (0x08)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_4 (0x40)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_8 (0x80)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_14 (0xC0)
>>> -#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_MASK (0xC0)
>>> -
>>> -/* Line Control Register */
>>> -#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN5 (0x00)
>>> -#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN6 (0x01)
>>> -#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN7 (0x02)
>>> -#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN8 (0x03)
--
Hesham
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