BBB GPIO disable interrupt bug

Gedare Bloom gedare at rtems.org
Thu Dec 10 19:06:01 UTC 2015


This sounds like something else that was fixed about a month ago.. anyway,
can you open a ticket and then #close it with the commit message for this
change and submit it as a patch please?

On Thu, Dec 10, 2015 at 10:29 AM, Federico Garcia Cruz <
federico.garciacruz at tallertechnologies.com> wrote:

> Hi,
> I'm still working with the latest version of RTEMS in a BBB. I was testing
> gpio interrupts and I found that "rtems_gpio_bsp_disable_interrupt" is not
> working fine. When this function is called, disables not just the specific
> pin interrupt but all the pins interrupts. The problem is that this
> function uses mmio_set which does something like:
> AM335X_GPIO_IRQSTATUS_CLR_0 = AM335X_GPIO_IRQSTATUS | BIT(pin)
> so that it is clearing all the enalbed bank interrupts.
> I've changed mmio_set for mmio_write and it's working fine. Here's the
> patch:
>
> diff --git a/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
> b/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
> index bd26051..5990211 100644
> --- a/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
> +++ b/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
> @@ -360,7 +369,7 @@ rtems_status_code rtems_gpio_bsp_disable_interrupt(
>    rtems_gpio_interrupt interrupt
>  ) {
>    /* Clear IRQ generation for the specific pin */
> -  mmio_set(bbb_reg(bank, AM335X_GPIO_IRQSTATUS_CLR_0), BIT(pin));
> +  mmio_write(bbb_reg(bank, AM335X_GPIO_IRQSTATUS_CLR_0), BIT(pin));
>
>    switch ( interrupt ) {
>      case FALLING_EDGE:
>
> --
>
> <http://www.tallertechnologies.com>
>
>
> Federico Garcia Cruz
>
> Software Engineer
>
>
> San Lorenzo 47, 3rd Floor, Office 5
>
> Córdoba, Argentina
>
>
> Phone: +54 351 4217888 / +54 351 4218211
>
>
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>
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