RTEMS on TMS570

Pavel Pisa pisa at cmp.felk.cvut.cz
Fri Feb 20 13:38:39 UTC 2015


Hello Martin,

I have no feedback from you if the Flash remap disable has
solved your problems.

If that works for you I would prepare patch to make remap
conditional and not use it in the case when vectors
are on right place.

Best wishes,

             Pavel

On Friday 06 of February 2015 17:16:31 Pavel Pisa wrote:
> Hello Martin,
>
> as for the additional changes to the serial driver, I would wait
> for Premysl Houdek to check these and align it with his work.
> We need to consider if the whole descriptor should be read/write
> or if we provide separate structure/variable for read write field.
>
> As for the problem with running from Flash, if your code combined with
> HalCogen sits on the address 0 and starts with vector table
>  arm-rtems4.11-nm hello.exe lists
>
>   00000000 T bsp_start_vector_table_begin
>
> then there is no need for vector table remapping into RAM.
> Even if your application starts at some offset then IRQ
> vector can be bypassed thanks to the CPU and VIM IRQ
> bypassing, which we setup but keep off by default.
> On the other hand, all other vectors - undefined instruction catch,
> invalid memory access would not be handled correctly for any
> image which does not start at address 0. Because our intention is
> to test mainly from RAM for now, we have enabled memory
> range remapping by default and it seems to cause problems
> for Flash run.
>
> Give try to the next changes. It resolved problem with your example
> code when run from Flash with a drawback that other than IRQ exception
> are not handled correctly by RTEMS in this case.
>
> Best wishes,
>
>               Pavel
>
> diff --git a/c/src/lib/libbsp/arm/tms570/irq/irq.c
> b/c/src/lib/libbsp/arm/tms570/irq/irq.c index 2e6e3db..552e8b8 100644
> --- a/c/src/lib/libbsp/arm/tms570/irq/irq.c
> +++ b/c/src/lib/libbsp/arm/tms570/irq/irq.c
> @@ -200,7 +200,7 @@ rtems_status_code
> bsp_interrupt_facility_initialize(void) * Disable bypass of CPU level
> exception table for interrupt entry which * can be provided by VIM hardware
>     */
> -  sctlr &= ~(1 << 24);
> +  sctlr |= (1 << 24);
>    asm volatile ("mcr p15, 0, %0, c1, c0, 0\n": : "r" (sctlr));
>
>    return RTEMS_SUCCESSFUL;
> diff --git a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c
> b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c index 31ad1e7..ffeb086
> 100644
> --- a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c
> +++ b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c
> @@ -33,7 +33,7 @@ void bsp_start( void )
>    /* set the cpu mode to supervisor and big endian */
>    arm_cpu_mode = 0x213;
>
> -  tms570_pom_remap();
> +  //tms570_pom_remap();
>
>    /* Interrupts */
>    bsp_interrupt_initialize();



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