[PATCH] GSoC: Cache configurations Raspberry Pi 2 support

[Sebastian Huber]

On 24/07/15 21:55, Rohini Kulkarni wrote:
> Hi,
>
> I have attached the report containing outputs of arm-rtems4.11-size 
> and arm-rtems4.11-nm -S.
>
> From arm-rtems4.11-nm -S I don't see how memset() is accessing .text 
> section. The start and end values for both are not overlapping.

Maybe this patch helps:

diff --git a/c/src/lib/libbsp/arm/raspberrypi/startup/linkcmds 
b/c/src/lib/libbsp/arm/raspberrypi/startup/linkcmds
index f1ad11c..f3b6232 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/startup/linkcmds
+++ b/c/src/lib/libbsp/arm/raspberrypi/startup/linkcmds
@@ -62,7 +62,8 @@ REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
  bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size 
: 4096;
  bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size 
: 1024;

-bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? 
bsp_section_robarrier_align : 1M;
+bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? 
bsp_section_rwbarrier_align : 1M;
+
  bsp_translation_table_base = ORIGIN (RAM_MMU);

  INCLUDE linkcmds.armv4

-- 
Sebastian Huber, embedded brains GmbH

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