GSoC 2015: Raspberry Pi 2 Support

Gedare Bloom gedare at gwu.edu
Wed Jun 3 14:13:05 UTC 2015


On Tue, Jun 2, 2015 at 9:42 PM, Alan Cudmore <alan.cudmore at gmail.com> wrote:
> The caches are being enabled on the RPI 1 BSP. The same code is being
> executed by the RPI 2 BSP, but obviously it’s not sufficient for the cache
> setup.
> I have been reading through this long thread, and it is very informative:
> https://www.raspberrypi.org/forums/viewtopic.php?f=72&t=98904
>
> I am starting to understand the setup that is required to enable caches on
> the RPI 2. For example this message near the bottom of page 3 gives a good
> indication of the speedup available by configuring the MMU and caches
> correctly:
> Quote from above thread
> ------------------------------
> Enabling I/D caches and branch prediction, just like the julia demo uses, it
> takes ~12 seconds, or ~21 fps. It's just one core but also a much smaller
> loop than the julia demo has.
>
> Enabling the MMU and mapping memory inner/outer write-back, write allocate
> and the framebuffer inner write-through, no write allocate + outer
> write-back, write-allocate it takes ~8 seconds, of 32 fps.
>
> PS: 640x480x32 with MMU gets me ~256 fps. Must have a greater L2 cache
> effect.
> -------------------------
> End of quote
>
> The person who posted the above comment (mrvn) posted the code here:
> https://github.com/mrvn/test/blob/master/mmu.cc
>
Make sure not to copy the code from there though, as it is GPL3. You
may refer to it for some learning though.


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