[PATCH] Beagle BSP Improvements (GPIO driver)
Ketul Shah
ketulshah1993 at gmail.com
Tue Jun 23 14:53:01 UTC 2015
Sorry wrong attachment. Kindly review the recent one.
Thanks.
Best Regards,
Ketul
On 23 June 2015 at 20:20, Ketul Shah <ketulshah1993 at gmail.com> wrote:
> Hello all,
>
> Sorry as I am updating you related to my GPIO API after a huge delay.
>
> I have developed it and tested it on my BBB. I did some big changes in the
> API taking in the account comment(s)/suggestion(s) from my respective
> mentors.
>
> I am also looking the API developed by Andre working for Raspberry Pi. Now
> I think it is a good time to merge the gpio code as API is getting more
> stable and generalized.
>
> So now it is good time to take the best things from API and we can have
> common API for GPIO driver running on every embedded board.
>
> Your comment(s) are welcomed.
>
> Thanks.
>
> Best Regards,
> Ketul
>
> On 29 April 2015 at 06:39, Chris Johns <chrisj at rtems.org> wrote:
>
>> [ Just catching up ]
>>
>> On 26/04/2015 9:26 pm, Ben Gras wrote:
>> > All,
>> >
>> > I think the API as it is (for digital GPIO's) is pretty close to
>> > generic. I like my suggestion (gpio_* in my previous mail) better as
>> > more generic. (More configuration is hidden from the application.)
>> >
>> > Joel I just read your presentation.
>> >
>> > I have come up with a minimal GPIO API based on the above (so
>> > ultimately based on the RPI API) that just covers the GPIO digital out
>> > case but allows expansion (with more defines and functions).
>> >
>> > https://devel.rtems.org/wiki/TBR/User/BenGras
>> >
>> > Is this an idea? Then we can merge this code implementing a reasonably
>> > generic API without having to flesh out the whole thing.
>> >
>>
>> How do we define hardware specific details without bloating the API ?
>>
>> For example on a zynq project I am working on I needed a GPIO interface
>> and I decided to use a struct to define the pin and the API takes
>> references to it. For example to control the write enable pin on a flash
>> device I have:
>>
>> static const gpio_pin_def gpio_Flash_WD =
>> {
>> pin: 4,
>> output: true,
>> on: GPIO_FLASH_WD_EN,
>> outen: true,
>> volts: gpio_LVCMOS33,
>> pullup: true,
>> fast: false,
>> tristate: false
>> };
>>
>> and then I have:
>>
>> gpio_error ge = gpio_setup_pin(&gpio_Flash_WD);
>> if (ge != GPIO_NO_ERROR)
>> return FLASH_WRITE_LOCK_FAIL;
>>
>> ....
>>
>> gpio_output(gpio_Flash_WD.pin, GPIO_FLASH_WD_EN);
>>
>> ....
>>
>> I need to set the voltage on the pin on the Zynq but this is Zynq
>> specific.
>>
>> We need a way to let a user convey specific hardware details to the BSP
>> driver through the API plus we need a light weight API with minimal
>> internal translations. This approach also lets me define an array of
>> pins and a single set up call configures them.
>>
>> So you could have:
>>
>> typedef struct
>> {
>> int pin; /* The pin number. */
>> bool output; /* True for output, false for input. */
>> bool on; /* True default output is on */
>> bool outen; /* True for output enable on, false for off. */
>> bool pullup; /* True to enable the pull up. */
>> bool tristate; /* True to enable tri-state. */
>> void* platform; /* Opaque hardware specific set up details. */
>> } gpio_pin_def;
>>
>> where the 'platform' references a struct agreed between the BSP (or
>> device layer) and the user code. For the generic cases this is not
>> needed and NULL. It also allows layering where a device set up phase of
>> user code sets the voltages and the generic code can play with the pin
>> at a generic level, eg direction etc.
>>
>> What locking is being considered in this API ?
>>
>> Chris
>>
>
>
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diff --git a/c/src/lib/libbsp/arm/beagle/Makefile.am b/c/src/lib/libbsp/arm/beagle/Makefile.am
index abef8ba..6b876dd 100644
--- a/c/src/lib/libbsp/arm/beagle/Makefile.am
+++ b/c/src/lib/libbsp/arm/beagle/Makefile.am
@@ -39,6 +39,7 @@ include_bsp_HEADERS += ../shared/include/arm-release-id.h
include_bsp_HEADERS += ../shared/include/start.h
include_bsp_HEADERS += include/irq.h
include_bsp_HEADERS += include/i2c.h
+include_bsp_HEADERS += include/beagleboneblack.h
include_libcpu_HEADERS =
include_libcpu_HEADERS += ../../../libcpu/arm/shared/include/arm-cp15.h
@@ -111,6 +112,9 @@ libbsp_a_SOURCES += ../../shared/console.c \
../../shared/console_write.c \
../../shared/console_control.c
+# GPIO
+libbsp_a_SOURCES += gpio/gpio.c
+
# I2C
libbsp_a_SOURCES += misc/i2c.c
diff --git a/c/src/lib/libbsp/arm/beagle/gpio/gpio.c b/c/src/lib/libbsp/arm/beagle/gpio/gpio.c
new file mode 100644
index 0000000..7ffb17b
--- /dev/null
+++ b/c/src/lib/libbsp/arm/beagle/gpio/gpio.c
@@ -0,0 +1,198 @@
+/**
+ * @file
+ *
+ * @ingroup arm_beagle
+ *
+ * @brief Global BSP definitions.
+ */
+
+/**
+ * Copyright (c) 2015 Ketul Shah <ketulshah1993 at gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <libcpu/am335x.h>
+#include <rtems.h>
+#include <rtems/gpio.h>
+#include <bsp/irq.h>
+#include <bsp/beagleboneblack.h>
+#include <bsp.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <assert.h>
+
+/**
+ * @brief GPIO API mutex atributes.
+ */
+#define MUTEX_ATRIBUTES \
+ ( RTEMS_LOCAL \
+ | RTEMS_PRIORITY \
+ | RTEMS_BINARY_SEMAPHORE \
+ | RTEMS_INHERIT_PRIORITY \
+ | RTEMS_NO_PRIORITY_CEILING \
+ )
+
+#define OBTAIN_LOCK(s) assert( rtems_semaphore_obtain(s, \
+ RTEMS_WAIT, \
+ RTEMS_NO_TIMEOUT \
+ ) == RTEMS_SUCCESSFUL )
+
+#define RELEASE_LOCK(s) assert( rtems_semaphore_release(s) == RTEMS_SUCCESSFUL )
+
+/* GPIO bank pin number as per TRM of AM335X */
+static unsigned int gpio_bank_pin[GPIO_PIN_COUNT];
+/* GPIO bank determines register of AM335X */
+static unsigned int gpio_bank[GPIO_PIN_COUNT];
+/* Pin states for all GPIO pins*/
+static unsigned int gpio_pin_state[GPIO_PIN_COUNT];
+/* Variable for gpio initialization */
+static bool is_initialized = false;
+/* Total number of gpio banks */
+static int gpio_bank_count = GPIO_PIN_COUNT / GPIO_PINS_PER_BANK;
+/* Semaphore for avoiding race condition */
+static rtems_id bank_lock;
+
+static const uint32_t gpio_bank_addrs[] =
+ { AM335X_GPIO0, AM335X_GPIO1, AM335X_GPIO2, AM335X_GPIO3 };
+
+static uint32_t inline get_pin_mask(unsigned int pin_number)
+{
+ return (1UL << gpio_bank_pin[pin_number]);
+}
+
+static void inline reg_update_set(unsigned int pin_number,uint32_t reg)
+{
+ uint32_t gpioreg=gpio_bank[pin_number]+reg;
+ uint32_t gpioreg_val=mmio_read(gpioreg);
+ gpioreg_val |= get_pin_mask(pin_number);
+ mmio_write(gpioreg, gpioreg_val);
+}
+
+static void inline reg_update_unset(unsigned int pin_number,uint32_t reg)
+{
+ uint32_t gpioreg=gpio_bank[pin_number]+reg;
+ uint32_t gpioreg_val=mmio_read(gpioreg);
+ gpioreg_val &= ~get_pin_mask(pin_number);
+ mmio_write(gpioreg, gpioreg_val);
+}
+
+/**
+ * @brief Initializes the GPIO API.
+ * Allocates space to gpio_pin_state and sets pin state as UNCONFIGURED.
+ * Creates Semaphore for avoiding any race condition.
+ * If the API has already been initialized silently exits.
+ */
+void rtems_gpio_initialize(void)
+{
+ int i;
+ rtems_status_code status;
+ if ( is_initialized )
+ return;
+
+ is_initialized = true;
+ for ( i = 0; i < GPIO_PIN_COUNT; ++i ) {
+ gpio_pin_state[i] = GPIO_PIN_STATE_UNCONFIGURED;
+ }
+ /* Create GPIO bank Semaphores */
+ status = rtems_semaphore_create(
+ rtems_build_name('G', 'S', 'E', ' '),
+ 1,
+ MUTEX_ATRIBUTES,
+ 0,
+ &bank_lock
+ );
+ printf("%s %d\n",status,status );
+ assert (status == RTEMS_SUCCESSFUL);
+}
+
+/**
+ * @brief Configures a GPIO pin to perform a digital output.
+ *
+ * @retval GPIO_SUCCESSFUL Pin was configured successfully as output.
+ * @retval GPIO_UNKNOWN_PIN Pin is invalid or unknown.
+ * @retval GPIO_MISCONFIGURED_PIN Pin is already configured for another state.
+ */
+int rtems_gpio_configure_pin_digital_out(gpio_pin_handle *gpio_pin_assign,unsigned int pin_number)
+{
+ if (pin_number > 128 || pin_number < 0)
+ return GPIO_UNKNOWN_PIN;
+ if (gpio_pin_state[gpio_pin_assign->pin_number] != GPIO_PIN_STATE_UNCONFIGURED &&
+ gpio_pin_state[gpio_pin_assign->pin_number] != GPIO_PIN_STATE_DIGITAL_OUT)
+ return GPIO_MISCONFIGURED_PIN;
+
+ gpio_pin_state[gpio_pin_assign->pin_number] = GPIO_PIN_STATE_DIGITAL_OUT;
+ gpio_pin_assign->pin_number = pin_number;
+ gpio_bank_pin[pin_number] = pin_number % GPIO_PINS_PER_BANK;
+ gpio_bank[pin_number] = gpio_bank_addrs[pin_number/GPIO_PINS_PER_BANK];
+
+ OBTAIN_LOCK(bank_lock);
+
+ reg_update_unset(gpio_pin_assign->pin_number,AM335X_GPIO_OE);
+
+ RELEASE_LOCK(bank_lock);
+
+ return GPIO_SUCCESSFUL;
+}
+
+/**
+ * @brief Gives an output GPIO pin the logical value of 1.
+ * @retval GPIO_SUCCESSFUL Pin was set successfully.
+ * @retval GPIO_MISCONFIGURED_PIN The received pin is not configured
+ * for digital output.
+ */
+int rtems_gpio_digital_set(gpio_pin_handle *gpio_pin_assign)
+{
+ if (gpio_pin_state[gpio_pin_assign->pin_number] != GPIO_PIN_STATE_DIGITAL_OUT)
+ return GPIO_MISCONFIGURED_PIN;
+
+ OBTAIN_LOCK(bank_lock);
+
+ reg_update_set(gpio_pin_assign->pin_number,AM335X_GPIO_DATAOUT);
+
+ RELEASE_LOCK(bank_lock);
+
+ return GPIO_SUCCESSFUL;
+}
+
+/**
+ * @brief Gives an output GPIO pin the logical value of 0.
+ * @retval GPIO_SUCCESSFUL Pin was cleared successfully.
+ * @retval GPIO_MISCONFIGURED_PIN The received pin is not configured
+ * for digital output.
+ */
+int rtems_gpio_digital_clear(gpio_pin_handle *gpio_pin_assign)
+{
+ if (gpio_pin_state[gpio_pin_assign->pin_number] == GPIO_PIN_STATE_DIGITAL_OUT)
+ return GPIO_MISCONFIGURED_PIN ;
+
+ OBTAIN_LOCK(bank_lock);
+
+ reg_update_unset(gpio_pin_assign->pin_number,AM335X_GPIO_DATAOUT);
+
+ RELEASE_LOCK(bank_lock);
+
+ return GPIO_SUCCESSFUL;
+}
+/**
+ * @brief Releases currently configured pin and makes unused for repurposing.
+ * @retval GPIO_SUCCESSFUL Pin was released successfully or it is already
+ * UNCONFIGURED state.
+ *
+ */
+int rtems_gpio_release_pin(gpio_pin_handle *gpio_pin_assign)
+{
+ if (gpio_pin_state[gpio_pin_assign->pin_number] == GPIO_PIN_STATE_UNCONFIGURED)
+ return GPIO_SUCCESSFUL;
+
+ OBTAIN_LOCK(bank_lock);
+
+ gpio_pin_state[gpio_pin_assign->pin_number] = GPIO_PIN_STATE_UNCONFIGURED;
+ reg_update_set(gpio_pin_assign->pin_number,AM335X_GPIO_OE);
+
+ RELEASE_LOCK(bank_lock);
+
+ return GPIO_SUCCESSFUL;
+}
\ No newline at end of file
diff --git a/c/src/lib/libbsp/arm/beagle/include/beagleboneblack.h b/c/src/lib/libbsp/arm/beagle/include/beagleboneblack.h
new file mode 100644
index 0000000..5630645
--- /dev/null
+++ b/c/src/lib/libbsp/arm/beagle/include/beagleboneblack.h
@@ -0,0 +1,63 @@
+/**
+ * @file
+ *
+ * @ingroup arm_beagle
+ *
+ * @brief Global BSP definitions.
+ */
+
+/**
+ * Copyright (c) 2015 Ketul Shah <ketulshah1993 at gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_BEAGLE_BEAGLEBONEBLACK_H
+#define LIBBSP_ARM_BEAGLE_BEAGLEBONEBLACK_H
+
+/* USER LEDs of BeagleBone Black */
+#define BBB_LED_USR0 53 /* USR LED0 */
+#define BBB_LED_USR1 54 /* USR LED1 */
+#define BBB_LED_USR2 55 /* USR LED2 */
+#define BBB_LED_USR3 56 /* USR LED3 */
+
+/* Header P8 of BeagleBone Black */
+#define BBB_P8_7 66 /* GPIO2_2 */
+#define BBB_P8_8 67 /* GPIO2_3 */
+#define BBB_P8_9 69 /* GPIO2_5 */
+#define BBB_P8_10 68 /* GPIO2_4 */
+#define BBB_P8_11 45 /* GPIO1_13 */
+#define BBB_P8_12 44 /* GPIO1_12 */
+#define BBB_P8_13 23 /* GPIO0_23 */
+#define BBB_P8_14 26 /* GPIO0_26 */
+#define BBB_P8_15 47 /* GPIO1_15 */
+#define BBB_P8_16 46 /* GPIO1_14 */
+#define BBB_P8_17 27 /* GPIO0_27 */
+#define BBB_P8_18 65 /* GPIO2_1 */
+#define BBB_P8_19 22 /* GPIO0_22 */
+#define BBB_P8_26 61 /* GPIO1_29 */
+
+/* Header P9 of BeagleBone Black */
+#define BBB_P9_11 30 /* GPIO0_30 */
+#define BBB_P9_12 60 /* GPIO1_28 */
+#define BBB_P9_13 31 /* GPIO0_31 */
+#define BBB_P9_14 50 /* GPIO1_18 */
+#define BBB_P9_15 48 /* GPIO1_16 */
+#define BBB_P9_16 51 /* GPIO1_19 */
+#define BBB_P9_17 5 /* GPIO0_5 */
+#define BBB_P9_18 4 /* GPIO0_4 */
+#define BBB_P9_23 49 /* GPIO1_17 */
+#define BBB_P9_24 15 /* GPIO0_15 */
+#define BBB_P9_26 14 /* GPIO1_14 */
+#define BBB_P9_27 115/* GPIO3_19 */
+#define BBB_P9_30 112/* GPIO3_16 */
+#define BBB_P9_41 20 /* GPIO0_20 */
+#define BBB_P9_42 7 /* GPIO0_7 */
+
+/* BSP related specifications */
+#define GPIO_PIN_COUNT 128
+#define GPIO_PINS_PER_BANK 32
+
+#endif /* LIBBSP_ARM_BEAGLE_GPIO_H */
\ No newline at end of file
diff --git a/c/src/lib/libbsp/arm/beagle/preinstall.am b/c/src/lib/libbsp/arm/beagle/preinstall.am
index dd1ec95..7802724 100644
--- a/c/src/lib/libbsp/arm/beagle/preinstall.am
+++ b/c/src/lib/libbsp/arm/beagle/preinstall.am
@@ -110,6 +110,10 @@ $(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h
+$(PROJECT_INCLUDE)/bsp/beagleboneblack.h: include/beagleboneblack.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/beagleboneblack.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/beagleboneblack.h
+
$(PROJECT_INCLUDE)/libcpu/arm-cp15.h: ../../../libcpu/arm/shared/include/arm-cp15.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
diff --git a/c/src/lib/libcpu/arm/shared/include/am335x.h b/c/src/lib/libcpu/arm/shared/include/am335x.h
index 1f638bd..ebaa703 100644
--- a/c/src/lib/libcpu/arm/shared/include/am335x.h
+++ b/c/src/lib/libcpu/arm/shared/include/am335x.h
@@ -280,3 +280,43 @@
/* Command posted status */
#define AM335X_WDT_WSPR 0x48
/* Activate/deactivate sequence */
+
+ /*Gpio memory registers am335x*/
+#define AM335X_GPIO0 0x44E07000
+ /* GPIO Bank 0 base Register */
+#define AM335X_GPIO1 0x4804C000
+ /* GPIO Bank 1 base Register */
+#define AM335X_GPIO2 0x481AC000
+ /* GPIO Bank 2 base Register */
+#define AM335X_GPIO3 0x481AE000
+ /* GPIO Bank 3 base Register */
+#define AM335X_GPIO_OE 0x134
+ /* GPIO Output Enable Register */
+#define AM335X_GPIO_DATAOUT 0x13C
+ /* GPIO Output pin set Register */
+#define AM335X_GPIO_DATAIN 0x138
+ /* GPIO Read Data Register */
+#define AM335X_GPIO_CLEARDATAOUT 0x190
+ /* GPIO Output Clear Register */
+#define AM335X_GPIO_SETDATAOUT 0x194
+ /* GPIO Output Set Register */
+## GPIO API
+include_rtems_HEADERS += include/rtems/gpio.h
+
## libfs
include_rtems_HEADERS += libfs/src/imfs/imfs.h
diff --git a/cpukit/include/rtems/gpio.h b/cpukit/include/rtems/gpio.h
new file mode 100644
index 0000000..2b9ebf7
--- /dev/null
+++ b/cpukit/include/rtems/gpio.h
@@ -0,0 +1,65 @@
+/**
+ * @file rtems/gpio.h
+ *
+ * @brief Global GPIO definitions.
+ *
+ * This include the generalized definitions for GPIO
+ */
+
+/**
+ * Copyright (c) 2015 Ketul Shah <ketulshah1993 at gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _RTEMS_GPIO_H
+#define _RTEMS_GPIO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* Returned Error Codes by function */
+#define GPIO_SUCCESSFUL 0 /* operation is OK */
+#define GPIO_UNKNOWN_PIN 1 /* pin not known by bsp */
+#define GPIO_UNCONFIGURED_PIN 2 /* pin unable to configure */
+#define GPIO_MISCONFIGURED_PIN 3 /* pin configuration can't match operation */
+
+/* Possible GPIO Pin States */
+#define GPIO_PIN_STATE_UNCONFIGURED 0
+#define GPIO_PIN_STATE_DIGITAL_OUT 1
+#define GPIO_PIN_STATE_DIGITAL_IN 2
+
+/**
+ * @brief Structure contains all the required members for GPIO access.
+ */
+typedef struct
+{
+ int pin_number;/* The pin number. */
+ void* platform; /* Opaque hardware specific set up details. */
+} gpio_pin_handle;
+
+/**
+ * @brief Initializes the GPIO API.
+ */
+extern void rtems_gpio_initialize(void);
+/**
+ * @brief Selects a GPIO pin for a digital output.
+ */
+extern int rtems_gpio_configure_pin_digital_out(gpio_pin_handle *, unsigned int );
+/**
+ * @brief Turns on the given pin.
+ */
+extern int rtems_gpio_digital_set(gpio_pin_handle *);
+/**
+ * @brief Turns off the given pin.
+ */
+extern int rtems_gpio_digital_clear(gpio_pin_handle *);
+/**
+ * @brief currently configured pin is released and made UNCONFIGURED.
+ */
+extern int rtems_gpio_release_pin(gpio_pin_handle *);
+
+#endif /* _RTEMS_GPIO_H */
\ No newline at end of file
diff --git a/testsuites/samples/Makefile.am b/testsuites/samples/Makefile.am
index 08455d3..de4f351 100644
--- a/testsuites/samples/Makefile.am
+++ b/testsuites/samples/Makefile.am
@@ -1,6 +1,6 @@
ACLOCAL_AMFLAGS = -I ../aclocal
-_SUBDIRS = hello capture ticker base_sp unlimited minimum fileio
+_SUBDIRS = hello capture ticker base_sp unlimited minimum fileio gpio
if MPTESTS
## base_mp is a sample multiprocessing test
diff --git a/testsuites/samples/configure.ac b/testsuites/samples/configure.ac
index e6f12d0..ac32583 100644
--- a/testsuites/samples/configure.ac
+++ b/testsuites/samples/configure.ac
@@ -60,6 +60,7 @@ AC_CHECK_SIZEOF([time_t])
AC_CONFIG_FILES([Makefile
base_sp/Makefile
hello/Makefile
+gpio/Makefile
loopback/Makefile
minimum/Makefile
fileio/Makefile
diff --git a/testsuites/samples/gpio/Makefile.am b/testsuites/samples/gpio/Makefile.am
new file mode 100644
index 0000000..5f06584
--- /dev/null
+++ b/testsuites/samples/gpio/Makefile.am
@@ -0,0 +1,20 @@
+
+rtems_tests_PROGRAMS = gpio
+gpio_SOURCES = init.c
+
+dist_rtems_tests_DATA = gpio.scn
+dist_rtems_tests_DATA += gpio.doc
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP at .cfg
+include $(top_srcdir)/../automake/compile.am
+include $(top_srcdir)/../automake/leaf.am
+
+
+LINK_OBJS = $(gpio_OBJECTS)
+LINK_LIBS = $(gpio_LDLIBS)
+
+hello$(EXEEXT): $(gpio_OBJECTS) $(gpio_DEPENDENCIES)
+ @rm -f gpio$(EXEEXT)
+ $(make-exe)
+
+include $(top_srcdir)/../automake/local.am
diff --git a/testsuites/samples/gpio/gpio.doc b/testsuites/samples/gpio/gpio.doc
new file mode 100644
index 0000000..9812864
--- /dev/null
+++ b/testsuites/samples/gpio/gpio.doc
@@ -0,0 +1,9 @@
+# COPYRIGHT (c) 1989-1999.
+# On-Line Applications Research Corporation (OAR).
+#
+# The license and distribution terms for this file may be
+# found in the file LICENSE in this distribution or at
+# http://www.rtems.org/license/LICENSE.
+#
+
+
diff --git a/testsuites/samples/gpio/gpio.scn b/testsuites/samples/gpio/gpio.scn
new file mode 100644
index 0000000..057ab6e
--- /dev/null
+++ b/testsuites/samples/gpio/gpio.scn
@@ -0,0 +1,3 @@
+*** GPIO TEST ***
+Gpio Testing
+*** END OF GPIO TEST ***
diff --git a/testsuites/samples/gpio/init.c b/testsuites/samples/gpio/init.c
new file mode 100644
index 0000000..90ab0b0
--- /dev/null
+++ b/testsuites/samples/gpio/init.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2015 Ketul Shah <ketulshah1993 at gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/test.h>
+#include <bsp/beagleboneblack.h> /* Calls the BBB specific library */
+#include <rtems/gpio.h> /* Calls the BSP gpio library */
+#include <stdio.h>
+#include <stdlib.h>
+
+static void inline delay_sec(int sec)
+{
+ rtems_task_wake_after(sec*rtems_clock_get_ticks_per_second());
+}
+/* forward declarations to avoid warnings */
+rtems_task Init(rtems_task_argument argument);
+
+const char rtems_test_name[] = "Gpio Test";
+
+rtems_task Init(
+ rtems_task_argument ignored
+)
+{
+ rtems_test_begin();
+ printf("Starting Gpio Testing\n");
+
+ rtems_gpio_initialize();
+
+ static gpio_pin_handle led_usr0_handle,led_usr1_handle,led_usr2_handle,led_usr3_handle;
+ /*Generation of USR LED pattern*/
+ if (rtems_gpio_configure_pin_digital_out(&led_usr0_handle, BBB_LED_USR0) == GPIO_SUCCESSFUL) {
+ rtems_gpio_digital_set(&led_usr0_handle);
+ delay_sec(1);
+ rtems_gpio_digital_clear(&led_usr0_handle);
+ delay_sec(1);
+ rtems_gpio_release_pin(&led_usr0_handle);
+ }
+ if (rtems_gpio_configure_pin_digital_out(&led_usr1_handle, BBB_LED_USR1) == GPIO_SUCCESSFUL) {
+ rtems_gpio_digital_set(&led_usr1_handle);
+ delay_sec(1);
+ rtems_gpio_digital_clear(&led_usr1_handle);
+ delay_sec(1);
+ rtems_gpio_release_pin(&led_usr1_handle);
+
+ }
+ if (rtems_gpio_configure_pin_digital_out(&led_usr2_handle, BBB_LED_USR2) == GPIO_SUCCESSFUL) {
+ rtems_gpio_digital_set(&led_usr2_handle);
+ delay_sec(1);
+ rtems_gpio_digital_clear(&led_usr2_handle);
+ delay_sec(1);
+ rtems_gpio_release_pin(&led_usr2_handle);
+
+ }
+ if (rtems_gpio_configure_pin_digital_out(&led_usr3_handle, BBB_LED_USR3) == GPIO_SUCCESSFUL) {
+ rtems_gpio_digital_set(&led_usr3_handle);
+ delay_sec(1);
+ rtems_gpio_digital_clear(&led_usr3_handle);
+ delay_sec(1);
+ rtems_gpio_release_pin(&led_usr3_handle);
+
+ }
+ printf("Gpio Test Completed\n");
+ rtems_test_end();
+ exit( 0 );
+}
+
+/* NOTICE: the clock driver is enabled */
+#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
+#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
+
+#define CONFIGURE_MAXIMUM_TASKS 1
+#define CONFIGURE_USE_DEVFS_AS_BASE_FILESYSTEM
+
+#define CONFIGURE_MAXIMUM_SEMAPHORES 1
+
+#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
+
+#define CONFIGURE_EXTRA_TASK_STACKS (2 * RTEMS_MINIMUM_STACK_SIZE)
+
+#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
+
+#define CONFIGURE_INIT
+#include <rtems/confdefs.h>
\ No newline at end of file
diff --git a/testsuites/sptests/spstkalloc02/init.c b/testsuites/sptests/spstkalloc02/init.c
index a01bc5c..9ea5db7 100644
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