[PATCH] Temporary fix for ethernet rx intr hang issue and Disable cache

[Gedare Bloom]

Thanks for the BSP opt that is much better way to control this cache behavior.

On Sun, Jun 28, 2015 at 5:54 AM, ragunath <ragunath3252 at gmail.com> wrote:
> ---
>  c/src/lib/libbsp/arm/beagle/configure.ac          |  3 +++
>  c/src/lib/libbsp/arm/beagle/irq.c                 |  5 +++--
>  c/src/lib/libbsp/arm/beagle/startup/bspstartmmu.c | 17 +++++++++++++++++
>  3 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/c/src/lib/libbsp/arm/beagle/configure.ac b/c/src/lib/libbsp/arm/beagle/configure.ac
> index b0c99a3..41cd939 100644
> --- a/c/src/lib/libbsp/arm/beagle/configure.ac
> +++ b/c/src/lib/libbsp/arm/beagle/configure.ac
> @@ -33,6 +33,9 @@ RTEMS_BSPOPTS_HELP([CONSOLE_POLLED],[polled console i/o (e.g. to run testsuite)]
>  RTEMS_BSPOPTS_SET([BBB_DEBUG],[beaglebone*],[0])
>  RTEMS_BSPOPTS_HELP([BBB_DEBUG],[Enable BBB debug])
>
> +RTEMS_BSPOPTS_SET([BBB_CACHE_DISABLE],[beaglebone*],[0])
> +RTEMS_BSPOPTS_HELP([BBB_CACHE_DISABLE],[DISABLE CACHE IN BBB])
> +
Consider adding an explanation like that is necessary for networking
to work. I think the name of the option pretty self-documents the help
of "Disable cache in BBB", so a bit more context for the user would be
good.

>  RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
>  RTEMS_BSP_LINKCMDS
>
> diff --git a/c/src/lib/libbsp/arm/beagle/irq.c b/c/src/lib/libbsp/arm/beagle/irq.c
> index c6485cd..9f2429c 100644
> --- a/c/src/lib/libbsp/arm/beagle/irq.c
> +++ b/c/src/lib/libbsp/arm/beagle/irq.c
> @@ -73,7 +73,8 @@ void bsp_interrupt_dispatch(void)
>
>      _ARMV4_Status_restore(psr);
>
> -    bsp_interrupt_vector_enable(irq);
> +    if ( ! ( irq == 40 || irq == 41 || irq == 42 || irq == 43 ) )
> +      bsp_interrupt_vector_enable(irq);
Add an explicit { } and also a comment here would benefit so we know
why these irqs are exempted.

>    }
>  }
>
> @@ -94,11 +95,11 @@ rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
>    uint32_t mask, cur;
>    uint32_t mir_reg = get_mir_reg(vector, &mask);
>
> +  irqs_enabled[vector] = 1;
>    cur = mmio_read(omap_intr.base + mir_reg);
>    mmio_write(omap_intr.base + mir_reg, cur & ~mask);
>    flush_data_cache();
>
> -  irqs_enabled[vector] = 1;
>
This will now have two blank spaces in a row. Avoid that.

>    return RTEMS_SUCCESSFUL;
>  }
> diff --git a/c/src/lib/libbsp/arm/beagle/startup/bspstartmmu.c b/c/src/lib/libbsp/arm/beagle/startup/bspstartmmu.c
> index 157edfa..c8d6526 100644
> --- a/c/src/lib/libbsp/arm/beagle/startup/bspstartmmu.c
> +++ b/c/src/lib/libbsp/arm/beagle/startup/bspstartmmu.c
> @@ -44,10 +44,26 @@ BSP_START_TEXT_SECTION void beagle_setup_mmu_and_cache(void)
>  {
>    /* turn mmu off first in case it's on */
>    uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
> +#if BBB_CACHE_DISABLE
It is best to compare the BSP opt directly to a value I think, like
#if BBB_CACHE_DISABLE != 0
The main thing to avoid though is #ifdef, which doesn't work with
them. Using the explicit comparison prevents anyone from coming along
and changing it to an ifdef.

> +    /* clear - mmu off & disable cache */
> +    ARM_CP15_CTRL_M | ARM_CP15_CTRL_A | ARM_CP15_CTRL_I | ARM_CP15_CTRL_C,
> +#else
>      ARM_CP15_CTRL_M | ARM_CP15_CTRL_A, /* clear - mmu off */
> +#endif /* BBB_CACHE_DISABLE */
>      ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
>    );
>
> +#if BBB_CACHE_DISABLE
> +  arm_cp15_start_setup_translation_table(
> +    (uint32_t *) bsp_translation_table_base,
> +    ARM_MMU_DEFAULT_CLIENT_DOMAIN,
> +    &beagle_mmu_config_table[0],
> +    RTEMS_ARRAY_SIZE(beagle_mmu_config_table)
> +  );
> +
> +  ctrl |= ARM_CP15_CTRL_M;
> +  arm_cp15_set_control(ctrl);
> +#else
>    arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
>      ctrl,
>      (uint32_t *) bsp_translation_table_base,
> @@ -55,4 +71,5 @@ BSP_START_TEXT_SECTION void beagle_setup_mmu_and_cache(void)
>      &beagle_mmu_config_table[0],
>      RTEMS_ARRAY_SIZE(beagle_mmu_config_table)
>    );
> +#endif /* BBB_CACHE_DISABLE */
>  }
> --
> 1.9.1
>
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