[PATCH v2] Mailbox : Extending functionality

Sat Aug 27 14:01:26 UTC 2016

Hello Mudit,

On Saturday 27 of August 2016 11:20:48 Mudit Jain wrote:
> Hi Pavel,
>
> I am working on porting the changes I had done for the SD card, on top of
> the recent MMC stack update. After that, my plan is to work on DMA.

OK, that is more important for now.

I have some progress in DMA API testing corrections.
See my branch

  https://github.com/ppisa/rtems/tree/rtems-rpi-devel-dma-test

The most commits are self describing

commit 3612ab75aba53ae911232f30ff115672d5e2e06f
Author: Pavel Pisa <pisa at cmp.felk.cvut.cz>
Date:   Fri Aug 26 02:53:08 2016 +0200

    arm/raspberrypi: DMA API: add simple memory to memory transfer test to check functionality.

commit 85590b16b010c1ac462f8da4acdbd6cb614a5b81
Author: Pavel Pisa <pisa at cmp.felk.cvut.cz>
Date:   Sat Aug 27 12:53:52 2016 +0200

    arm/raspberrypi: correct DMA registers peripheral base in ARM physical address-space.

    DMA registers are located at address 0x7e007000 in VideoCore address
    space. The VideoCore registers region starting at address 0x7e000000
    is remapped to physical ARM CPU address space to region
    starting at 0x20000000 for BCM2835. The region start address
    is 0x3F000000 for BCM2836 and BCM2837.

commit ec1108e5e8598306b88bd2e37b775f6b4d78e750
Author: Pavel Pisa <pisa at cmp.felk.cvut.cz>
Date:   Sat Aug 27 12:56:38 2016 +0200

    HACKING: raspberrypi DMA test prints registers content before operation.

    DMA API code does not work yet. Execution stucks for now.

commit d9f307b155eabe7426a173fdd37039a7fdaeb2d2
Author: Pavel Pisa <pisa at cmp.felk.cvut.cz>
Date:   Sat Aug 27 15:39:23 2016 +0200

    arm/raspberrypi: DMA API: disable scatter-gather related functions.

    They are not used and exposed by actual API version and make code
    convoluted for review and corectnes checking.

commit bc6353af59f6116df6fbb73ec9f78d47cdad21f1
Author: Pavel Pisa <pisa at cmp.felk.cvut.cz>
Date:   Sat Aug 27 15:42:05 2016 +0200

    arm/raspberrypi: DMA API interrupts context/arg has to be set and cache synchronization of CB before start.

commit 7551762d2ca92a152d5e4438e5267fe97c191771
Author: Pavel Pisa <pisa at cmp.felk.cvut.cz>
Date:   Sat Aug 27 15:44:59 2016 +0200

    arm/raspberrypi: only DMA channel 0 status reports CS_INT as expected, ignore it for now.

    This is probably caused by some bug in code. But when ignored
    then transfer is processed correct way. Needs more debugging.

The main problem has been missing base for DMA registers.
Be carefull that registers base on ARM side is differnet from documentation
which uses addresses as seen by VideoCore.

I have found valuable page with registers documentation there

  https://github.com/msperl/rpi-registers/

There is Broadcom published complete headers set with registers
fro, VideoCore side plus many other valuable sources

  http://www.broadcom.com/docs/support/videocore/Brcm_Android_ICS_Graphics_Stack.tar.gz

the directory within archive with registers headerfiles

  dag/vmcsx/vcinclude/bcm2708_chip

Great is that license is BSD style. It would worth to prepare tool to parse
and reformat them to RTEMS style in future.

I have tested channel 0, 1 and 3 to work with that simple memory to memory
transfer hacked directly to the ticker for now.

There is significant part of output with some more debugging prints
included in DMA code.

Good think is that other ticker tasks continue to work
after transfer so there is no significant problem with stuck
interrupts etc.

Best wishes,

              Pavel

power state res 0, domain 22, state 2
rpi_dma_init ...
rpi_dma_init cb_virt 0
rpi_dma_init 0
3f007300:      CS 0x00000008
3f007304:  CBADDR 0x00000000
3f007308:    INFO 0x00000000
3f00730c:     SRC 0x00000000
3f007310:     DST 0x00000000
3f007314:     LEN 0x00000000
3f007318:  STRIDE 0x00000000
3f00731c:  CBNEXT 0x00000000
3f007320:   DEBUG 0x04018300
rpi_dma_allocate ...
rpi_dma_allocate 0
rpi_dma_setup_src ...
rpi_dma_setup_src 0
rpi_dma_setup_dst ...
rpi_dma_setup_dst 0
rpi_dma_setup_intr ...
rpi_dma_setup_intr 0
rpi_dma_start ...
rpi_dma_start ch 3 cb 7FFFF80 vc_cb 47FFFF80 info 0x00000119
rpi_dma_intr 1 ch 3 104424 7FFFF80
rpi_dma_intr CS 0x20000009 INT_STATUS 0x00000000 DMA_ENABLE 0x00007FFF
rpi_dma_intr 2
rpi_dma_intr 3
rpi_dma_intr 4
test_dma_intr 3 104D00
rpi_dma_intr 5
rpi_dma_start 0
3f007300:      CS 0x00000008
3f007304:  CBADDR 0x00000000
3f007308:    INFO 0x00000119
3f00730c:     SRC 0x40101868
3f007310:     DST 0x40105e28
3f007314:     LEN 0x00000000
3f007318:  STRIDE 0x00000000
3f00731c:  CBNEXT 0x00000000
3f007320:   DEBUG 0x04018300
waiting
TA1  - rtems_clock_get_tod - 09:00:00   12/31/1988
TA2  - rtems_clock_get_tod - 09:00:00   12/31/1988
TA3  - rtems_clock_get_tod - 09:00:00   12/31/1988
3f007300:      CS 0x00000008
3f007304:  CBADDR 0x00000000
3f007308:    INFO 0x00000119
3f00730c:     SRC 0x40101868
3f007310:     DST 0x40105e28
3f007314:     LEN 0x00000000
3f007318:  STRIDE 0x00000000
3f00731c:  CBNEXT 0x00000000
3f007320:   DEBUG 0x04018300
dma test result
11>11 22>22 33>33 44>44 55>55 66>66 77>77 88>88 
simple mem2mem DMA test has PASSED
TA1  - rtems_clock_get_tod - 09:00:05   12/31/1988
TA1  - rtems_clock_get_tod - 09:00:10   12/31/1988
TA2  - rtems_clock_get_tod - 09:00:10   12/31/1988
TA1  - rtems_clock_get_tod - 09:00:15   12/31/1988
TA3  - rtems_clock_get_tod - 09:00:15   12/31/1988
TA1  - rtems_clock_get_tod - 09:00:20   12/31/1988
TA2  - rtems_clock_get_tod - 09:00:20   12/31/1988
TA1  - rtems_clock_get_tod - 09:00:25   12/31/1988
TA1  - rtems_clock_get_tod - 09:00:30   12/31/1988
TA3  - rtems_clock_get_tod - 09:00:30   12/31/1988
TA2  - rtems_clock_get_tod - 09:00:30   12/31/1988
*** END OF TEST CLOCK TICK ***