[PATCH 3/6] arm/bsps: CP15 and basic cache support entire cache clean for more architecture variants now.
gedare at rtems.org
Wed Jul 20 13:52:09 UTC 2016
On Wed, Jul 20, 2016 at 5:05 AM, Pavel Pisa <pisa at cmp.felk.cvut.cz> wrote:
> Hello Gedare,
> thanks for review.
> On Tuesday 19 of July 2016 17:21:16 Gedare Bloom wrote:
>> > + line_power = arm_ccsidr_get_line_power(ccsidr);
>> > + associativity = arm_ccsidr_get_associativity(ccsidr);
>> > + way_shift = __builtin_clz(associativity - 1);
>> Can we use a non-GCCism here, or wrap it in to a support function?
> The code is copy of arm_cp15_data_cache_invalidate_all_levels()
> with replaced cache operation line.
> There has been already __builtin_clz in the source and it is used
> in more places in the code. I have not found reasonable portable
> replacement which would compile well (this result in single
> assembler instruction on ARMv5+, x86 etc.).
> The ffs ffsl etc has been adopted by standard. But I cannot
> find something like clz, fls in the standards. There is only
> floating point log2 in math.h.
> So I see as option to define CLZ somehow centrally in CPUkit
> header to __builtin_clz for GCC. ARM and even Microsoft compilers
> have equivalent operation (under other name) directly available
> by compiler as well.
> But such update of __builtin_clz should go to other patch which
> takes care of all RTEMS use locations.
OK that is fine. This should be similar to defining
score/include/rtems/score/prioritybitmapimpl.h. They're really almost
> Best wishes,
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