[PATCH 00/10] HYP mode boot and cache manager updates for ARM and RaspberryPi specially.

[Alan Cudmore]

Hi Pavel,
I can confirm that your rtems-rpi-devel branch from your github account works on the Raspberry Pi A+, Raspberry Pi Zero, and Raspberry Pi 2 with the latest firmware. 

I did notice that the Dhrystone benchmark runs 3 times faster on the Pi 1 than the Pi 2, but that could be the cache configuration. But it is great to have the latest code booting on the latest official Rasberry Pi firmware again. 

I will update my RTEMS git repository with your latest changes and try that next. 

Thanks for you hard work on figuring this out. 

Thanks and enjoy your holiday,
Alan


> On Jul 4, 2016, at 12:44 PM, Pavel Pisa <pisa at cmp.felk.cvut.cz> wrote:
> 
> Hello Sebastian and others,
> 
> On Monday 04 of July 2016 15:19:28 Sebastian Huber wrote:
>> Hello Pavel,
>> 
>> On 04/07/16 15:15, Pavel Pisa wrote:
>>> Hello Sebastian,
>>> 
>>> please, send me your opinion about patch series shape.
>>> You have no comments to the rest of patches.
>>> Can I interpret that as ACK?
>> 
>> yes, the rest is fine, thanks. I am a bit uneasy about the #ifdef
>> parameter lists in the hooks.
>> 
>>> Should I left series for more comments from you and others
>>> during my leave till next Monday or should I push
>>> at least the parts with fixes or whole code.
>>> I expect to not be online on the other hand I would like
>>> to provide this as a basic correction for these working
>>> on RPi2.
>>> 
>>> On the other hand there can be some not yet found
>>> problem.
>> 
>> If something breaks, then we can still fix it.
> 
> I have pushed the series.
> If something breaks I fix that when I return
> on next Monday.
> 
> I have checked that code does not break build
> of below listed targets. State of Cache Manager
> operations is included. As for actual compatibility
> of operations with cores I think that
> 
>  rtems_cache_flush_multiple_data_lines( buf, size );
>  rtems_cache_invalidate_multiple_data_lines( buf, size );
>  rtems_cache_instruction_sync_after_code_change(code_addr, n_bytes )
> 
> should be be OK/compatible for all these targets with
> cache_.h file variant selected selected in BSP.
> Operations for complete cache flush are not correct
> for pre-Cortex targets and are missing mostly.
> This would require work in future.
> 
> BSP altera-cyclone-v altcycv_devkit
>  Cache OPS
> 
> BSP altera-cyclone-v altcycv_devkit_smp
>  Cache OPS
> 
> BSP atsam atsamv
>  Cache OPS
> 
> BSP beagle beagleboneblack
>  Cache OPS
> 
> BSP csb336 csb336
>  Cache OPS
> 
> BSP csb337 csb337
>  Cache OPS
> 
> BSP csb337 csb637
>  Cache OPS
> 
> BSP csb337 kit637_v6
>  Cache OPS
> 
> BSP edb7312 edb7312
>  Cache support missing
>  ARM720T 8 KB cache
>  Not sure if common CP15 can be used
> 
> BSP gdbarmsim arm1136jfs
>  Cache support missing
>  simulator does not require them
>  can be added for debugging
> 
> BSP gdbarmsim arm1136js
>  Cache support missing
> 
> BSP gdbarmsim arm7tdmi
>  Cache support missing
> 
> BSP gdbarmsim arm920
>  Cache support missing
> 
> BSP gdbarmsim armcortexa9
>  Cache support missing
> 
> BSP gumstix gumstix
>  Cache support missing
>  PXA255 not sure if some actual OPS can be reused
> 
> BSP lm3s69xx lm3s6965
>  No Cache - Cortex-M3
> 
> BSP lm3s69xx lm4f120
>  No Cache - Cortex-M4F
> 
> BSP lpc24xx lpc17xx_ea_ram
>  No Cache - Cortex-M3
> 
> BSP lpc24xx lpc24xx_ea
>  No Cache - ARM7TDMI
> 
> BSP lpc24xx lpc40xx_ea_ram
>  No Cache - Cortex-M4F
> 
> BSP lpc24xx lpc40xx_ea_rom_int
>  No Cache - Cortex-M4F
> 
> BSP lpc32xx lpc32xx_mzx
>  Cache OPS
> 
> BSP raspberrypi raspberrypi2
>  Cache OPS
> 
> BSP raspberrypi raspberrypi
>  Cache OPS
> 
> BSP realview-pbx-a9 realview_pbx_a9_qemu
>  Cache OPS
> 
> BSP realview-pbx-a9 realview_pbx_a9_qemu_smp
>  Cache OPS
> 
> BSP rtl22xx rtl22xx
>  No Cache - ARM7TDMI-S
> 
> BSP rtl22xx rtl22xx_t
>  No Cache - ARM7TDMI-S
> 
> BSP smdk2410 smdk2410
>  Cache OPS
> 
> BSP stm32f4 stm32f105rc
>  No Cache
> 
> BSP stm32f4 stm32f4
>  No Cache
> 
> BSP tms570 tms570ls3137_hdk_sdram
>  No Cache - Cortex-R4F
>  but for TMS570LC43xx/Cortex-R5 would be required
> 
> BSP xilinx-zynq xilinx_zynq_zedboard
>  Cache OPS
> 
> _______________________________________________
> devel mailing list
> devel at rtems.org
> http://lists.rtems.org/mailman/listinfo/devel