Some problem in dlopen on Raspberry Pi (ARMv6)
Pavel Pisa
ppisa4lists at pikron.com
Thu May 19 13:05:20 UTC 2016
Hello Chris,
update. If I disable cache completely then I find code
relocated right at the given address
On Thursday 19 of May 2016 14:50:55 Pavel Pisa wrote:
> All seem to be right to this place but when I disassemble target
> function I get
>
> 0x1cb018: push {r4, r5, r6, r7, r8, lr}
> 0x1cb01c: mov r7, r0
> 0x1cb020: mov r6, r1
> 0x1cb024: ldr r0, [pc, #64] ; 0x1cb06c
> 0x1cb028: ldr r1, [r1]
> 0x1cb02c: bl 0x1cb02c
> !!!!!!!!!!!!!!!
> 0x1cb030: cmp r7, #1
> 0x1cb034: ble 0x1cb064
> 0x1cb038: mov r5, r6
> 0x1cb03c: mov r4, #1
>
> It seem that call to printf function is not updated.
0x1cb018: push {r4, r5, r6, r7, r8, lr}
0x1cb01c: mov r7, r0
0x1cb020: mov r6, r1
0x1cb024: ldr r0, [pc, #64] ; 0x1cb06c
0x1cb028: ldr r1, [r1]
0x1cb02c: bl 0x73058 <printf>
0x1cb030: cmp r7, #1
0x1cb034: ble 0x1cb064
0x1cb038: mov r5, r6
0x1cb03c: mov r4, #1
So it seems that update does not get into instruction
cache if cache is enabled and because I read not updated
code even by debugger I expect that it is lost even from
data cache. It seems like there is missing clear cache
operation before cache invalidate and cache invalidate
does not apply only to instructions but even to the data one.
Or there is missing drain data buffer.
Best wishes,
Pavel
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