[PATCH 0/2] Zynq7000 series device configuration driver

Pavel Pisa pisa at cmp.felk.cvut.cz
Sun Apr 23 10:49:35 UTC 2017


Hello Chris, Patrick and others,

I am sending pointers to some of our Zynq work which can be used
for test designs.

On Friday 21 of April 2017 00:37:16 Chris Johns wrote:
> On 21/04/2017 07:55, Patrick Gauvin wrote:
> > Gedare,
> >
> >
> >     if the test programs are specific to the Zynq BSP, then we don't
> >     currently have a very good mechanism for maintaining them. Probably
> >     submitting them as "example programs" in the
> >     git.rtems.org/examples-v2.git <http://git.rtems.org/examples-v2.git>
> >     is the best place to look at integrating
> >     application/bsp-level tests. This is an area in need of longer-term
> >     solutions.
> >
> >
> > OK, I will plan on putting them there.
>
> What happens with bitfiles? For example I have a MicroZed with a 7Z010
> and I am not sure what a Zedboard has?
>
> Do you have a simple bitfile we can load?
>
> A bitfile that is not secured can compress well. Once this driver is in
> RTEMS it would be nice to add another layer to load compressed files.

There is some set of peripherals available and tested on Xilinx MicroZed
which is used from our group at Czech Technical University projects

  http://rtime.felk.cvut.cz/gitweb/fpga/zynq/canbench-sw.git

The master branch add two SJA1000 CAN controllers and routes integrated
ones to the interfaces on CAN benchmaring setup with MicroZed.

The "microzed_apo" branch adds some LEDs, knobs etc connected over
SPI, more PWM modulators for RC servos, simple audio etc

  http://rtime.felk.cvut.cz/gitweb/fpga/zynq/canbench-sw.git/tree/refs/heads/microzed_apo

The project is interesting that it uses PetaLinux base and we have
carefully selected set of files which have to be distributed
and versioned in GIT and which can be regenerated by build.
Project is not perfect but much better than when everything
is stored in the GIT.

Some IPs for peripherals which we use

  http://rtime.felk.cvut.cz/gitweb/fpga/zynq/canbench-sw.git/tree/refs/heads/microzed_apo:/system/ip

educational ones have been writted in a hurry to finish before start
of the semester so they are not perfect. But woking.
I have examples to add additional UARTs etc as well.

There are constrain files for MicroZed with CAN bench board
and educational kit

  http://rtime.felk.cvut.cz/gitweb/fpga/zynq/canbench-sw.git/tree/refs/heads/microzed_apo:/system/src/constrs

The schematic diagrams and photos of our design can be found
in the directory

  http://cmp.felk.cvut.cz/~pisa/apo/mz_apo/

I have archived/published some U-boot patches and
my local build configuration for U-Boot, Linux
and RTEMS can be found there

  https://github.com/ppisa/zynq-rt-utils-and-builds

But RTEMS config is dated, I have tested RTEMS on Zynq
during last summer.

The presentation of real-time PMSM/BLDC for both Raspberry Pi and MicroZed
targets can be found there

  http://cmp.felk.cvut.cz/~pisa/installfest/linux_and_fpga_in_rt_control.pdf

I have interrest to prepare RTEMS one one day as well. I have some
RTEMS RPi DC motor one with video in English already but the sound
and language quality is bad so I am not decided if I should publish
it or wait for some rare moment when I find time to dub it better
myself or find somebody who is better English language gifted.

Best wishes,

Pavel





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