[PATCH 2/4] sparc: Rename SPARC_USE_SAFE_FP_SUPPORT

Sebastian Huber sebastian.huber at embedded-brains.de
Wed Jul 19 08:21:16 UTC 2017


Rename SPARC_USE_SAFE_FP_SUPPORT in SPARC_USE_SYNCHRONOUS_FP_SWITCH.
Update comment.

Update #3077.
---
 c/src/lib/libbsp/sparc/shared/irq_asm.S  |  6 ++--
 cpukit/score/cpu/sparc/cpu.c             |  4 +--
 cpukit/score/cpu/sparc/cpu_asm.S         |  2 +-
 cpukit/score/cpu/sparc/rtems/score/cpu.h | 52 +++++++++++++++++---------------
 4 files changed, 33 insertions(+), 31 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/irq_asm.S b/c/src/lib/libbsp/sparc/shared/irq_asm.S
index b4374c381c..1d76e7e728 100644
--- a/c/src/lib/libbsp/sparc/shared/irq_asm.S
+++ b/c/src/lib/libbsp/sparc/shared/irq_asm.S
@@ -25,7 +25,7 @@
 #include <rtems/score/percpu.h>
 #include <bspopts.h>
 
-#if SPARC_HAS_FPU == 1 && defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
   #define FP_FRAME_OFFSET_FO_F1 (SPARC_MINIMUM_STACK_FRAME_SIZE + 0)
   #define FP_FRAME_OFFSET_F2_F3 (FP_FRAME_OFFSET_FO_F1 + 8)
   #define FP_FRAME_OFFSET_F4_F5 (FP_FRAME_OFFSET_F2_F3 + 8)
@@ -652,7 +652,7 @@ isr_dispatch:
 
         mov      0, %o1                 ! ISR level for _Thread_Do_dispatch()
 
-#if SPARC_HAS_FPU == 1 && defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
         /* Test if we interrupted a floating point thread (PSR[EF] == 1) */
         andcc   %l0, %l5, %g0
         be      non_fp_thread_dispatch
@@ -731,7 +731,7 @@ non_fp_thread_dispatch:
         call    SYM(_Thread_Do_dispatch)
          mov    %g6, %o0
 
-#if SPARC_HAS_FPU == 1 && defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
 thread_dispatch_done:
 #endif
 
diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c
index a640849bee..5bea27fda5 100644
--- a/cpukit/score/cpu/sparc/cpu.c
+++ b/cpukit/score/cpu/sparc/cpu.c
@@ -110,7 +110,7 @@ RTEMS_STATIC_ASSERT(
   CPU_Interrupt_frame_alignment
 );
 
-#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
 Context_Control_fp _CPU_Null_fp_context;
 #endif
 
@@ -129,7 +129,7 @@ Context_Control_fp _CPU_Null_fp_context;
 
 void _CPU_Initialize(void)
 {
-#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
   Context_Control_fp *pointer;
   uint32_t            psr;
 
diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S
index 399c95508b..66d36935a3 100644
--- a/cpukit/score/cpu/sparc/cpu_asm.S
+++ b/cpukit/score/cpu/sparc/cpu_asm.S
@@ -26,7 +26,7 @@
 #include <rtems/asm.h>
 #include <rtems/system.h>
 
-#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
 
 /*
  *  void _CPU_Context_save_fp(
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index 7c81f07400..48db756ea6 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -28,29 +28,31 @@ extern "C" {
 
 /* conditional compilation parameters */
 
-#if defined(RTEMS_SMP)
-  /*
-   * The SPARC ABI is a bit special with respect to the floating point context.
-   * The complete floating point context is volatile.  Thus from an ABI point
-   * of view nothing needs to be saved and restored during a context switch.
-   * Instead the floating point context must be saved and restored during
-   * interrupt processing.  Historically the deferred floating point switch is
-   * used for SPARC and the complete floating point context is saved and
-   * restored during a context switch to the new floating point unit owner.
-   * This is a bit dangerous since post-switch actions (e.g. signal handlers)
-   * and context switch extensions may silently corrupt the floating point
-   * context.  The floating point unit is disabled for interrupt handlers.
-   * Thus in case an interrupt handler uses the floating point unit then this
-   * will result in a trap.
-   *
-   * On SMP configurations the deferred floating point switch is not
-   * supported in principle.  So use here a safe floating point support.  Safe
-   * means that the volatile floating point context is saved and restored
-   * around a thread dispatch issued during interrupt processing.  Thus
-   * post-switch actions and context switch extensions may safely use the
-   * floating point unit.
-   */
-  #define SPARC_USE_SAFE_FP_SUPPORT
+/*
+ * The SPARC ABI is a bit special with respect to the floating point context.
+ * The complete floating point context is volatile.  Thus from an ABI point
+ * of view nothing needs to be saved and restored during a context switch.
+ * Instead the floating point context must be saved and restored during
+ * interrupt processing.  Historically, the deferred floating point switch is
+ * used for SPARC and the complete floating point context is saved and
+ * restored during a context switch to the new floating point unit owner.
+ * This is a bit dangerous since post-switch actions (e.g. signal handlers)
+ * and context switch extensions may silently corrupt the floating point
+ * context.  The floating point unit is disabled for interrupt handlers.
+ * Thus in case an interrupt handler uses the floating point unit then this
+ * will result in a trap.
+ *
+ * In SMP configurations, the deferred floating point switch is not supported
+ * in principle.  So, use here a synchronous floating point switching.
+ * Synchronous means that the volatile floating point context is saved and
+ * restored around a thread dispatch issued during interrupt processing.  Thus
+ * post-switch actions and context switch extensions may safely use the
+ * floating point unit.
+ */
+#if SPARC_HAS_FPU == 1
+  #if defined(RTEMS_SMP)
+    #define SPARC_USE_SYNCHRONOUS_FP_SWITCH
+  #endif
 #endif
 
 /**
@@ -117,7 +119,7 @@ extern "C" {
  *
  * This is set based upon the multilib settings.
  */
-#if ( SPARC_HAS_FPU == 1 ) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if ( SPARC_HAS_FPU == 1 ) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
   #define CPU_HARDWARE_FP     TRUE
 #else
   #define CPU_HARDWARE_FP     FALSE
@@ -167,7 +169,7 @@ extern "C" {
  * On the SPARC, we can disable the FPU for integer only tasks so
  * it is safe to defer floating point context switches.
  */
-#if defined(SPARC_USE_SAFE_FP_SUPPORT)
+#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
   #define CPU_USE_DEFERRED_FP_SWITCH FALSE
 #else
   #define CPU_USE_DEFERRED_FP_SWITCH TRUE
-- 
2.12.3




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