[PATCH 5/6] cmdline: Add boot_cpu parser

[andreas.koelbl at st.oth-regensburg.de]

From: Andreas Kölbl <andreas.koelbl at st.oth-regensburg.de>

This adds the boot cpu to get parsed via cmdline on address 0x83FF8000 (by
default). This allows the shared arm-gic-irq driver to only redirect irqs to the
boot cpu. Running into a hypervisor, irq redirecting to different, not available
cpus, may crash RTEMS.
---
 c/src/lib/libbsp/arm/jetson-tk1/include/cmdline.h   | 9 ++++++++-
 c/src/lib/libbsp/arm/jetson-tk1/startup/linkcmds.in | 4 ++--
 c/src/lib/libbsp/arm/shared/arm-gic-irq.c           | 6 +++++-
 3 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/c/src/lib/libbsp/arm/jetson-tk1/include/cmdline.h b/c/src/lib/libbsp/arm/jetson-tk1/include/cmdline.h
index d50bfaaed0..e02d24dd7e 100644
--- a/c/src/lib/libbsp/arm/jetson-tk1/include/cmdline.h
+++ b/c/src/lib/libbsp/arm/jetson-tk1/include/cmdline.h
@@ -11,7 +11,14 @@
 #define LIBBSP_ARM_JETSONTK1_CMDLINE_H
 
 #include <bspopts.h>
+#define bsp_mmu_size 0x4000
+#define bsp_cmdline_size 0x4000
 
-#define BSP_CMDLINE_LOCATION (TEGRA_BASE + MEMORY_SIZE - 0x4000)
+#ifndef ASM
+uint8_t bsp_get_boot_cpu(void);
+#endif
+
+#define BSP_CMDLINE_LOCATION (TEGRA_BASE + MEMORY_SIZE - bsp_mmu_size - \
+    bsp_cmdline_size)
 
 #endif /* LIBBSP_ARM_JETSONTK1_CMDLINE_H */
diff --git a/c/src/lib/libbsp/arm/jetson-tk1/startup/linkcmds.in b/c/src/lib/libbsp/arm/jetson-tk1/startup/linkcmds.in
index ddc19c5097..468ec42c63 100644
--- a/c/src/lib/libbsp/arm/jetson-tk1/startup/linkcmds.in
+++ b/c/src/lib/libbsp/arm/jetson-tk1/startup/linkcmds.in
@@ -1,5 +1,5 @@
-bsp_mmu_size = 16k;
-bsp_cmdline_size = 16k;
+bsp_mmu_size = DEFINED (bsp_mmu_size) ? bsp_mmu_size : 16k;
+bsp_cmdline_size = DEFINED (bsp_cmdline_size) ? bsp_cmdline_size : 16k;
 
 MEMORY {
   RAM         (AIW) : ORIGIN = @TEGRA_BASE@, LENGTH = @MEMORY_SIZE@ - bsp_mmu_size - bsp_cmdline_size
diff --git a/c/src/lib/libbsp/arm/shared/arm-gic-irq.c b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c
index 5a4a998bfb..b006bb4f7a 100644
--- a/c/src/lib/libbsp/arm/shared/arm-gic-irq.c
+++ b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c
@@ -15,6 +15,7 @@
 #include <bsp/arm-gic.h>
 
 #include <rtems/score/armv4.h>
+#include <bsp/cmdline.h>
 
 #include <libcpu/arm-cp15.h>
 
@@ -78,6 +79,9 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
   volatile gic_dist *dist = ARM_GIC_DIST;
   uint32_t id_count = get_id_count(dist);
   uint32_t id;
+  uint8_t boot_cpu;
+
+  boot_cpu = bsp_get_boot_cpu();
 
   arm_cp15_set_exception_handler(
     ARM_EXCEPTION_IRQ,
@@ -89,7 +93,7 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
   }
 
   for (id = 32; id < id_count; ++id) {
-    gic_id_set_targets(dist, id, 0x01);
+    gic_id_set_targets(dist, id, 1 << boot_cpu);
   }
 
   cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
-- 
2.13.3