Interrupt handling for RISCV
denisobrezkov at gmail.com
Mon Jun 12 12:02:32 UTC 2017
2017-06-11 23:39 GMT+03:00 Hesham Almatary <heshamelmatary at gmail.com>:
> On Mon, Jun 12, 2017 at 6:01 AM, Denis Obrezkov <denisobrezkov at gmail.com>
> > 2017-06-11 22:43 GMT+03:00 Hesham Almatary <heshamelmatary at gmail.com>:
> >> Hi Denis,
> >> On Sun, Jun 11, 2017 at 11:52 PM, Denis Obrezkov
> >> <denisobrezkov at gmail.com> wrote:
> >> > Hello Hesham,
> >> >
> >> > I found out that your code in interrupt handling routine is outdated -
> >> Which interrupt handling routine? The port doesn't handle interrupts.
> >> The only relevant code is enable/disable interrupts, but it doesn't
> >> matter at this stage that it's outdated (as we don't have interrupts).
> >> > the format of mstatus and sstatus registers was changed.
> >> > I can produce some patches in a few days, though, I still don't
> >> > understand
> >> > how to deal with local and global interrupts.
> >> >
> >> Could you illustrate what do you mean by "global" and "local"
> >> interrupts? I still argue for a simple port that runs hello world, you
> >> don't need interrupts, so this shouldn't be a blocker for you.
> >> > --
> >> > Regards, Denis Obrezkov
> >> --
> >> Hesham
> > RISC-V has local and global interrupt sources: Privileged ISA 1.10,
> > 7.2.
> Thanks for the reference. After reading this part, global interrupts
> are mapped to external interrupts that are not part of RISC-V ISA.
> While local interrupts are per-hart and defined/controlled by RISC-V
> ISA using mstatus/mip/sip registers. For example, if you're going to
> implement interrupts-based UART driver (platform/BSP specific), you'll
> need global/external interrupts hence PLIC. On the other hand, when
> you implement timer driver, you'll use local interrupts (RISC-V/ISA
> > --
> > Regards, Denis Obrezkov
Yes, thanks, I found the answer for my question -
when a PLIC interrupt occurs, it raises a global interrupt, which has the
code of eleven (E31-Coreplex Manual, 6.2). Thus, we should place our global
interrupts' handler with the offset of 0x2c.
Regards, Denis Obrezkov
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