Beaglebone Black FDT issue

[Sichen Zhao]

Hi all,
I have a issue about BBB FDT: I add " bl bsp_fdt_copy " in c/src/lib/libbsp/arm/shared/start/start.S,  when my test exe(modify the testsuites/libtests/libfdt01) boot,  came out a error: data abort.

Boot output error info:

data abort                                                                      
pc : [<80000df0>]          lr : [<8000004c>]                                    
sp : 9f62a960  ip : ffffffff     fp : 9f7a34ec                                  
r10: 00000000  r9 : 9f62af28     r8 : 9f633714                                  
r7 : 00000000  r6 : 88000000     r5 : 00000e05  r4 : 800158ac                   
r3 : 0002ad24  r2 : 88000000     r1 : 00000e05  r0 : 00000000                   
Flags: nzcv  IRQs off  FIQs on  Mode SVC_32                                     
Resetting CPU ...                                                               
                                                                                
resetting ...     



I set the BSP_FDT_BLOB_SIZE_MAX 262144 bytes.

I disassemble my test binary and take a look at the start.S, the info show below:

80000040 <_start>:
        /*
         * We do not save the context since we do not return to the boot
         * loader but preserve r1 and r2 to allow access to bootloader parameters
         */
#ifndef BSP_START_NEEDS_REGISTER_INITIALIZATION
        mov     r5, r1          /* machine type number or ~0 for DT boot */
80000040:       e1a05001        mov     r5, r1
        mov     r6, r2          /* physical address of ATAGs or DTB */
80000044:       e1a06002        mov     r6, r2
#else /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
        bl bsp_start_init_registers_core
#endif

#ifdef U_BOOT_USE_FDT
        bl bsp_fdt_copy
80000048:       eb00035b        bl      80000dbc <bsp_fdt_copy>
        /* Calculate stack offset */
        ldr     r1, =bsp_stack_all_size
        mul     r1, r0
#endif


void bsp_fdt_copy(const void *src)
{
80000dbc:       e92d4010        push    {r4, lr}
  const uint32_t *s = (const uint32_t *) src;
#ifdef BSP_FDT_BLOB_READ_ONLY
  uint32_t *d = (uint32_t *) ((uintptr_t) &bsp_fdt_blob[0]
    - (uintptr_t) bsp_section_rodata_begin
    + (uintptr_t) bsp_section_rodata_load_begin);
80000dc0:       e30538ac        movw    r3, #22700      ; 0x58ac
80000dc4:       e3054478        movw    r4, #21624      ; 0x5478
80000dc8:       e3483001        movt    r3, #32769      ; 0x8001
80000dcc:       e3484001        movt    r4, #32769      ; 0x8001
80000dd0:       e0833004        add     r3, r3, r4
80000dd4:       e3054478        movw    r4, #21624      ; 0x5478
80000dd8:       e3484001        movt    r4, #32769      ; 0x8001
80000ddc:       e0434004        sub     r4, r3, r4
#else
  uint32_t *d = &bsp_fdt_blob[0];
#endif

  if (s != d) {
80000de0:       e1500004        cmp     r0, r4
80000de4:       08bd8010        popeq   {r4, pc}
    uint32_t m = MIN(sizeof(bsp_fdt_blob), fdt_totalsize(src));
80000de8:       e5903004        ldr     r3, [r0, #4]
80000dec:       e3082698        movw    r2, #34456      ; 0x8698
        return (__force fdt16_t)CPU_TO_FDT16(x);
}

static inline uint32_t fdt32_to_cpu(fdt32_t x)
{
        return (__force uint32_t)CPU_TO_FDT32(x);
80000df0:       e7e7e453        ubfx    lr, r3, #8, #8
80000df4:       e7e7c853        ubfx    ip, r3, #16, #8
80000df8:       e1a01c23        lsr     r1, r3, #24
80000dfc:       e1811c03        orr     r1, r1, r3, lsl #24
80000e00:       e181180e        orr     r1, r1, lr, lsl #16
80000e04:       e181140c        orr     r1, r1, ip, lsl #8
80000e08:       e1510002        cmp     r1, r2
80000e0c:       21a01002        movcs   r1, r2
    uint32_t n = (m + sizeof(*d) - 1) / sizeof(*d);
80000e10:       e2812003        add     r2, r1, #3
    uint32_t i;

   for (i = 0; i < n; ++i) {
80000e14:       e1b02122        lsrs    r2, r2, #2
80000e18:       0a000007        beq     80000e3c <bsp_fdt_copy+0x80>
80000e1c:       e0802102        add     r2, r0, r2, lsl #2
80000e20:       e1a03000        mov     r3, r0
80000e24:       e0440000        sub     r0, r4, r0
80000e28:       e080c003        add     ip, r0, r3
      d[i] = s[i];
80000e2c:       e493e004        ldr     lr, [r3], #4
    for (i = 0; i < n; ++i) {
80000e30:       e1530002        cmp     r3, r2
      d[i] = s[i];
80000e34:       e58ce000        str     lr, [ip]
    for (i = 0; i < n; ++i) {
80000e38:       1afffffa        bne     80000e28 <bsp_fdt_copy+0x6c>
    }

    rtems_cache_flush_multiple_data_lines(d, m);
80000e3c:       e1a00004        mov     r0, r4
  }
}
80000e40:       e8bd4010        pop     {r4, lr}
    rtems_cache_flush_multiple_data_lines(d, m);
80000e44:       ea000027        b       80000ee8 <rtems_cache_flush_multiple_data_lines>



Best Regards
Sichen Zhao