Status of smptests ...?

[Jiri Gaisler]

What is the status of the smptests of RTEMS 5 ?

I have added SMP capability to the sis simulator, and have tested it
with the smptests from rtems git. I have noticed that the reference
output (*.scn) are not equivalent to what the simulator or real hardware
outputs. It seems that the cpus are numbered backwards compared to the
.scn files.

For instance, smp01.scn is:

***  SMP01 TEST ***
CPU 0 start task TA1
CPU 1 running Task TA1
CPU 0 start task TA2
CPU 2 running Task TA2
CPU 0 start task TA3
CPU 3 running Task TA3
*** END OF SMP 01 TEST ***

while real leon3 hardware and sis gives:

*** BEGIN OF TEST SMP 1 ***
*** TEST VERSION: 5.0.0.b7a1f9efadd928cda0f56123a1b6245b30b076fc
*** TEST STATE: EXPECTED-PASS
*** TEST BUILD: RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP
*** TEST TOOLS: 7.4.0 20181206 (RTEMS 5, RSB
b4e80fb8e29c47fa970b5cdb815c26f1af4fd173, Newlib
2ab57ad59bc35dafffa69cd4da5e228971de069f)
 CPU 3 start task TA0
 CPU 2 running Task TA0
 CPU 3 start task TA1
 CPU 1 running Task TA1
 CPU 3 start task TA2
 CPU 0 running Task TA2

*** END OF TEST SMP 1 ***

Also, some tests (e.g. smp03) runs on the simulator but actually crashes
on real hardware.

When and how were the .scn generated? Has there been some changes in
processor scheduling since the .scn files were generated?

 I have built the compiler and RTEMS from latest git, and configured
RTEMS with :

 --target=sparc-rtems5 --prefix=/opt/rtems/5 --enable-tests --enable-smp
--enable-rtemsbsp=leon3


Jiri.