Status of smptests ...?
sebastian.huber at embedded-brains.de
Tue Dec 11 14:47:36 UTC 2018
On 11/12/2018 15:42, Jiri Gaisler wrote:
> On 12/11/18 3:24 PM, Sebastian Huber wrote:
>> Hello Jiri,
>> On 11/12/2018 15:15, Jiri Gaisler wrote:
>>> What is the status of the smptests of RTEMS 5 ?
>>> I have added SMP capability to the sis simulator, and have tested it
>>> with the smptests from rtems git. I have noticed that the reference
>>> output (*.scn) are not equivalent to what the simulator or real hardware
>>> outputs. It seems that the cpus are numbered backwards compared to the
>>> .scn files.
>> the .scn files are not up to date. Also the test output is quite test
>> dependent and repeated test runs my produce different output.
>> The best method to check if a test passed is to check if the
>> *** END OF TEST XYZ ***
>> message is printed. Which real target did you use to run the tests? I
>> will do a test run tomorrow on a N2X.
> My hardware setup is a Pender XC6S FPGA board with a 4-core leon3 design
> compiled from the latest public leon3/grlib VHDL sources. The hardware
> does not have an FPU at the moment which might be why some tests are
> failing - I will investigate...
With this you should get rid of the FPU usage:
diff --git a/bsps/sparc/leon3/config/leon3.cfg b/bsps/sparc/leon3/config/leon3.cfg
index d931d6c5f1..e3eca059ec 100644
@@ -8,7 +8,7 @@ RTEMS_CPU=sparc
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
-CPU_CFLAGS = -mcpu=leon3
+CPU_CFLAGS = -mcpu=leon3 -msoft-float
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
Sebastian Huber, embedded brains GmbH
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