[PATCH v3 2/3] Add ARM Paravirtualization support

[Sebastian Huber]

----- Am 21. Feb 2018 um 21:07 schrieb joel joel at rtems.org:

> Closes #3305.
> ---
> cpukit/score/cpu/arm/cpu_asm.S                     |  5 +-
> cpukit/score/cpu/arm/include/rtems/score/cpu.h     |  6 ++
> .../score/cpu/arm/include/rtems/score/paravirt.h   | 75 ++++++++++++++++++++++
> cpukit/score/cpu/arm/include/rtems/score/types.h   |  3 +
> 4 files changed, 88 insertions(+), 1 deletion(-)
> create mode 100644 cpukit/score/cpu/arm/include/rtems/score/paravirt.h
> 
> diff --git a/cpukit/score/cpu/arm/cpu_asm.S b/cpukit/score/cpu/arm/cpu_asm.S
> index f58b99d..214e67d 100644
> --- a/cpukit/score/cpu/arm/cpu_asm.S
> +++ b/cpukit/score/cpu/arm/cpu_asm.S
> @@ -111,9 +111,12 @@ DEFINE_FUNCTION_ARM(_CPU_Context_switch)
> #endif
> 
> #ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
> +  #if defined(CPU_ARM_USE_USER_ACCESSIBLE_THREAD_ID_REGISTER)
> +	mcr	p15, 0, r3, c13, c0, 2
> +  #else
> 	mcr	p15, 0, r3, c13, c0, 3
> +  #endif
> #endif
> -

Why remove this line?

> 	str	r4, [r2, #PER_CPU_ISR_DISPATCH_DISABLE]
> 
> 	/* In ARMv5T and above the load of PC is an interworking branch */
[...]
> +/**
> + * In a paravirtualized environment, RTEMS executes in user space
> + * and cannot write to the the Thread ID register which is normally
> + * used. CP15 C13 has three variants of a Thread ID register.
> + *
> + * - Opcode_2 = 2: This register is both user and privileged R/W accessible.
> + * - Opcode_2 = 3: This register is user read-only and privileged
> + *   R/W accessible.
> + * - Opcode_2 = 4: This register is privileged R/W accessible only.
> + */
> +#define CPU_ARM_USE_USER_ACCESSIBLE_THREAD_ID_REGISTER

How did you convince GCC that it should use the TPIDRURW?