[PATCH 10/17] bsp/riscv: Format start.S
Sebastian Huber
sebastian.huber at embedded-brains.de
Fri Jun 22 11:59:07 UTC 2018
Use tabs to match the GCC generated assembler output. Use local labels.
Update #3433.
---
bsps/riscv/riscv/start/start.S | 73 ++++++++++++++++++++++--------------------
1 file changed, 38 insertions(+), 35 deletions(-)
diff --git a/bsps/riscv/riscv/start/start.S b/bsps/riscv/riscv/start/start.S
index 1ed46f07e4..62aa3b063a 100644
--- a/bsps/riscv/riscv/start/start.S
+++ b/bsps/riscv/riscv/start/start.S
@@ -1,4 +1,6 @@
/*
+ * Copyright (c) 2018 embedded brains GmbH.
+ *
* Copyright (c) 2015 University of York.
* Hesham Almatary <hesham at alumni.york.ac.uk>
*
@@ -26,6 +28,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
+
#include <bsp/linker-symbols.h>
#include <rtems/score/riscv-utility.h>
#include <rtems/score/cpu.h>
@@ -40,48 +43,48 @@ PUBLIC(bsp_start_vector_table_begin)
PUBLIC(bsp_start_vector_table_end)
PUBLIC(_start)
-.section .bsp_start_text, "wax"
+ .section .bsp_start_text, "ax", @progbits
TYPE_FUNC(_start)
SYM(_start):
- la t0, ISR_Handler
- csrw mtvec, t0
+ la t0, ISR_Handler
+ csrw mtvec, t0
- /* load stack and frame pointers */
- la sp, _Configuration_Interrupt_stack_area_end
+ /* load stack and frame pointers */
+ la sp, _Configuration_Interrupt_stack_area_end
- /* Clearing .bss */
- la t0, bsp_section_bss_begin
- la t1, bsp_section_bss_end
+ /* Clearing .bss */
+ la t0, bsp_section_bss_begin
+ la t1, bsp_section_bss_end
-_loop_clear_bss:
- bge t0, t1, _end_clear_bss
- SREG x0, 0(t0)
- addi t0, t0, CPU_SIZEOF_POINTER
- j _loop_clear_bss
-_end_clear_bss:
+.Lclear_bss_loop:
+ bge t0, t1, .Lclear_bss_end
+ SREG x0, 0(t0)
+ addi t0, t0, CPU_SIZEOF_POINTER
+ j .Lclear_bss_loop
+.Lclear_bss_end:
- /* Init FPU unit if it's there */
- li t0, MSTATUS_FS
- csrs mstatus, t0
+ /* Init FPU unit if it's there */
+ li t0, MSTATUS_FS
+ csrs mstatus, t0
- j boot_card
+ j boot_card
- .align 4
+ .align 4
bsp_start_vector_table_begin:
- .word _RISCV_Exception_default /* User int */
- .word _RISCV_Exception_default /* Supervisor int */
- .word _RISCV_Exception_default /* Reserved */
- .word _RISCV_Exception_default /* Machine int */
- .word _RISCV_Exception_default /* User timer int */
- .word _RISCV_Exception_default /* Supervisor Timer int */
- .word _RISCV_Exception_default /* Reserved */
- .word _RISCV_Exception_default /* Machine Timer int */
- .word _RISCV_Exception_default /* User external int */
- .word _RISCV_Exception_default /* Supervisor external int */
- .word _RISCV_Exception_default /* Reserved */
- .word _RISCV_Exception_default /* Machine external int */
- .word _RISCV_Exception_default
- .word _RISCV_Exception_default
- .word _RISCV_Exception_default
- .word _RISCV_Exception_default
+ .word _RISCV_Exception_default /* User int */
+ .word _RISCV_Exception_default /* Supervisor int */
+ .word _RISCV_Exception_default /* Reserved */
+ .word _RISCV_Exception_default /* Machine int */
+ .word _RISCV_Exception_default /* User timer int */
+ .word _RISCV_Exception_default /* Supervisor Timer int */
+ .word _RISCV_Exception_default /* Reserved */
+ .word _RISCV_Exception_default /* Machine Timer int */
+ .word _RISCV_Exception_default /* User external int */
+ .word _RISCV_Exception_default /* Supervisor external int */
+ .word _RISCV_Exception_default /* Reserved */
+ .word _RISCV_Exception_default /* Machine external int */
+ .word _RISCV_Exception_default
+ .word _RISCV_Exception_default
+ .word _RISCV_Exception_default
+ .word _RISCV_Exception_default
bsp_start_vector_table_end:
--
2.13.7
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