[PATCH 05/17] bsp/riscv: Add new BSP variants

Sebastian Huber sebastian.huber at embedded-brains.de
Fri Jun 22 11:59:02 UTC 2018


The latest RISC-V tool chain introduced new multilib variants. Add
corresponding BSP variants.

Update #3433.
---
 bsps/riscv/riscv/config/rv32imafd.cfg         | 9 +++++++++
 bsps/riscv/riscv/config/rv64imac_medany.cfg   | 9 +++++++++
 bsps/riscv/riscv/config/rv64imafd.cfg         | 9 +++++++++
 bsps/riscv/riscv/config/rv64imafd_medany.cfg  | 9 +++++++++
 bsps/riscv/riscv/config/rv64imafdc_medany.cfg | 9 +++++++++
 5 files changed, 45 insertions(+)
 create mode 100644 bsps/riscv/riscv/config/rv32imafd.cfg
 create mode 100644 bsps/riscv/riscv/config/rv64imac_medany.cfg
 create mode 100644 bsps/riscv/riscv/config/rv64imafd.cfg
 create mode 100644 bsps/riscv/riscv/config/rv64imafd_medany.cfg
 create mode 100644 bsps/riscv/riscv/config/rv64imafdc_medany.cfg

diff --git a/bsps/riscv/riscv/config/rv32imafd.cfg b/bsps/riscv/riscv/config/rv32imafd.cfg
new file mode 100644
index 0000000000..471f5ee2a6
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv32imafd.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv32imafd -mabi=ilp32d
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imac_medany.cfg b/bsps/riscv/riscv/config/rv64imac_medany.cfg
new file mode 100644
index 0000000000..f7ab9ff7b4
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imac_medany.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imac -mabi=lp64 -mcmodel=medany
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imafd.cfg b/bsps/riscv/riscv/config/rv64imafd.cfg
new file mode 100644
index 0000000000..29324a1edd
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imafd.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imafd -mabi=lp64d
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imafd_medany.cfg b/bsps/riscv/riscv/config/rv64imafd_medany.cfg
new file mode 100644
index 0000000000..c43cd4fd32
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imafd_medany.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imafd -mabi=lp64d -mcmodel=medany
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
diff --git a/bsps/riscv/riscv/config/rv64imafdc_medany.cfg b/bsps/riscv/riscv/config/rv64imafdc_medany.cfg
new file mode 100644
index 0000000000..b04e78b0e9
--- /dev/null
+++ b/bsps/riscv/riscv/config/rv64imafdc_medany.cfg
@@ -0,0 +1,9 @@
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = riscv
+
+CPU_CFLAGS = -march=rv64imafdc -mabi=lp64d -mcmodel=medany
+
+LDFLAGS = -Wl,--gc-sections
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
-- 
2.13.7




More information about the devel mailing list