[PATCH 13/17] riscv: Implement _CPU_ISR_Get_level()
Sebastian Huber
sebastian.huber at embedded-brains.de
Fri Jun 22 11:59:10 UTC 2018
Fix prototypes.
Update #3433.
---
cpukit/score/cpu/riscv/cpu.c | 12 +++++-------
cpukit/score/cpu/riscv/include/rtems/score/cpu.h | 7 +++++--
2 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/cpukit/score/cpu/riscv/cpu.c b/cpukit/score/cpu/riscv/cpu.c
index fbdb4c5238..7c14a8bffd 100644
--- a/cpukit/score/cpu/riscv/cpu.c
+++ b/cpukit/score/cpu/riscv/cpu.c
@@ -59,15 +59,13 @@ void _CPU_Initialize(void)
/* Do nothing */
}
-void _CPU_ISR_Set_level(unsigned long level)
+uint32_t _CPU_ISR_Get_level( void )
{
- /* Do nothing */
-}
+ if ( _CPU_ISR_Is_enabled( read_csr( mstatus ) ) ) {
+ return 0;
+ }
-unsigned long _CPU_ISR_Get_level( void )
-{
- /* Do nothing */
- return 0;
+ return 1;
}
void _CPU_ISR_install_raw_handler(
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
index b2efff8a65..83686267fb 100644
--- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
@@ -187,9 +187,12 @@ RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( unsigned long level )
return ( level & MSTATUS_MIE ) != 0;
}
-void _CPU_ISR_Set_level( unsigned long level );
+RTEMS_INLINE_ROUTINE void _CPU_ISR_Set_level( uint32_t level )
+{
+ (void) level;
+}
-unsigned long _CPU_ISR_Get_level( void );
+uint32_t _CPU_ISR_Get_level( void );
/* end of ISR handler macros */
--
2.13.7
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