GSoC 2018 (x86_64, pc386, SMP improvements, rump kernels)

[Sebastian Huber]

On 10/03/18 18:02, Amaan Cheval wrote:
> - Improve RTEMS SMP[3]
>
> What kinds of improvements to SMP are we considering?

The SMP support is quite complete now. In general, an independent review 
is required, but this is probably not a GSoC project. Some areas in the 
implementation are a bit too complex (e.g. thread lock) and should be 
simplified, however, I guess this is a very difficult task.

A formal specification using TLA+ for the OMIP and MrsP locking 
protocols would be nice.

https://en.wikipedia.org/wiki/TLA%2B

A proper strong APA scheduler:

https://devel.rtems.org/ticket/2510

I am not sure if there is a real application demand for this.

> As noted earlier, SMP
> support on i386 is lagging. Is there any interest in bringing that up to
> par with the other architectures?

I think this makes only sense for a x86_64 BSP.

 From an application developer point of view a ready to use tracing of 
thread context switches and interrupts would be nice. Some kind of data 
provider for the lttng-relayd (LTTng 2 relay daemon)

https://lttng.org/docs/v2.10/#doc-lttng-relayd

Which can be used by

https://projects.eclipse.org/projects/tools.tracecompass

-- 
Sebastian Huber, embedded brains GmbH

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