ARM cp15 c1 control on the BBB at _start

[Sebastian Huber]

On 05/03/18 23:12, Chris Johns wrote:
> Note, the Zynq does not clear the A flag in it's specific MMU set up call so
> does it assume the boot loader will clear it?
>
> Why not clear the A flag and remove any restrictions and try and make the BSPs
> consistent?

A set SCTLR[A] bit after initialization (in thread/interrupt context) is 
a bug.

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.huber at embedded-brains.de
PGP     : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.