RISC-V tool chain

Sebastian Huber sebastian.huber at embedded-brains.de
Mon May 28 09:38:48 UTC 2018


On 28/05/18 11:14, Hesham Almatary wrote:
> On Mon, May 28, 2018 at 6:23 AM, Sebastian Huber
> <sebastian.huber at embedded-brains.de>  wrote:
>> Hello,
>>
>> we currently have a riscv32-rtems* and riscv64-rtems* tool chain. However,
>> the RISC-V GCC is a bi-arch compiler, e.g. we have
>>
>> riscv32-rtems5-gcc --print-multi-lib
>> .;
>> rv32i/ilp32;@march=rv32i at mabi=ilp32
>> rv32im/ilp32;@march=rv32im at mabi=ilp32
>> rv32iac/ilp32;@march=rv32iac at mabi=ilp32
>> rv32imac/ilp32;@march=rv32imac at mabi=ilp32
>> rv32imafc/ilp32f;@march=rv32imafc at mabi=ilp32f
>> rv64imac/lp64;@march=rv64imac at mabi=lp64
>> rv64imafdc/lp64d;@march=rv64imafdc at mabi=lp64d
>>
>> riscv64-rtems5-gcc --print-multi-lib
>> .;
>> rv32i/ilp32;@march=rv32i at mabi=ilp32
>> rv32im/ilp32;@march=rv32im at mabi=ilp32
>> rv32iac/ilp32;@march=rv32iac at mabi=ilp32
>> rv32imac/ilp32;@march=rv32imac at mabi=ilp32
>> rv32imafc/ilp32f;@march=rv32imafc at mabi=ilp32f
>> rv64imac/lp64;@march=rv64imac at mabi=lp64
>> rv64imafdc/lp64d;@march=rv64imafdc at mabi=lp64d
>>
>> The only difference is the default ISA.
>>
>> I suggest to merge the two tool chains into one riscv-rtems* variant.
>>
> We can get rid of riscv32* and just use riscv64* to build 32-bit
> RTEMS. The question is whether it's easy/feasible to have just
> "riscv-rtems*" toolchain (i.e. without 32 or 64 suffixes ), from
> gcc/source-builder.

I try currently a different direction. I use custom multilibs and 
changed the default cmodel to medany for the 64-bit variants. See 
attached patch.

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
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