[PATCH] bsps/riscv: Rename riscv_generic to riscv32_generic and add compiler flags

[Hesham Almatary]

On Mon, May 28, 2018 at 12:01 PM, Sebastian Huber
<sebastian.huber at embedded-brains.de> wrote:
> On 28/05/18 12:02, Hesham Almatary wrote:
>>
>> On Mon, May 28, 2018 at 10:55 AM, Sebastian Huber
>> <sebastian.huber at embedded-brains.de> wrote:
>>>
>>> On 28/05/18 11:47, Hesham Almatary wrote:
>>>>
>>>> This makes it explicitly 32-bit. Compiler flags are needed if built with
>>>> a non riscv32-* toolchain (e.g. riscv64-* with multilib).
>>>
>>>
>>> I would like to rename the BSPs to use the ISA name, e.g. rv32imac,
>>> rv64imafdc, etc. I also would like to add support for Qemu and use the
>>> device tree for the driver initialization (clock, console, interrupt
>>> controller).
>>
>> Sounds good. Are you working on that?
>
Great! Please discard my latest rename patch then if it duplicates
with what your local-WIP changes.

>
> Yes:
>
> https://devel.rtems.org/ticket/3433
>
> We need also floating-point support.
>
>>
>> This should make them a bit more generic. Does the spike
>>>
>>> simulator provide a device tree?
>>>
>> Yes it does.
>
>
> Ok, good. I will try to install this simulator as well.
>
>
> --
> Sebastian Huber, embedded brains GmbH
>
> Address : Dornierstr. 4, D-82178 Puchheim, Germany
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> E-Mail  : sebastian.huber at embedded-brains.de
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>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>



-- 
Hesham