GSoC 2019: POSIX Compliance - FENV Environment probably not working properly in RISCV

Vaibhav Gupta vaibhavgupta40 at gmail.com
Wed Aug 14 12:34:42 UTC 2019


Hello
I get following errors:
=========================================================
$ riscv-rtems5-sis -riscv -nouartrx -gdb

 SIS - SPARC/RISCV instruction simulator 2.13,  copyright Jiri Gaisler 2019
 Bug-reports to jiri at gaisler.se

unknown option -riscv
usage: sis [-uart1 uart_device1] [-uart2 uart_device2]
[-m <n>] [-dumbio] [-v]
[-nfp] [-freq frequency] [-c batch_file] [files]
=========================================================
$ riscv-rtems5-sis -gdb

 SIS - SPARC/RISCV instruction simulator 2.13,  copyright Jiri Gaisler 2019
 Bug-reports to jiri at gaisler.se

unknown option -gdb
usage: sis [-uart1 uart_device1] [-uart2 uart_device2]
[-m <n>] [-dumbio] [-v]
[-nfp] [-freq frequency] [-c batch_file] [files]
=========================================================

Vaibhav Gupta

On Wed, Aug 14, 2019 at 5:14 PM Joel Sherrill <joel at rtems.org> wrote:

> Thank you.
>
> Do you see anything wrong with the riscv fenv implementation? His program
> runs under Linux and hangs on both Qemu and sis.
>
> On Wed, Aug 14, 2019, 2:18 AM Jiri Gaisler <jiri at gaisler.se> wrote:
>
>> I have attached the sis manual. Page 17:
>>
>> "SIS can be connected to gdb through a network socket using the gdb remote interface.
>> Either start SIS with -gdb, or issue the ’gdb’ command inside SIS, and connect gdb with
>> ’target extended-remote localhost:1234’. The port can be changed using the -port option."
>>
>> You still need all other options, so to start on a windows host do:
>>
>> $ riscv-rtems-sis -riscv -nouartrx -gdb
>>
>> To start gdb, do:
>>
>> $ riscv-rtems-gdb app.exe
>>
>> (gdb) target extended-remote localhost:1234
>>
>> (gdb) load
>>
>> (gdb) run
>>
>> To re-run the application, issue a new load command first.
>>
>> Regards, Jiri.
>>
>> On 8/14/19 12:37 AM, Vaibhav Gupta wrote:
>>
>>
>>
>> On Wed, Aug 14, 2019 at 4:04 AM Joel Sherrill <joel at rtems.org> wrote:
>>
>>>
>>>
>>> On Tue, Aug 13, 2019 at 5:09 PM Vaibhav Gupta <vaibhavgupta40 at gmail.com>
>>> wrote:
>>>
>>>>
>>>>
>>>> On Mon, Aug 12, 2019 at 11:50 PM Joel Sherrill <joel at rtems.org> wrote:
>>>>
>>>>> Can you post or email me privately the full patch? I can try to see
>>>>> what I spot.
>>>>>
>>>> I have sent you the patch.
>>>>
>>>>>
>>>>> Can you check with objdump or gdb that the methods which don't appear
>>>>> to work
>>>>> are actually the RISC-V implementation? Look at the disassembly and
>>>>> see if it
>>>>> looks like you expect.
>>>>>
>>>> I am exploring for this.
>>>>
>>>
>>> Since I don't know how to attach gdb to the new sis for griscv, I
>>> emailed Jiri privately.
>>> Your program works as expected on Linux. Perhaps Jiri has some advice
>>> for my
>>> debugging setup ignorance and fenv on RISC-V.
>>>
>> Okay, I will wait. Till then I can work with porting for other
>> architecture. :)
>>
>>>
>>> Do you happen to have fenv support for another architecture queued up?
>>> It would be
>>> interesting to see if it works on other targets.
>>>
>> Yup, they were in my to do list. Till testsuite method is solved, I will
>> work on them now.
>>
>> - Vaibhav Gupta
>>
>>>
>>> --joel
>>>
>>>
>>>>
>>>> - Vaibhav Gupta
>>>>
>>>>>
>>>>> Does this require a patch to newlib as well?
>>>>>
>>>>> --joel
>>>>>
>>>>> On Sun, Aug 11, 2019 at 10:49 AM Vaibhav Gupta <
>>>>> vaibhavgupta40 at gmail.com> wrote:
>>>>>
>>>>>> Configure command I used to build BSP:
>>>>>> ==============================================
>>>>>> $ /home/varodek/development/rtems/kernel/rtems/configure
>>>>>> --prefix=/home/varodek/development/rtems/5 --enable-maintainer-mode
>>>>>> --target=riscv-rtems5 --enable-rtemsbsp=rv32imac --enable-tests
>>>>>> --enable-posix --disable-networking --enable-cxx RISCV_ENABLE_HTIF_SUPPORT=1
>>>>>> ==============================================
>>>>>> .
>>>>>> .
>>>>>> .
>>>>>> .
>>>>>> Qemu command I used to run test:
>>>>>> ==============================================
>>>>>> $ qemu-system-riscv32 -no-reboot -nographic -machine virt -m 256M
>>>>>> -kernel psxfenv01.exe
>>>>>> ==============================================
>>>>>> .
>>>>>> .
>>>>>> .
>>>>>> .
>>>>>> Makefile.am
>>>>>> ==============================================
>>>>>> + if TEST_psxfenv01
>>>>>> + psx_tests += psxfenv01
>>>>>> + psxfenv01_SOURCES = psxfenv01/init.c
>>>>>> + psxfenv01_CPPFLAGS = $(AM_CPPFLAGS) $(TEST_FLAGS_psxfenv01) \
>>>>>> +       $(support_includes)
>>>>>> + psxfenv01_LDADD = -lm $(LDADD)
>>>>>> + endif
>>>>>> +
>>>>>> ==============================================
>>>>>>
>>>>>> On Sun, Aug 11, 2019 at 8:36 PM Vaibhav Gupta <
>>>>>> vaibhavgupta40 at gmail.com> wrote:
>>>>>>
>>>>>>> My code of testsuite:
>>>>>>> ===============================================
>>>>>>>   /* Test 'FE_DIVBYZERO' */
>>>>>>>   puts( "\nDivide by zero and confirm fetestexcept()." );
>>>>>>>   a = 0.0;
>>>>>>>   b = 1.0;
>>>>>>>   c = b/a;
>>>>>>>   printf("\n%d",FE_DIVBYZERO);
>>>>>>>   fegetexceptflag(&excepts,FE_ALL_EXCEPT);
>>>>>>>   printf("\n%d",excepts);
>>>>>>>   r = feraiseexcept(FE_DIVBYZERO);
>>>>>>>   printf("\n%d\n",r);
>>>>>>>   rtems_test_assert( fetestexcept( FE_DIVBYZERO ) );
>>>>>>> ==============================================
>>>>>>> OUTPUT
>>>>>>> ==============================================
>>>>>>> Divide by zero and confirm fetestexcept().
>>>>>>>
>>>>>>> 8
>>>>>>> 0
>>>>>>> 1
>>>>>>> /home/varodek/development/rtems/kernel/rtems/c/src/../../testsuites/psxtests/psxfenv01/init.c:
>>>>>>> 84 fetestexcept( FE_DIVBYZERO )
>>>>>>> ==============================================
>>>>>>> EXPECTED OUTPUT
>>>>>>> ==============================================
>>>>>>> Divide by zero and confirm fetestexcept().
>>>>>>>
>>>>>>> 8
>>>>>>> 8
>>>>>>> 0
>>>>>>> ==============================================
>>>>>>> - fetestexcept( FE_DIVBYZERO ), should return a non-zero value as
>>>>>>> division-by-zero was performed.
>>>>>>> .
>>>>>>> - feraiseexcept(FE_DIVBYZERO); is also not working. It should return
>>>>>>> zero when successful
>>>>>>> .
>>>>>>> ==============================================
>>>>>>>
>>>>>>> Thank You
>>>>>>> Vaibhav Gupta
>>>>>>>
>>>>>>> _______________________________________________
>>>>>> devel mailing list
>>>>>> devel at rtems.org
>>>>>> http://lists.rtems.org/mailman/listinfo/devel
>>>>>
>>>>>
>> _______________________________________________
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>>
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>
>
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