Break points with latest SIS

[Sebastian Huber]

On 07/02/2019 12:43, Jiri Gaisler wrote:
> Works OK here:
>
> $ sparc-rtems5-sis -leon3 -nouartrx -r -tlim 200 s -m 4  ./sparc-rtems5/c/leon3/testsuites/smptests/smpswitchextension01.exe
>
>   SIS - SPARC/RISCV instruction simulator 2.11,  copyright Jiri Gaisler 1995
>   Bug-reports to jiri at gaisler.se
>
>   LEON3 emulation enabled, 4 cpus online, delta 50 clocks
>
>
>
> *** BEGIN OF TEST SMPSWITCHEXTENSION 1 ***
> *** TEST VERSION: 5.0.0.03fcbb15d24e2eec41bac9f5dee30bbf7dc888b8-modified
> *** TEST STATE: EXPECTED-PASS
> *** TEST BUILD: RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP

I used --enable-rtems-debug:

*** TEST BUILD: RTEMS_DEBUG RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP

-- 
Sebastian Huber, embedded brains GmbH

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