[PATCH] bsps/beagle: Remove dead code from GPIO.

Gedare Bloom gedare at rtems.org
Tue Jul 30 21:56:58 UTC 2019


fine with me

On Tue, Jul 30, 2019 at 1:14 PM <list at c-mauderer.de> wrote:
>
> From: Christian Mauderer <christian.mauderer at embedded-brains.de>
>
> Remove static stuff that is never used.
> ---
>  bsps/arm/beagle/gpio/bbb-gpio.c | 133 --------------------------------
>  1 file changed, 133 deletions(-)
>
> diff --git a/bsps/arm/beagle/gpio/bbb-gpio.c b/bsps/arm/beagle/gpio/bbb-gpio.c
> index 8532f544ab..bd081fae5a 100644
> --- a/bsps/arm/beagle/gpio/bbb-gpio.c
> +++ b/bsps/arm/beagle/gpio/bbb-gpio.c
> @@ -47,139 +47,6 @@ static const rtems_vector_number gpio_bank_vector[] =
>         AM335X_INT_GPIOINT2A,
>         AM335X_INT_GPIOINT3A };
>
> -/* Macro for the gpio pin not having control module offset mapping */
> -#define CONF_NOT_DEFINED 0x00000000
> -
> -/* Mapping of gpio pin nuber to the  Control module mapped register offset */
> -static const uint32_t gpio_pad_conf[GPIO_BANK_COUNT][BSP_GPIO_PINS_PER_BANK] =
> -{
> -  /* GPIO Module 0 */
> -  { CONF_NOT_DEFINED,             /* GPIO0[0] */
> -    CONF_NOT_DEFINED,             /* GPIO0[1] */
> -    AM335X_CONF_SPI0_SCLK,        /* GPIO0[2] */
> -    AM335X_CONF_SPI0_D0,          /* GPIO0[3] */
> -    AM335X_CONF_SPI0_D1,          /* GPIO0[4] */
> -    AM335X_CONF_SPI0_CS0,         /* GPIO0[5] */
> -    CONF_NOT_DEFINED,             /* GPIO0[6] */
> -    CONF_NOT_DEFINED,             /* GPIO0[7] */
> -    AM335X_CONF_LCD_DATA12,       /* GPIO0[8] */
> -    AM335X_CONF_LCD_DATA13,       /* GPIO0[9] */
> -    AM335X_CONF_LCD_DATA14,       /* GPIO0[10] */
> -    AM335X_CONF_LCD_DATA15,       /* GPIO0[11] */
> -    AM335X_CONF_UART1_CTSN,       /* GPIO0[12] */
> -    AM335X_CONF_UART1_RTSN,       /* GPIO0[13] */
> -    AM335X_CONF_UART1_RXD,        /* GPIO0[14] */
> -    AM335X_CONF_UART1_TXD,        /* GPIO0[15] */
> -    CONF_NOT_DEFINED,             /* GPIO0[16] */
> -    CONF_NOT_DEFINED,             /* GPIO0[17] */
> -    CONF_NOT_DEFINED,             /* GPIO0[18] */
> -    CONF_NOT_DEFINED,             /* GPIO0[19] */
> -    CONF_NOT_DEFINED,             /* GPIO0[20] */
> -    CONF_NOT_DEFINED,             /* GPIO0[21] */
> -    AM335X_CONF_GPMC_AD8,         /* GPIO0[22] */
> -    AM335X_CONF_GPMC_AD9,         /* GPIO0[23] */
> -    CONF_NOT_DEFINED,             /* GPIO0[24] */
> -    CONF_NOT_DEFINED,             /* GPIO0[25] */
> -    AM335X_CONF_GPMC_AD10,        /* GPIO0[26] */
> -    AM335X_CONF_GPMC_AD11,        /* GPIO0[27] */
> -    CONF_NOT_DEFINED,             /* GPIO0[28] */
> -    CONF_NOT_DEFINED,             /* GPIO0[29] */
> -    AM335X_CONF_GPMC_WAIT0,       /* GPIO0[30] */
> -    AM335X_CONF_GPMC_WPN          /* GPIO0[31] */ },
> -
> -  /* GPIO Module 1 */
> -  { AM335X_CONF_GPMC_AD0,         /* GPIO1[0] */
> -    AM335X_CONF_GPMC_AD1,         /* GPIO1[1] */
> -    AM335X_CONF_GPMC_AD2,         /* GPIO1[2] */
> -    AM335X_CONF_GPMC_AD3,         /* GPIO1[3] */
> -    AM335X_CONF_GPMC_AD4,         /* GPIO1[4] */
> -    AM335X_CONF_GPMC_AD5,         /* GPIO1[5] */
> -    AM335X_CONF_GPMC_AD6,         /* GPIO1[6] */
> -    AM335X_CONF_GPMC_AD7,         /* GPIO1[7] */
> -    CONF_NOT_DEFINED,             /* GPIO1[8] */
> -    CONF_NOT_DEFINED,             /* GPIO1[9] */
> -    CONF_NOT_DEFINED,             /* GPIO1[10] */
> -    CONF_NOT_DEFINED,             /* GPIO1[11] */
> -    AM335X_CONF_GPMC_AD12,        /* GPIO1[12] */
> -    AM335X_CONF_GPMC_AD13,        /* GPIO1[13] */
> -    AM335X_CONF_GPMC_AD14,        /* GPIO1[14] */
> -    AM335X_CONF_GPMC_AD15,        /* GPIO1[15] */
> -    AM335X_CONF_GPMC_A0,          /* GPIO1[16] */
> -    AM335X_CONF_GPMC_A1,          /* GPIO1[17] */
> -    AM335X_CONF_GPMC_A2,          /* GPIO1[18] */
> -    AM335X_CONF_GPMC_A3,          /* GPIO1[19] */
> -    CONF_NOT_DEFINED,             /* GPIO1[20] */
> -    CONF_NOT_DEFINED,             /* GPIO1[21] */
> -    CONF_NOT_DEFINED,             /* GPIO1[22] */
> -    CONF_NOT_DEFINED,             /* GPIO1[23] */
> -    CONF_NOT_DEFINED,             /* GPIO1[24] */
> -    CONF_NOT_DEFINED,             /* GPIO1[25] */
> -    CONF_NOT_DEFINED,             /* GPIO1[26] */
> -    CONF_NOT_DEFINED,             /* GPIO1[27] */
> -    AM335X_CONF_GPMC_BEN1,        /* GPIO1[28] */
> -    AM335X_CONF_GPMC_CSN0,        /* GPIO1[29] */
> -    AM335X_CONF_GPMC_CSN1,        /* GPIO1[30] */
> -    AM335X_CONF_GPMC_CSN2         /* GPIO1[31] */ },
> -
> -  /* GPIO Module 2 */
> -  { CONF_NOT_DEFINED,             /* GPIO2[0] */
> -    AM335X_CONF_GPMC_CLK,         /* GPIO2[1] */
> -    AM335X_CONF_GPMC_ADVN_ALE,    /* GPIO2[2] */
> -    AM335X_CONF_GPMC_OEN_REN,     /* GPIO2[3] */
> -    AM335X_CONF_GPMC_WEN,         /* GPIO2[4] */
> -    AM335X_CONF_GPMC_BEN0_CLE,    /* GPIO2[5] */
> -    AM335X_CONF_LCD_DATA0,        /* GPIO2[6] */
> -    AM335X_CONF_LCD_DATA1,        /* GPIO2[7] */
> -    AM335X_CONF_LCD_DATA2,        /* GPIO2[8] */
> -    AM335X_CONF_LCD_DATA3,        /* GPIO2[9] */
> -    AM335X_CONF_LCD_DATA4,        /* GPIO2[10] */
> -    AM335X_CONF_LCD_DATA5,        /* GPIO2[11] */
> -    AM335X_CONF_LCD_DATA6,        /* GPIO2[12] */
> -    AM335X_CONF_LCD_DATA7,        /* GPIO2[13] */
> -    AM335X_CONF_LCD_DATA8,        /* GPIO2[14] */
> -    AM335X_CONF_LCD_DATA9,        /* GPIO2[15] */
> -    AM335X_CONF_LCD_DATA10,       /* GPIO2[16] */
> -    AM335X_CONF_LCD_DATA11,       /* GPIO2[17] */
> -    CONF_NOT_DEFINED,             /* GPIO2[18] */
> -    CONF_NOT_DEFINED,             /* GPIO2[19] */
> -    CONF_NOT_DEFINED,             /* GPIO2[20] */
> -    CONF_NOT_DEFINED,             /* GPIO2[21] */
> -    AM335X_CONF_LCD_VSYNC,        /* GPIO2[22] */
> -    AM335X_CONF_LCD_HSYNC,        /* GPIO2[23] */
> -    AM335X_CONF_LCD_PCLK,         /* GPIO2[24] */
> -    AM335X_CONF_LCD_AC_BIAS_EN    /* GPIO2[25] */ },
> -
> -  /* GPIO Module 3 */
> -  { CONF_NOT_DEFINED,             /* GPIO3[0] */
> -    CONF_NOT_DEFINED,             /* GPIO3[1] */
> -    CONF_NOT_DEFINED,             /* GPIO3[2] */
> -    CONF_NOT_DEFINED,             /* GPIO3[3] */
> -    CONF_NOT_DEFINED,             /* GPIO3[4] */
> -    CONF_NOT_DEFINED,             /* GPIO3[5] */
> -    CONF_NOT_DEFINED,             /* GPIO3[6] */
> -    CONF_NOT_DEFINED,             /* GPIO3[7] */
> -    CONF_NOT_DEFINED,             /* GPIO3[8] */
> -    CONF_NOT_DEFINED,             /* GPIO3[9] */
> -    CONF_NOT_DEFINED,             /* GPIO3[10] */
> -    CONF_NOT_DEFINED,             /* GPIO3[11] */
> -    CONF_NOT_DEFINED,             /* GPIO3[12] */
> -    CONF_NOT_DEFINED,             /* GPIO3[13] */
> -    AM335X_CONF_MCASP0_ACLKX,     /* GPIO3[14] */
> -    AM335X_CONF_MCASP0_FSX,       /* GPIO3[15] */
> -    AM335X_CONF_MCASP0_AXR0,      /* GPIO3[16] */
> -    AM335X_CONF_MCASP0_AHCLKR,    /* GPIO3[17] */
> -    CONF_NOT_DEFINED,             /* GPIO3[18] */
> -    AM335X_CONF_MCASP0_FSR,       /* GPIO3[19] */
> -    CONF_NOT_DEFINED,             /* GPIO3[20] */
> -    AM335X_CONF_MCASP0_AHCLKX     /* GPIO3[21] */ }
> -};
> -
> -/* Get the address of Base Register + Offset for pad config */
> -uint32_t static inline bbb_conf_reg(uint32_t bank, uint32_t pin)
> -{
> -  return (AM335X_PADCONF_BASE + gpio_pad_conf[bank][pin]);
> -}
> -
>  /* Get the value of Base Register + Offset */
>  uint32_t static inline bbb_reg(uint32_t bank, uint32_t reg)
>  {
> --
> 2.22.0
>
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