[RSB PATCH 2/2] Build standalone sis for SPARC and RISC-V targets

[Jiri Gaisler]

---
 rtems/config/5/rtems-riscv.bset | 1 +
 rtems/config/5/rtems-sparc.bset | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/rtems/config/5/rtems-riscv.bset b/rtems/config/5/rtems-riscv.bset
index 99f0754..6e9de99 100644
--- a/rtems/config/5/rtems-riscv.bset
+++ b/rtems/config/5/rtems-riscv.bset
@@ -15,3 +15,4 @@ tools/rtems-binutils-2.32
 tools/rtems-gcc-9.1.0-newlib-5c2a3661c
 tools/rtems-tools-5-1
 tools/rtems-kernel-5
+devel/sis-2-1.cfg
diff --git a/rtems/config/5/rtems-sparc.bset b/rtems/config/5/rtems-sparc.bset
index 187d337..23ddaca 100644
--- a/rtems/config/5/rtems-sparc.bset
+++ b/rtems/config/5/rtems-sparc.bset
@@ -2,3 +2,5 @@
 %define rtems_arch sparc
 %define with_libgomp
 %include 5/rtems-default.bset
+devel/sis-2-1.cfg
+
-- 
2.17.1