[PATCH] arm: Select the TLB invalidate based on the core's Id variant.
Chris Johns
chrisj at rtems.org
Tue Jun 25 22:22:23 UTC 2019
On 25/6/19 9:59 pm, Sebastian Huber wrote:
> Can't you use the
>
> B4.1.94 ID_PFR1, Processor Feature Register 1, VMSA
>
> and test for the Virtualization Extensions?
This is a neater solution. Can I assume the ASID support part of the
virtualization extensions and op 3 is consistent?
>
> I am not sure if pre ARMv7-AR processors have this register.
>
It indicates the ID-ISA should help but I cannot see how to determine R vs A
from them.
Chris
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