[PATCH 1/2] riscv: preliminarily support for libdl
Hesham Almatary
Hesham.Almatary at cl.cam.ac.uk
Mon Nov 11 12:29:15 UTC 2019
Support for targets compiled with -fno-pic and -mno-relax
---
cpukit/configure.ac | 2 +-
cpukit/libdl/rtl-elf.h | 2 +-
cpukit/libdl/rtl-mdreloc-riscv.c | 435 ++++++++++++++++++
.../cpu/riscv/include/machine/elf_machdep.h | 144 ++++++
testsuites/libtests/configure.ac | 2 +-
5 files changed, 582 insertions(+), 3 deletions(-)
create mode 100644 cpukit/libdl/rtl-mdreloc-riscv.c
create mode 100644 cpukit/score/cpu/riscv/include/machine/elf_machdep.h
diff --git a/cpukit/configure.ac b/cpukit/configure.ac
index 5fd0f51d0f..1db9b047a2 100644
--- a/cpukit/configure.ac
+++ b/cpukit/configure.ac
@@ -307,7 +307,7 @@ AM_CONDITIONAL([RPCTOOLS],[test "$RPCGEN" = rpcgen \
# reloc backends
AC_MSG_CHECKING([whether CPU supports libdl])
case $RTEMS_CPU in
- arm | i386 | m68k | mips | moxie | powerpc | sparc)
+ arm | i386 | m68k | mips | moxie | powerpc | riscv | sparc)
HAVE_LIBDL=yes ;;
# bfin has an issue to resolve with libdl. See ticket #2252
bfin)
diff --git a/cpukit/libdl/rtl-elf.h b/cpukit/libdl/rtl-elf.h
index 660b0c47b4..3bbc0bd9ee 100644
--- a/cpukit/libdl/rtl-elf.h
+++ b/cpukit/libdl/rtl-elf.h
@@ -31,7 +31,7 @@ extern "C" {
/*
* Do not add '()'. Leave plain.
*/
-#if defined(__powerpc64__) || defined(__arch64__)
+#if defined(__powerpc64__) || defined(__arch64__) || (__riscv_xlen == 64)
#define ELFSIZE 64
#else
#define ELFSIZE 32
diff --git a/cpukit/libdl/rtl-mdreloc-riscv.c b/cpukit/libdl/rtl-mdreloc-riscv.c
new file mode 100644
index 0000000000..e6778dcc90
--- /dev/null
+++ b/cpukit/libdl/rtl-mdreloc-riscv.c
@@ -0,0 +1,435 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Hesham Almatary
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ */
+
+#include <sys/cdefs.h>
+
+#include <errno.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+
+#include <rtems/rtl/rtl.h>
+#include "rtl-elf.h"
+#include "rtl-error.h"
+#include <rtems/rtl/rtl-trace.h>
+#include "rtl-unwind.h"
+#include "rtl-unwind-dw2.h"
+
+uint32_t
+rtems_rtl_elf_section_flags (const rtems_rtl_obj* obj,
+ const Elf_Shdr* shdr) {
+ return 0;
+}
+
+uint32_t
+rtems_rtl_elf_arch_parse_section (const rtems_rtl_obj* obj,
+ int section,
+ const char* name,
+ const Elf_Shdr* shdr,
+ const uint32_t flags) {
+ (void) obj;
+ (void) section;
+ (void) name;
+ (void) shdr;
+ return flags;
+}
+
+bool
+rtems_rtl_elf_arch_section_alloc (const rtems_rtl_obj* obj,
+ rtems_rtl_obj_sect* sect) {
+ (void) obj;
+ (void) sect;
+ return false;
+}
+
+bool
+rtems_rtl_elf_arch_section_free (const rtems_rtl_obj* obj,
+ rtems_rtl_obj_sect* sect) {
+ (void) obj;
+ (void) sect;
+ return false;
+}
+
+bool
+rtems_rtl_elf_rel_resolve_sym (Elf_Word type) {
+ return true;
+}
+
+size_t
+rtems_rtl_elf_relocate_tramp_max_size (void) {
+ /*
+ * Disable by returning 0.
+ */
+ return 0;
+}
+
+rtems_rtl_elf_rel_status
+rtems_rtl_elf_relocate_rel_tramp (rtems_rtl_obj* obj,
+ const Elf_Rel* rel,
+ const rtems_rtl_obj_sect* sect,
+ const char* symname,
+ const Elf_Byte syminfo,
+ const Elf_Word symvalue) {
+ (void) obj;
+ (void) rel;
+ (void) sect;
+ (void) symname;
+ (void) syminfo;
+ (void) symvalue;
+ return rtems_rtl_elf_rel_no_error;
+}
+
+// Extract bits V[Begin:End], where range is inclusive, and Begin must be < 63.
+static uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end) {
+ return (v & ((1ULL << (begin + 1)) - 1)) >> end;
+}
+
+static int64_t SignExtend64(uint64_t val, unsigned bits) {
+ return (int64_t )(((int64_t) (val << (64 - bits))) >> (64 - bits));
+}
+
+static void write16le(void *loc, uint16_t val) {
+ *((uint16_t *) loc) = val;
+}
+
+static void write32le(void *loc, uint32_t val) {
+ *((uint32_t *) loc) = val;
+}
+
+static void write64le(void *loc, uint64_t val) {
+ *((uint64_t *) loc) = val;
+}
+
+static uint16_t read16le(void *loc) {
+ return *((uint16_t *) loc);
+}
+
+static uint32_t read32le(void *loc) {
+ return *((uint32_t *) loc);
+}
+
+static uint64_t read64le(void *loc) {
+ return *((uint64_t *) loc);
+}
+
+static rtems_rtl_elf_rel_status
+rtems_rtl_elf_reloc_rela (rtems_rtl_obj* obj,
+ const Elf_Rela* rela,
+ const rtems_rtl_obj_sect* sect,
+ const char* symname,
+ const Elf_Byte syminfo,
+ const Elf_Word symvalue,
+ const bool parsing) {
+ Elf_Word *where;
+ Elf_Word tmp;
+ Elf_Word addend = (Elf_Word) rela->r_addend;
+ Elf_Word local = 0;
+
+ char bits = (sizeof(Elf_Word) * 8);
+ where = (Elf_Addr *)(sect->base + rela->r_offset);
+
+ // Final PCREL value
+ Elf_Word pcrel_val = symvalue - ((Elf_Word) where);
+
+ if (syminfo == STT_SECTION) {
+ local = 1;
+ return rtems_rtl_elf_rel_no_error;
+ }
+
+ if (parsing) {
+ return rtems_rtl_elf_rel_no_error;
+ }
+
+ switch (ELF_R_TYPE(rela->r_info)) {
+ case R_TYPE(NONE):
+ break;
+
+ case R_TYPE(RVC_BRANCH): {
+ uint16_t insn = ((*where) & 0xFFFF) & 0xE383;
+ uint16_t imm8 = extractBits(pcrel_val, 8, 8) << 12;
+ uint16_t imm4_3 = extractBits(pcrel_val, 4, 3) << 10;
+ uint16_t imm7_6 = extractBits(pcrel_val, 7, 6) << 5;
+ uint16_t imm2_1 = extractBits(pcrel_val, 2, 1) << 3;
+ uint16_t imm5 = extractBits(pcrel_val, 5, 5) << 2;
+ insn |= imm8 | imm4_3 | imm7_6 | imm2_1 | imm5;
+
+ write16le(where, insn);
+ }
+ break;
+
+ case R_TYPE(RVC_JUMP): {
+ uint16_t insn = ((*where) & 0xFFFF) & 0xE003;
+ uint16_t imm11 = extractBits(pcrel_val, 11, 11) << 12;
+ uint16_t imm4 = extractBits(pcrel_val, 4, 4) << 11;
+ uint16_t imm9_8 = extractBits(pcrel_val, 9, 8) << 9;
+ uint16_t imm10 = extractBits(pcrel_val, 10, 10) << 8;
+ uint16_t imm6 = extractBits(pcrel_val, 6, 6) << 7;
+ uint16_t imm7 = extractBits(pcrel_val, 7, 7) << 6;
+ uint16_t imm3_1 = extractBits(pcrel_val, 3, 1) << 3;
+ uint16_t imm5 = extractBits(pcrel_val, 5, 5) << 2;
+ insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5;
+
+ write16le(where, insn);
+ }
+ break;
+
+ case R_TYPE(RVC_LUI): {
+ int64_t imm = SignExtend64(symvalue + 0x800, bits) >> 12;
+ if (imm == 0) { // `c.lui rd, 0` is illegal, convert to `c.li rd, 0`
+ write16le(where, (read16le(where) & 0x0F83) | 0x4000);
+ } else {
+ uint16_t imm17 = extractBits(symvalue + 0x800, 17, 17) << 12;
+ uint16_t imm16_12 = extractBits(symvalue + 0x800, 16, 12) << 2;
+ write16le(where, (read16le(where) & 0xEF83) | imm17 | imm16_12);
+ }
+ }
+ break;
+
+ case R_TYPE(JAL): {
+ uint32_t insn = read32le(where) & 0xFFF;
+ uint32_t imm20 = extractBits(pcrel_val, 20, 20) << 31;
+ uint32_t imm10_1 = extractBits(pcrel_val, 10, 1) << 21;
+ uint32_t imm11 = extractBits(pcrel_val, 11, 11) << 20;
+ uint32_t imm19_12 = extractBits(pcrel_val, 19, 12) << 12;
+ insn |= imm20 | imm10_1 | imm11 | imm19_12;
+
+ write32le(where, insn);
+ }
+ break;
+
+ case R_TYPE(BRANCH): {
+
+ uint32_t insn = read32le(where) & 0x1FFF07F;
+ uint32_t imm12 = extractBits(pcrel_val, 12, 12) << 31;
+ uint32_t imm10_5 = extractBits(pcrel_val, 10, 5) << 25;
+ uint32_t imm4_1 = extractBits(pcrel_val, 4, 1) << 8;
+ uint32_t imm11 = extractBits(pcrel_val, 11, 11) << 7;
+ insn |= imm12 | imm10_5 | imm4_1 | imm11;
+
+ write32le(where, insn);
+ }
+ break;
+
+ case R_TYPE(64):
+ write64le(where, symvalue);
+ break;
+ case R_TYPE(32):
+ write32le(where, symvalue);
+ break;
+
+ case R_TYPE(SET6):
+ *((uint8_t *) where) = (*where & 0xc0) | (symvalue & 0x3f);
+ break;
+ case R_TYPE(SET8):
+ *((uint8_t *) where) = symvalue;
+ break;
+ case R_TYPE(SET16):
+ write16le(where, symvalue);
+ break;
+ case R_TYPE(SET32):
+ write32le(where, symvalue);
+ break;
+
+ case R_TYPE(ADD8):
+ *((uint8_t *) where) = *((uint8_t *) where) + symvalue;
+ break;
+ case R_TYPE(ADD16):
+ write16le(where, read16le(where) + symvalue);
+ break;
+ case R_TYPE(ADD32):
+ write32le(where, read32le(where) + symvalue);
+ break;
+ case R_TYPE(ADD64):
+ write64le(where, read64le(where) + symvalue);
+ break;
+
+ case R_TYPE(SUB6):
+ *((uint8_t *) where) = (*where & 0xc0) | (((*where & 0x3f) - symvalue) & 0x3f);
+ break;
+ case R_TYPE(SUB8):
+ *((uint8_t *) where) = *((uint8_t *) where) - symvalue;
+ break;
+ case R_TYPE(SUB16):
+ write16le(where, read16le(where) - symvalue);
+ break;
+ case R_TYPE(SUB32):
+ write32le(where, read32le(where) - symvalue);
+ break;
+ case R_TYPE(SUB64):
+ write64le(where, read64le(where) - symvalue);
+ break;
+
+ case R_TYPE(32_PCREL): {
+ write32le(where, pcrel_val);
+
+ if (rtems_rtl_trace (RTEMS_RTL_TRACE_RELOC))
+ printf ("rtl: R_RISCV_32_PCREL %p @ %p in %s\n",
+ (void *) * (where), where, rtems_rtl_obj_oname (obj));
+
+ }
+ break;
+
+ case R_TYPE(PCREL_HI20): {
+ int64_t hi = SignExtend64(pcrel_val + 0x800, bits); //pcrel_val + 0x800;
+ write32le(where, (read32le(where) & 0xFFF) | (hi & 0xFFFFF000));
+
+ }
+ break;
+
+ case R_TYPE(GOT_HI20):
+ case R_TYPE(HI20): {
+
+ uint64_t hi = symvalue + 0x800;
+ write32le(where, (read32le(where) & 0xFFF) | (hi & 0xFFFFF000));
+ }
+ break;
+
+ case R_TYPE(PCREL_LO12_I): {
+ uint64_t hi = (pcrel_val + 0x800) >> 12;
+ uint64_t lo = pcrel_val - (hi << 12);
+ write32le(where, (read32le(where) & 0xFFFFF) | ((lo & 0xFFF) << 20));
+ }
+ break;
+
+ case R_TYPE(LO12_I): {
+
+ uint64_t hi = (symvalue + 0x800) >> 12;
+ uint64_t lo = symvalue - (hi << 12);
+ write32le(where, (read32le(where) & 0xFFFFF) | ((lo & 0xFFF) << 20));
+
+ }
+ break;
+
+ case R_TYPE(PCREL_LO12_S): {
+ uint64_t hi = (pcrel_val + 0x800) >> 12;
+ uint64_t lo = pcrel_val - (hi << 12);
+ uint32_t imm11_5 = extractBits(lo, 11, 5) << 25;
+ uint32_t imm4_0 = extractBits(lo, 4, 0) << 7;
+ write32le(where, (read32le(where) & 0x1FFF07F) | imm11_5 | imm4_0);
+
+ }
+ break;
+
+ case R_TYPE(LO12_S): {
+ uint64_t hi = (symvalue + 0x800) >> 12;
+ uint64_t lo = symvalue - (hi << 12);
+ uint32_t imm11_5 = extractBits(lo, 11, 5) << 25;
+ uint32_t imm4_0 = extractBits(lo, 4, 0) << 7;
+ write32le(where, (read32le(where) & 0x1FFF07F) | imm11_5 | imm4_0);
+ }
+ break;
+
+ case R_TYPE(CALL_PLT):
+ case R_TYPE(CALL): {
+ int64_t hi = SignExtend64(pcrel_val + 0x800, bits);
+ write32le(where, (read32le(where) & 0xFFF) | (hi & 0xFFFFF000));
+ int64_t hi20 = SignExtend64(pcrel_val + 0x800, bits);
+ int64_t lo = pcrel_val - (hi20 << 12);
+ write32le(((char *) where) + 4, (read32le(((char *) where) + 4) & 0xFFFFF) | ((lo & 0xFFF) << 20));
+ }
+ break;
+
+ default:
+ rtems_rtl_set_error (EINVAL,
+ "%s: Unsupported relocation type %ld "
+ "in non-PLT relocations",
+ sect->name, (uint32_t) ELF_R_TYPE(rela->r_info));
+ return rtems_rtl_elf_rel_failure;
+ }
+
+ return rtems_rtl_elf_rel_no_error;
+}
+
+rtems_rtl_elf_rel_status
+rtems_rtl_elf_relocate_rela (rtems_rtl_obj* obj,
+ const Elf_Rela* rela,
+ const rtems_rtl_obj_sect* sect,
+ const char* symname,
+ const Elf_Byte syminfo,
+ const Elf_Word symvalue) {
+ return rtems_rtl_elf_reloc_rela (obj,
+ rela,
+ sect,
+ symname,
+ syminfo,
+ symvalue,
+ false);
+}
+
+rtems_rtl_elf_rel_status
+rtems_rtl_elf_relocate_rela_tramp (rtems_rtl_obj* obj,
+ const Elf_Rela* rela,
+ const rtems_rtl_obj_sect* sect,
+ const char* symname,
+ const Elf_Byte syminfo,
+ const Elf_Word symvalue) {
+ return rtems_rtl_elf_reloc_rela (obj,
+ rela,
+ sect,
+ symname,
+ syminfo,
+ symvalue,
+ true);
+}
+
+rtems_rtl_elf_rel_status
+rtems_rtl_elf_relocate_rel (rtems_rtl_obj* obj,
+ const Elf_Rel* rel,
+ const rtems_rtl_obj_sect* sect,
+ const char* symname,
+ const Elf_Byte syminfo,
+ const Elf_Word symvalue) {
+ rtems_rtl_set_error (EINVAL, "rel type record not supported");
+ return rtems_rtl_elf_rel_failure;
+}
+
+bool
+rtems_rtl_elf_unwind_parse (const rtems_rtl_obj* obj,
+ const char* name,
+ uint32_t flags) {
+ return rtems_rtl_elf_unwind_dw2_parse (obj, name, flags);
+}
+
+bool
+rtems_rtl_elf_unwind_register (rtems_rtl_obj* obj) {
+ return rtems_rtl_elf_unwind_dw2_register (obj);
+}
+
+bool
+rtems_rtl_elf_unwind_deregister (rtems_rtl_obj* obj) {
+ return rtems_rtl_elf_unwind_dw2_deregister (obj);
+}
diff --git a/cpukit/score/cpu/riscv/include/machine/elf_machdep.h b/cpukit/score/cpu/riscv/include/machine/elf_machdep.h
new file mode 100644
index 0000000000..84220b8271
--- /dev/null
+++ b/cpukit/score/cpu/riscv/include/machine/elf_machdep.h
@@ -0,0 +1,144 @@
+/* $NetBSD: elf_machdep.h,v 1.6 2017/11/06 03:47:48 christos Exp $ */
+
+/*-
+ * Copyright (c) 2019 Hesham Almatary
+ *
+ * Copyright (c) 2014 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas of 3am Software Foundry.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RISCV_ELF_MACHDEP_H_
+#define _RISCV_ELF_MACHDEP_H_
+
+#define EM_RISCV 243
+#define ELF32_MACHDEP_ID EM_RISCV
+#define ELF64_MACHDEP_ID EM_RISCV
+
+#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB
+#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB
+
+#define ELF32_MACHDEP_ID_CASES \
+ case EM_RISCV: \
+ break;
+
+#define ELF64_MACHDEP_ID_CASES \
+ case EM_RISCV: \
+ break;
+
+#define KERN_ELFSIZE 32
+#ifdef _LP64
+#define ARCH_ELFSIZE 64 /* MD native binary size */
+#else
+#define ARCH_ELFSIZE 32 /* MD native binary size */
+#endif
+
+/* Processor specific flags for the ELF header e_flags field. */
+
+/* Processor specific relocation types */
+
+#define R_RISCV_NONE 0
+#define R_RISCV_32 1 // A
+#define R_RISCV_64 2
+#define R_RISCV_RELATIVE 3
+#define R_RISCV_COPY 4
+#define R_RISCV_JMP_SLOT 5
+#define R_RISCV_TLS_DTPMOD32 6
+#define R_RISCV_TLS_DTPREL32 7
+#define R_RISCV_TLS_DTPMOD64 8
+#define R_RISCV_TLS_DTPREL64 9
+#define R_RISCV_TLS_TPREL32 10
+#define R_RISCV_TLS_TPREL64 11
+
+/* The rest are not used by the dynamic linker */
+#define R_RISCV_BRANCH 16 // (A - P) & 0xffff
+#define R_RISCV_JAL 17 // A & 0xff
+#define R_RISCV_CALL 18 // (A - P) & 0xff
+#define R_RISCV_CALL_PLT 19
+#define R_RISCV_GOT_HI20 20
+#define R_RISCV_TLS_GOT_HI20 21
+#define R_RISCV_TLS_GD_HI20 22
+#define R_RISCV_PCREL_HI20 23
+#define R_RISCV_PCREL_LO12_I 24
+#define R_RISCV_PCREL_LO12_S 25
+#define R_RISCV_HI20 26 // A & 0xffff
+#define R_RISCV_LO12_I 27 // (A >> 16) & 0xffff
+#define R_RISCV_LO12_S 28 // (S + A - P) >> 2
+#define R_RISCV_TPREL_HI20 29
+#define R_RISCV_TPREL_LO12_I 30
+#define R_RISCV_TPREL_LO12_S 31
+#define R_RISCV_TPREL_ADD 32
+#define R_RISCV_ADD8 33
+#define R_RISCV_ADD16 34
+#define R_RISCV_ADD32 35
+#define R_RISCV_ADD64 36
+#define R_RISCV_SUB8 37
+#define R_RISCV_SUB16 38
+#define R_RISCV_SUB32 39
+#define R_RISCV_SUB64 40
+#define R_RISCV_GNU_VTINHERIT 41 // A & 0xffff
+#define R_RISCV_GNU_VTENTRY 42
+#define R_RISCV_ALIGN 43
+#define R_RISCV_RVC_BRANCH 44
+#define R_RISCV_RVC_JUMP 45
+#define R_RISCV_RVC_LUI 46
+
+#define R_RISCV_RELAX 51
+#define R_RISCV_SUB6 52
+#define R_RISCV_SET6 53
+#define R_RISCV_SET8 54
+#define R_RISCV_SET16 55
+#define R_RISCV_SET32 56
+
+#define R_RISCV_32_PCREL 57
+
+/* These are aliases we can use R_TYPESZ */
+#define R_RISCV_ADDR32 R_RISCV_32
+#define R_RISCV_ADDR64 R_RISCV_64
+
+#define R_TYPE(name) R_RISCV_ ## name
+#if ELFSIZE == 32
+#define R_TYPESZ(name) R_RISCV_ ## name ## 32
+#else
+#define R_TYPESZ(name) R_RISCV_ ## name ## 64
+#endif
+
+#ifdef _KERNEL
+#ifdef ELFSIZE
+#define ELF_MD_PROBE_FUNC ELFNAME2(cpu_netbsd,probe)
+#endif
+
+struct exec_package;
+
+int cpu_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
+ vaddr_t *);
+
+int cpu_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
+ vaddr_t *);
+
+#endif /* _KERNEL */
+
+#endif /* _RISCV_ELF_MACHDEP_H_ */
diff --git a/testsuites/libtests/configure.ac b/testsuites/libtests/configure.ac
index 4d0707c219..f3a1cd586d 100644
--- a/testsuites/libtests/configure.ac
+++ b/testsuites/libtests/configure.ac
@@ -51,7 +51,7 @@ AM_CONDITIONAL(HAS_POSIX,test x"${rtems_cv_RTEMS_POSIX_API}" = x"yes")
# Must match the list in cpukit.
AC_MSG_CHECKING([whether CPU supports libdl])
case $RTEMS_CPU in
- arm | i386 | m68k | mips | moxie | powerpc | sparc)
+ arm | i386 | m68k | mips | moxie | powerpc | riscv | sparc)
TEST_LIBDL=yes ;;
# bfin has an issue to resolve with libdl. See ticket #2252
bfin)
--
2.17.1
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