Context switching through an ISR in RTEMS

[Utkarsh Rai]

Hello,
I have been testing my code for thread stack isolation against various
tests( Some written by me, and remaining already present). One of the
limitations that I have found is that I encounter fatal errors whenever a
context switch takes place through an ISR. Can you please explain how the
context switching procedure works when an interrupt occurs. When I use gdb
for stepping through the code it asynchronously moves to context switching
code from the executing thread( for example psx16 test).
For thread stack protection,  the part that deals with context switching
simply 'sets 'the memory entries of the heir stack and 'unsets' that of the
executing stack.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/devel/attachments/20200812/2fc987f0/attachment.html>