[PATCH v1 1/1] bsp/xilinx-zynq: Flush TX-Buffer before initializing uart

[Jan Sommer]

Closes #4055
Closes #4056
---
 bsps/arm/shared/serial/zynq-uart-polled.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/bsps/arm/shared/serial/zynq-uart-polled.c b/bsps/arm/shared/serial/zynq-uart-polled.c
index 4e0ca46aca..e6f478ee07 100644
--- a/bsps/arm/shared/serial/zynq-uart-polled.c
+++ b/bsps/arm/shared/serial/zynq-uart-polled.c
@@ -122,6 +122,8 @@ void zynq_uart_initialize(rtems_termios_device_context *base)
   uint32_t brgr = 0x3e;
   uint32_t bauddiv = 0x6;
 
+  zynq_uart_reset_tx_flush(ctx);
+
   zynq_cal_baud_rate(ZYNQ_UART_DEFAULT_BAUD, &brgr, &bauddiv, regs->mode);
 
   regs->control &= ~(ZYNQ_UART_CONTROL_RXEN | ZYNQ_UART_CONTROL_TXEN);
-- 
2.17.1