[PATCH] Fix for Beaglebone BSP PWM bug

[James Fitzsimons]

Hi all,

I hope that patch is ok, that was my first time using git send-email.

This patch fixes a bug in the Beaglebone BSP where the register offsets for
the PWM outputs on header pins P9_14 and P9_16 are incorrectly calculated.

I'm about to start work on adding the QEP driver to the beaglebone BSP. Is
this list where should I ask questions on BSP changes (coding style, API
design etc), or should I do that on the users list?

Many thanks,
James Fitzsimons

On Sun, 5 Jul 2020 at 22:41, James Fitzsimons <james.fitzsimons at gmail.com>
wrote:

> ---
> Fixed incorrect register offset values for EHRPWM1A on P9_14
>  and EHRPWM1B on P9_16
>
>  bsps/arm/beagle/pwm/pwm.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/bsps/arm/beagle/pwm/pwm.c b/bsps/arm/beagle/pwm/pwm.c
> index 0bc5d125bf..9a346995aa 100644
> --- a/bsps/arm/beagle/pwm/pwm.c
> +++ b/bsps/arm/beagle/pwm/pwm.c
> @@ -102,9 +102,9 @@ bool beagle_pwm_pinmux_setup(bbb_pwm_pin_t pin_no,
> BBB_PWMSS pwm_id)
>         } else if (pin_no == BBB_P8_36_1A) {
>           REG(AM335X_PADCONF_BASE + BBB_CONTROL_CONF_LCD_DATA(10)) =
> BBB_MUXMODE(BBB_P8_36_MUX_PWM);
>         } else if (pin_no == BBB_P9_14_1A) {
> -         REG(AM335X_PADCONF_BASE + BBB_CONTROL_CONF_GPMC_AD(2)) =
> BBB_MUXMODE(BBB_P9_14_MUX_PWM);
> +         REG(AM335X_PADCONF_BASE + BBB_CONTROL_CONF_GPMC_AD(18)) =
> BBB_MUXMODE(BBB_P9_14_MUX_PWM);
>         } else if (pin_no == BBB_P9_16_1B) {
> -         REG(AM335X_PADCONF_BASE + BBB_CONTROL_CONF_GPMC_AD(3)) =
> BBB_MUXMODE(BBB_P9_16_MUX_PWM);
> +         REG(AM335X_PADCONF_BASE + BBB_CONTROL_CONF_GPMC_AD(19)) =
> BBB_MUXMODE(BBB_P9_16_MUX_PWM);
>         } else {
>           is_valid = false;
>          }
> --
> 2.17.1
>
>
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