[PATCH v1 0/9] Enable SMP for pc386 based bsps

[Sebastian Huber]

On 18/06/2020 09:46, Jan.Sommer at dlr.de wrote:

>> -----Original Message-----
>> From: Sebastian Huber [mailto:sebastian.huber at embedded-brains.de]
>> Sent: Wednesday, June 10, 2020 3:50 PM
>> To: Sommer, Jan;devel at rtems.org
>> Subject: Re: [PATCH v1 0/9] Enable SMP for pc386 based bsps
>>
>> On 31/05/2020 16:22, Jan Sommer wrote:
>>
>> [...]
>>
>>> Some details on the missing tests:
>>> -----------------------------------
>>> smpfatal09: This test actually does pass, but because the fatal error handler
>> is executed before the console is initialized, no output is produced.
>>> smpclock01.exe: Here CPU0 disables its local interrupts and waits for a
>> barrier release of CPU1. This means it doesn't handle timer interrupts
>> anymore and doesn't send corresponding IPIs to other CPUs.
>>> At the same time CPU1 is waiting for a timer event before releasing the
>> barrier. Any hints how to resolve this are very welcome.
>> This could be a Qemu timing issue.
> I think, it has to do with the implementation that only the CPU0 handles timer interrupts.
> If its local interrupts are disabled, there is essentially no sense of time anymore for the system.
> I created a ticket for it with some explanation (https://devel.rtems.org/ticket/4008), in case you have any suggestions.
In an SMP system, the clock interrupt should be handled on all cores. 
The i386 clock driver needs to be fixed to do this.