Proposal for hardware configuration dependent performance limits

[Sebastian Huber]

On 16/11/2020 00:33, Chris Johns wrote:

>>>> In the proposal, limits are specified like this:
>>>>
>>>>
>>>> limits:
>>>>      sparc/gr712rc:
>>>>        DirtyCache:
>>>>          max-upper-bound: 0.000005
>>>>          mean-upper-bound: 0.000005
>>>>        FullCache:
>>>>          max-upper-bound: 0.000005
>>>>          mean-upper-bound: 0.000005
>>>>        HotCache:
>>>>          max-upper-bound: 0.000005
>>>>          mean-upper-bound: 0.000005
>>>>        Load/1:
>>>>          max-upper-bound: 0.00001
>>>>          mean-upper-bound: 0.00001
>>>>        Load/2:
>>>>          max-upper-bound: 0.00001
>>>>          mean-upper-bound: 0.00001
>>>>        Load/3:
>>>>          max-upper-bound: 0.00001
>>>>          mean-upper-bound: 0.00001
>>>>        Load/4:
>>>>          max-upper-bound: 0.00001
>>>>          mean-upper-bound: 0.00001
>>>>
>>>> This neglects that the limits are subject to a board configuration. One
>>>> approach to cover this is the addition of a new BSP provided function:
>>>>
>>>> const char *rtems_get_hardware_performance_hash();
>>>>
>>>> The BSP feeds all performance related data into a hash function and
>>> "data" here means configuration?
>> Yes, hardware configuration.
> Why not make these values part of the BSP configuration? The defaults for the
> BSP can have a set of suitable values. Different boards have different
> configurations to match and a separate kernel build.
>
This doesn't work on BSPs which support configuration via a hardware 
enumeration, boot loader settings, or device trees. Also changes in the 
BSP options have no influence on the BSP name. Not only BSP 
configuration influence performance, the CPU options play a role too, 
for example RTEMS_SMP. In order to compare performance values over time 
we have to obtain the values under the same conditions.

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