[PATCH 2/2] spec/aarch64: Only apply SUBALIGN(4) to ILP32
Sebastian Huber
sebastian.huber at embedded-brains.de
Mon Nov 16 13:43:50 UTC 2020
On 16/11/2020 14:40, Kinsey Moore wrote:
> -----Original Message-----
> From: Sebastian Huber<sebastian.huber at embedded-brains.de>
> Sent: Monday, November 16, 2020 07:35
> To: Kinsey Moore<kinsey.moore at oarcorp.com>;devel at rtems.org
> Subject: Re: [PATCH 2/2] spec/aarch64: Only apply SUBALIGN(4) to ILP32
>
>> On 16/11/2020 14:15, Kinsey Moore wrote:
>>
>>> The SUBALIGN(4) required on rtemsroset and rtemsrwset for ILP32 builds
>>> was previously present on LP64 builds and causes no issues within
>>> RTEMS, but causes relocation/alignment issues when building libbsd.
>>> This restricts those alignment changes to ILP32 builds.
>> Please check it in if you think it is necessary.
>>
>> What troubles me a bit is that these SUBALIGN() stuff is present at all.
>>
>> It also troubles me that the splinkersets01 test case didn't catch this problem.
> That test was what originally caught the problem during development of the A53 BSP. This patch isn't the addition of a fix for the alignment problems, it's an adjustment of the original fix to be compatible with libbsd's use of rtemsroset/rtemsrwset linker sections.
So, this SUBALIGN() is just a workaround for some other problem? It
would be good to document this known issue somewhere, for example a
ticket. Is this an upstream problem in GCC or the GNU linker?
--
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