x86 c++ exception handling
joel at rtems.org
Fri Sep 11 14:41:25 UTC 2020
On Fri, Sep 11, 2020 at 9:06 AM Karel Gardas <karel.gardas at centrum.cz>
> On 9/11/20 3:13 PM, Joel Sherrill wrote:
> > FWIW i386 is an 80s CPU introduced in 1985. i486 was introduced
> > in 1989. The Pentium was 1993. Remember It's All About the Pentium!
> > Pentium II was 1997 and first with SMP but maybe not setting the baseline
> > we want.
> What about to support in master what man can currently purchase? If so,
> then based on my limited research it looks like the cpu family
> (orderable) goes back to 2016/2015 which support architecture of more or
> less NetBurst uarch isn set (both intel and amd).
> One exception found is Vertex86 cpus which still sells and boards are
> available and which are compatible only with i586/p5 from as you noted
Karel: Typo correction: Vortex86: https://en.wikipedia.org/wiki/Vortex86
If I am reading that right, we may be ok dumping i386 and i486 completely
and assuming around a Pentium II as default. Rather than a blanket drop
32-bit support which kills a LOT of usable functionality, I would rather
a new floor for the CPU model.
My recollection from SMP testing i386 on qemu was that the lowest CPU
model on Qemu that worked was core2duo which pc586-sse matches for
CPU_CFLAGS = -mtune=pentium -march=pentium -msse2
Is that lower than the broken code in GCC? What's the lowest multilib
where the atomics are right? Assuming that it isn't just a bug below that
I would like to pick a floor based on some reasonable rationale
like GCC needs feature X for atomics which appears in CPU model Y.
I don't think Qemu provides a rationale for a floor. Availability of SoCs
for embedded systems seems like a short list and the wikipedia page
doesn't encourage me that they are viable options as most look dead
or barely breathing (parrot is dead):
That leaves us with what's the lowest multilib in GCC where atomics
work (or can be fixed, assuming this is a bug).
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